CVS: blob/src/blob start-s3c2500.S,1.1,1.2

[Russ D. <ru...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory sc8-pr-cvs1:/tmp/cvs-serv1884

Modified Files:
	start-s3c2500.S 
Log Message:
update start-s3c2500.S for remap and proper reboot/reblob

Index: start-s3c2500.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/start-s3c2500.S,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- start-s3c2500.S	4 Sep 2003 18:03:09 -0000	1.1
+++ start-s3c2500.S	27 Nov 2003 03:34:02 -0000	1.2
@@ -42,10 +42,14 @@
 cpu_speed:	.word	CPU_SPEED
 bus_speed:	.word	BUS_SPEED
 
-/* We start by implementing *all* exception vectors */
+piggy_start:    .word   __piggy_start
 
 
-/* Reset vector: this initialises the machine */
+/* We start by implementing *all* exception vectors */
+
+/* Reset vector: this initializes the machine */
+/* note: the s3c2500 doesn't have a real reset, so we need to
+ * reset a lot of registers manually */
 .globl reset
 reset:
 	/* Disable interrupts */
@@ -53,13 +57,24 @@
 	orr	r0, r0, #I_BIT | F_BIT
 	msr	cpsr, r0
 
-	/* Enable "custom" clocks */
+	/* Disable caches/protection unit */
+	mrc	p15, 0, r0, c1, c0, 0
+	bic	r0, r0, #0x1000	@ Disable I-cache
+	bic	r0, r0, #5	@ Disable D-cache/protection unit
+	mcr	p15, 0, r0, c1, c0, 0
+
+	/* Disable Custom clocking */
 	mov	r0, #ASIC_BASE
 	orr	r0, r0, #SYSCFG_BASEB
-
-	mov	r1, #CPLLREN | SPLLREN
+	mov	r0, #0
 	str	r1, [r0]
 
+	/* Disable any clock division */
+	str	r1, [r0, #CLKCON]
+	
+	/* Make sure all external clocks are enabled */
+	str	r1, [r0, #PCLKDIS]
+
 	/* Set CPU clock */
 	ldr	r1, cpu_speed
 	str	r1, [r0, #CPLL]
@@ -68,12 +83,71 @@
 	ldr	r1, bus_speed
 	str	r1, [r0, #SPLL]
 
+	/* Enable "custom" clocks */
+	mov	r1, #CPLLREN | SPLLREN
+	str	r1, [r0]
+
 	/* init LED */
 	bl	ledinit
 
 	/* setup memory */
 	bl	memsetup
 
+	/* We need to do a map switch, now is a good time to do it
+	 * copy the first stage of the loader into sdram, and do
+	 * the switch */
+
+	/* First check to see if the map is already switched... */
+	mov	r0, #ASIC_BASE
+	orr	r0, r0, #SYSCFG_BASEB
+	ldr	r1, [r0, #SYSCFG]
+	tst	r1, #REMAP
+	bne	remapped
+
+	/* Do this thing with the map unswitched */
+	/* copy blob start to RAM */
+	mov	r0, #0
+	mov	r1, #S3C2500_SDRAM_BANK0
+
+	b 1f
+
+remapped:
+	/* Do this thing with the map already switched */
+	/* copy blob start to RAM (for a switched map) */
+	mov	r0, #0x80000000
+	mov	r1, #0
+
+1:
+	ldr	r2, piggy_start
+	add	r2, r2, r0
+
+	/* do the copy */
+
+	/* r0 = source address
+	 * r1 = target address
+	 * r2 = source end address
+	 */
+copy_loop:
+	ldmia	r0!, {r3-r10}
+	stmia	r1!, {r3-r10}
+	cmp	r0, r2
+	ble	copy_loop
+
+	/* we have a copy of the stage1 loader, do the switch if its 
+	 * not already done */
+	mov	r0, #ASIC_BASE
+	orr	r0, r0, #SYSCFG_BASEB
+	ldr	r1, [r0, #SYSCFG]
+	orr	r1, r1, #REMAP
+	str	r1, [r0, #SYSCFG]
+
+	/* Switch around the PC for a "manual remap" if needed */
+	bic	pc, pc, #0x80000000
+	nop
+
+	/* Setup protection unit */
+	bl	protectionsetup
+
 	/* turn off the LED. if it stays off it is an indication that
 	 * we didn't make it into the C code */
 	bl	led_off
@@ -176,7 +250,7 @@
 		
 wait:
 	/* busy wait loop*/
-	mov	r5, #0x100000
+	mov	r5, #0x40000000
 wait0:
 	subs	r5, r5, #1
 	bne	wait0