From: Russ D. <ru...@us...> - 2003-11-27 03:25:56
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Update of /cvsroot/blob/blob/include/blob/arch In directory sc8-pr-cvs1:/tmp/cvs-serv897 Modified Files: smdk2500.h Log Message: update the smdk2500 header Index: smdk2500.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/smdk2500.h,v retrieving revision 1.1 retrieving revision 1.2 diff -u -d -r1.1 -r1.2 --- smdk2500.h 4 Sep 2003 18:10:42 -0000 1.1 +++ smdk2500.h 27 Nov 2003 03:25:52 -0000 1.2 @@ -27,50 +27,90 @@ #ifndef BLOB_ARCH_SMDK2500_H #define BLOB_ARCH_SMDK2500_H +/*------------------------------------------------------ + * Protection map for the SMDK2500 + * + * 0xFFFFFFFF +----------------------+ --------------------------------- + * ~ ~ + * + ASIC(2MB) + region 3 + * + I-Cache : OFF + (2 MB) + * + D-Cache : OFF + + * 0xF0000000 +----------------------+ ------------ + * ~ ~ + * + EXTIO(256MB) + region 2 region 0 + * + I-Cache : OFF + (2 MB) (4 GB) + * + D-Cache : OFF + + * 0x80000000 +----------------------+ --------------------- + * + SDRAM(1MB) I/D : OFF + region 7 (1 MB) + * +~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ + ----------- + * + SDRAM(32MB) + region 1 + * + I-Cache : ON + (32 MB) + * + D-Cache : ON + + * 0x00000000 +----------------------+ --------------------------------- + * + */ +#define REGION0 0x00000000 | (SZ_4GB << 1) | 1 @ All memory +#define REGION1 0x00000000 | (SZ_32MB << 1) | 1 @ SDRAM +#define REGION2 0x80000000 | (SZ_256MB << 1) | 1 @ EXT IO +#define REGION3 0xf0000000 | (SZ_2MB << 1) | 1 @ ASIC +#define REGION4 0 @ Disabled +#define REGION5 0 @ Disabled +#define REGION6 0 @ Disabled +#define REGION7 0x01F00000 | (SZ_1MB << 1) | 1 @ Non-cacheable + +#define REGIONCACHE 0x02 +#define REGIONWB 0x00 #define TERMINAL_SPEED baud_115200 #define CPU_SPEED SPEED_166MHz #define BUS_SPEED SPEED_133MHz +/* + * CFGREG : SDRAM Configuration 0 register + * note that ras, rc, rcd, and rp regs are *actual* values, not + * the value + 1 + */ +#define CFGREG_VAL (RAS(6) | RC(9) | RCD(3) | RP(3) | \ + D1_128M | D0_128M | CL(3) | NO_AP | XW32) +//#define REFCYC_VAL (GET_MHz(BUS_SPEED) * 15 + ((GET_MHz(BUS_SPEED) * 6) / 10)) +#define REFCYC_VAL (0x800) +/* Flash speed in ns */ +#define FLASH_SPEED 90 /* GPIO for the LED */ #define LED_GPIO 0x00000001 /* GPIO 0 */ /* the base address were blob-rest is loaded by the first stage loader */ -#define BLOB_ABS_BASE_ADDR (0x40200400) +#define BLOB_ABS_BASE_ADDR (0x00200400) /* where do various parts live in RAM */ -#define BLOB_RAM_BASE (0x40100000) -#define PARAM_RAM_BASE (0x40110000) -#define KERNEL_RAM_BASE (0x40008000) -#define RAMDISK_RAM_BASE (0x40400000) -#define RAM_START (0x41000000) +#define BLOB_RAM_BASE (0x00100000) +#define PARAM_RAM_BASE (0x00110000) +#define KERNEL_RAM_BASE (0x00020000) +#define RAMDISK_RAM_BASE (0x00400000) +#define RAM_START (0x01000000) /* and where do they live in flash */ #define BLOB_FLASH_BASE (0x00000000) -#define BLOB_FLASH_LEN (64 * 1024) -#define PARAM_FLASH_BASE (BLOB_FLASH_BASE + BLOB_FLASH_LEN) -#define PARAM_FLASH_LEN (64 * 1024) #define SMDK2500_ERASE_BLOCK (64 * 1024) +#define BLOB_FLASH_LEN (SMDK2500_ERASE_BLOCK) +#define PARAM_FLASH_BASE (BLOB_FLASH_BASE + BLOB_FLASH_LEN) +#define PARAM_FLASH_LEN (SMDK2500_ERASE_BLOCK) #define KERNEL_FLASH_BASE (PARAM_FLASH_BASE + PARAM_FLASH_LEN) #define KERNEL_FLASH_LEN (SMDK2500_ERASE_BLOCK * (32 - 2)) -#define LOAD_RAMDISK 0 /* load ramdisk into ram */ -#define RAMDISK_FLASH_BASE (PARAM_FLASH_BASE + PARAM_FLASH_LEN) -#define RAMDISK_FLASH_LEN (SMDK2500_ERASE_BLOCK * (32 - 2)) #define PARAM_START PARAM_FLASH_BASE #define PARAM_LEN PARAM_FLASH_LEN /* the position of the kernel boot parameters */ -#define BOOT_PARAMS (0x40000100) - +#define BOOT_PARAMS (0x00000100) /* the size (in kbytes) to which the compressed ramdisk expands */ #define RAMDISK_SIZE (8 * 1024) - +#define LOAD_RAMDISK 0 /* don't load ramdisk into ram */ |