From: Christopher H. <ch...@us...> - 2003-01-27 20:49:09
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Update of /cvsroot/blob/blob/include/blob/arch In directory sc8-pr-cvs1:/tmp/cvs-serv13665/include/blob/arch Modified Files: badge4.h Log Message: use new part offset and size support; allow for CONFIG_ZIMAGE_SUPPORT Index: badge4.h =================================================================== RCS file: /cvsroot/blob/blob/include/blob/arch/badge4.h,v retrieving revision 1.13 retrieving revision 1.14 diff -u -d -r1.13 -r1.14 --- badge4.h 24 Jan 2003 09:29:05 -0000 1.13 +++ badge4.h 27 Jan 2003 20:49:05 -0000 1.14 @@ -94,19 +94,35 @@ #define RAMDISK_RAM_BASE (0xc0600000) /* and where do they live in flash */ -#define BLOB_FLASH_BASE (0x00000000) -#define BLOB_FLASH_LEN (0x00002000 * 6) -#define PARAM_FLASH_BASE (BLOB_FLASH_BASE + BLOB_FLASH_LEN) -#define PARAM_FLASH_LEN (0x00002000 * 2) -#define RAMDISK_FLASH_BASE (PARAM_FLASH_BASE + PARAM_FLASH_LEN) -#define RAMDISK_FLASH_LEN (0x00010000 * 63) +#ifdef CONFIG_ZIMAGE_SUPPORT + +# define BLOB_FLASH_BASE (0x00000000) +# define BLOB_FLASH_LEN (0x00002000 * 6) +# define PARAM_FLASH_BASE (BLOB_FLASH_BASE + BLOB_FLASH_LEN) +# define PARAM_FLASH_LEN (0x00002000 * 2) +# define KERNEL_FLASH_BASE (PARAM_FLASH_BASE + PARAM_FLASH_LEN) +# define KERNEL_FLASH_LEN (0x00010000 * 14) +# define RAMDISK_FLASH_BASE (KERNEL_FLASH_BASE + KERNEL_FLASH_LEN) +# define RAMDISK_FLASH_LEN (0x00010000 * (127 - 14)) + +#else + +# define BLOB_FLASH_BASE (0x00000000) +# define BLOB_FLASH_LEN (0x00002000 * 6) +# define PARAM_FLASH_BASE (BLOB_FLASH_BASE + BLOB_FLASH_LEN) +# define PARAM_FLASH_LEN (0x00002000 * 2) +# define RAMDISK_FLASH_BASE (PARAM_FLASH_BASE + PARAM_FLASH_LEN) +# define RAMDISK_FLASH_LEN (0x00010000 * 127) + +# define KERNEL_FLASH_LEN (2 * 1024 * 1024) /* limit for download */ + +#endif #define PARAM_START PARAM_FLASH_BASE #define PARAM_LEN PARAM_FLASH_LEN #define LOAD_RAMDISK 0 #define RAMDISK_SIZE (4 * 1024) -#define KERNEL_FLASH_LEN (2 * 1024 * 1024) /* limit for download */ /* the position of the kernel boot parameters */ @@ -115,9 +131,10 @@ /* Memory configuration */ #define BADGE4_MDCNFG \ - (MDCNFG_BANK0_ENABLE|MDCNFG_DTIM0_SDRAM|MDCNFG_DWID0_32B|MDCNFG_DRAC0(3)|MDCNFG_TRP0(4)|MDCNFG_TDL0(3)|MDCNFG_TWR0(3)) /* was 0x0000f435 */ + (MDCNFG_BANK0_ENABLE|MDCNFG_DTIM0_SDRAM|MDCNFG_DWID0_32B|\ + MDCNFG_DRAC0(3)|MDCNFG_TRP0(4)|MDCNFG_TDL0(3)|MDCNFG_TWR0(3)) -/* On CS0: Intel TE28F320C3BA100 Advanced+ Boot Block Flash (4MB) */ +/* On CS0: Intel TE28F320C3 or TE28F640C3 Flash */ #define BADGE4_CS0 \ (MSC_RT_ROMFLASH|MSC_RBW16|MSC_RDF(31)|MSC_RDN(31)|MSC_RRR(7)) @@ -139,10 +156,9 @@ #define BADGE4_CS5 \ (MSC_RT_SRAM_012|MSC_RBW32|MSC_RDF(31)|MSC_RDN(31)|MSC_RRR(7)) -#define BADGE4_MSC0 (BADGE4_CS0 | (BADGE4_CS1<<16)) /* was: 0xfff9fffc */ -#define BADGE4_MSC1 (BADGE4_CS2 | (BADGE4_CS3<<16)) /* was: 0x0000fff9 */ -#define BADGE4_MSC2 (BADGE4_CS4 | (BADGE4_CS5<<16)) /* was: 0xfff90000 */ - +#define BADGE4_MSC0 (BADGE4_CS0 | (BADGE4_CS1<<16)) +#define BADGE4_MSC1 (BADGE4_CS2 | (BADGE4_CS3<<16)) +#define BADGE4_MSC2 (BADGE4_CS4 | (BADGE4_CS5<<16)) #define MDCNFG_VALUE BADGE4_MDCNFG /* 0x0 MDCNFG */ #define MDCAS00_VALUE 0xAAAAAAA7 /* 0x04 MDCAS00 */ @@ -157,8 +173,5 @@ #define MDCAS22_VALUE 0xAAAAAAAA /* 0x28 MDCAS22 */ #define MSC2_VALUE BADGE4_MSC2 /* 0x2C MSC2 */ #define SMCNFG_VALUE 0x00000000 /* 0x30 SMCNFG */ - -//#define ARCH_SPECIFIC_MEMSETUP /* we do our own thing */ -//#define ARCH_SPECIFIC_MEMSETUP_STD /* we also use the standard thing */ #endif |