From: Russell K. - A. L. <li...@ar...> - 2002-10-14 09:57:06
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On Mon, Oct 14, 2002 at 11:26:58AM +0200, Abraham vd Merwe wrote: > That's what I gathered. However in the SDRAM SPD (Serial Presence Detect - > the little EEPROM which contains the info about the DIMM) module, the > refresh time goes from 3.9us up to 125us which is orders of magnitude > shorter than all the other refresh times I've seen. 64ms / 4096 = ~15us > So I've thought that the XXms refresh times was for all the rows Correct - you'll find this confirmed by data sheets on the actual SDRAM devices. > and that the SPD specs has it per row, but the explanation above throws > that theory out the door. Do you think > it is possible that the SDRAM dimms can have such short refresh times? No. Or if they do, the refresh starts severely impacting on the performance of the device. > Also, do those row address bits in above calculation include bits for the > bank selects or is it just the row address bits on the dimm (I guess it's > the latter right?) tbh I don't remember off hand. I seem to remember that it doesn't include the bank selects, but please check the data on the SDRAM chips you're using there. |