Re: How to configure MDREFR on StrongARM SA-1110

[Abraham vd M. <ab...@2d...>]

Hi Russell!

> > The refresh time found in SDRAM SPD's - is that per row or for the whole
> > module? Must be per row, since the longest possible refresh time is 125=
us.
>=20
> Tref is the time between refreshes on a single row of dynamic RAM.  As
> an example, take a Tref of 64ms and 12-bits of row address (ie, 4096
> rows.)
>=20
> This means that row 0 must be refreshed every 64ms.  Or to put it another
> way, you need to refresh all rows in the chip within 64ms:
>=20
>        0ms                       64ms
>        v                         v
> time:  ------------------------------------>
> rownr:  0   1   2   3 ... 4095    0   1   2

That's what I gathered. However in the SDRAM SPD (Serial Presence Detect -
the little EEPROM which contains the info about the DIMM) module, the
refresh time goes from 3.9us up to 125us which is orders of magnitude
shorter than all the other refresh times I've seen. So I've thought that the
XXms refresh times was for all the rows and that the SPD specs has it per
row, but the explanation above throws that theory out the door. Do you think
it is possible that the SDRAM dimms can have such short refresh times?

See

http://developer.intel.com/technology/memory/pc133sdram/spec/Spdsd12b.pdf

byte 12 for the SPD refresh times.

Also, do those row address bits in above calculation include bits for the
bank selects or is it just the row address bits on the dimm (I guess it's
the latter right?)

--=20

Regards
 Abraham

None love the bearer of bad news.
		-- Sophocles

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 Abraham vd Merwe - 2d3D, Inc.

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