From: Abraham vd M. <ab...@2d...> - 2002-10-14 08:33:01
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Hi! Sorry for the cross post, but I'm not sure if all the BLOB developers are on the linux-arm-kernel mailinglists and this question involves them as well. I've got a StrongARM board with a DIMM on it and I can't figure out how to configure the DRI (see MDREFR register in SA-1110 dev manual) bitfield in the MDREFR. The StrongARM manual talks about ((Tref - Tburst) / rows) / Fmem) / 32 where Tref =3D refresh time of SDRAM Tburst =3D longest burst access in _any_ memory region Fmem =3D memory clock speed. rows =3D row address bits However they don't mention any units. Is Tref in ms? Tburst surely can't be in ms right in which case that equation doesn't make sens Is Fmem in Hz? Does the row address bits include the extra bank select bits or not? In arch/arm/mach-sa1110/cpu-sa1110.c I see that Russel seems to do (Tref >> rows) / 32 where Tref is in clocks which makes sense apart from the bug (it should be / rows, not >> rows) and the fact that it doesn't take burst access into account. The refresh time found in SDRAM SPD's - is that per row or for the whole module? Must be per row, since the longest possible refresh time is 125us. I'd really appreciate it if somebody could shed some light on this. --=20 Regards Abraham Teamwork is essential -- it allows you to blame someone else. __________________________________________________________ Abraham vd Merwe - 2d3D, Inc. Device Driver Development, Outsourcing, Embedded Systems Cell: +27 82 565 4451 Snailmail: Tel: +27 21 761 7549 Block C, Aintree Park Fax: +27 21 761 7648 Doncaster Road Email: ab...@2d... Kenilworth, 7700 Http: http://www.2d3d.com South Africa |