CVS: blob/include/blob sa1100.h,1.2,1.3

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv26723

Modified Files:
	sa1100.h 
Log Message:
our own sa1100.h (created from linux-2.5.26-rmk1); safe to include in assembly now (define __ASSEMBLY__); does not conflict with memsetup.h

Index: sa1100.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/sa1100.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- sa1100.h	7 Nov 2001 12:25:03 -0000	1.2
+++ sa1100.h	25 Jul 2002 17:30:01 -0000	1.3
@@ -1,5 +1,6 @@
 /*
- * sa1100.h: wrapper file to include asm/arch-sa1100/SA-1100.h
+ * sa1100.h: Defines and macros for accessing the SA1100. Created from
+ * the kernel source.
  *
  * Copyright (C) 2001  Erik Mouw (J.A...@it...)
  *
@@ -24,11 +25,1860 @@
 #ifndef BLOB_SA1100_H
 #define BLOB_SA1100_H
 
[...1842 lines suppressed...]
+#define LCCR3_PixRsEdg	(LCCR3_PCP*0)	/*  Pixel clock Rising-Edge        */
+#define LCCR3_PixFlEdg	(LCCR3_PCP*1)	/*  Pixel clock Falling-Edge       */
+#define LCCR3_OEP	0x00800000	/* Output Enable Polarity (L_BIAS, */
+                	        	/* active display mode)            */
+#define LCCR3_OutEnH	(LCCR3_OEP*0)	/*  Output Enable active High      */
+#define LCCR3_OutEnL	(LCCR3_OEP*1)	/*  Output Enable active Low       */
+
+#define CPU_REVISION	(processor_id & 15)
+#define CPU_SA1110_A0	(0)
+#define CPU_SA1110_B0	(4)
+#define CPU_SA1110_B1	(5)
+#define CPU_SA1110_B2	(6)
+#define CPU_SA1110_B4	(8)
+
+#define CPU_SA1100_ID	(0x4401a110)
+#define CPU_SA1100_MASK	(0xfffffff0)
+#define CPU_SA1110_ID	(0x6901b110)
+#define CPU_SA1110_MASK	(0xfffffff0)
 
 #endif