CVS: blob/include/blob/arch badge4.h,1.6,1.7

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/include/blob/arch
In directory usw-pr-cvs1:/tmp/cvs-serv8216/include/blob/arch

Modified Files:
	badge4.h 
Log Message:
add i2c_probe
fix badge4 initialization to fetch the SDRAM info out of the SPD
add i2c.c and i2c-gpio.c to lib build
remove ide.c and pcmcia.c from lib build (currently broken)
switch initial terminal baud to whatever is in arch header



Index: badge4.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/arch/badge4.h,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- badge4.h	27 Feb 2002 18:41:48 -0000	1.6
+++ badge4.h	27 Apr 2002 00:55:04 -0000	1.7
@@ -1,7 +1,7 @@
 /*
  * badge4.h: Badge4 specific defines
  *
- * Copyright (C) 2001  Hewlett-Packard Company
+ * Copyright (C) 2001-2002  Hewlett-Packard Company
  * Written by Christopher Hoover <ch...@hp...>
  *
  * $Id$
@@ -27,27 +27,37 @@
 #ifndef BLOB_ARCH_BADGE4_H
 #define BLOB_ARCH_BADGE4_H
 
+#define BADGE4_SA1111_BASE		(0x48000000)
 
+/* GPIOs on the BadgePAD 4 */
+#define BADGE4_GPIO_INT_1111		GPIO_GPIO0   /* SA-1111 IRQ */
+#define BADGE4_GPIO_SDSDA		GPIO_GPIO17  /* SDRAM SPD Data */
+#define BADGE4_GPIO_SDSCL		GPIO_GPIO18  /* SDRAM SPD Clock */
+#define BADGE4_GPIO_SDTYP0		GPIO_GPIO19  /* SDRAM Type Control */
+#define BADGE4_GPIO_SDTYP1		GPIO_GPIO20  /* SDRAM Type Control */
+#define BADGE4_GPIO_PCMEN5V		GPIO_GPIO24  /* 5V power */
+#define BADGE4_GPIO_SA1111_NRST		GPIO_GPIO25  /* SA-1111 nRESET */
+#define BADGE4_GPIO_CLK_1111		GPIO_GPIO27  /* GPIO_32_768kHz */
 
+/* Interrupts on the BadgePAD 4 */
+#define BADGE4_IRQ_GPIO_SA1111		IRQ_GPIO0    /* SA-1111 interrupt */
 
-/* boot CPU speed */
-#define CPU_SPEED		(0x0a)
 
+/* boot CPU speed */
+#define CPU_SPEED		CPU_CORE_SPEED_206mhz
 
 /* serial port */
 #define USE_SERIAL3
 #define TERMINAL_SPEED baud_115200
 
-
 /* GPIO for the LED */
 #define LED_GPIO		(0x00000000) /* No LED */
 
-
+#define SA1111_BASE		BADGE4_SA1111_BASE
 
 /* the base address were BLOB is loaded by the first stage loader */
 #define BLOB_ABS_BASE_ADDR	(0x08000400)  /* sram */
 
-
 /* where do various parts live in RAM */
 #define BLOB_RAM_BASE		(0XC0100000)
 #define KERNEL_RAM_BASE		(0xC0008000)
@@ -61,16 +71,15 @@
 #define PARAM_FLASH_LEN		(0x00002000 * 2)
 #define KERNEL_FLASH_BASE	(PARAM_FLASH_BASE + PARAM_FLASH_LEN)
 #define KERNEL_FLASH_LEN	(0x00010000 * 16)
-#define LOAD_RAMDISK		1 /* load ramdisk into ram */
+#define LOAD_RAMDISK		0 /* load ramdisk into ram */
 #define RAMDISK_FLASH_BASE	(KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
 #define RAMDISK_FLASH_LEN	(0x00010000 * 47)
 
-#define PARAM_START PARAM_FLASH_BASE
-#define PARAM_LEN PARAM_FLASH_LEN
+#define PARAM_START		PARAM_FLASH_BASE
+#define PARAM_LEN		PARAM_FLASH_LEN
 
 /* the position of the kernel boot parameters */
 #define BOOT_PARAMS		(0xc0000100)
-
 
 /* the size (in kbytes) to which the compressed ramdisk expands */
 #define RAMDISK_SIZE		(8 * 1024)