CVS: blob/src/blob memsetup-sa1110.S,1.12,1.13 start-sa11x0.S,1.2,1.3

[Tim R. <tim...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv18160/src/blob

Modified Files:
	memsetup-sa1110.S start-sa11x0.S 
Log Message:
suspend/resume is broken, some fixes from Lineo

Index: memsetup-sa1110.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/memsetup-sa1110.S,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -d -r1.12 -r1.13
--- memsetup-sa1110.S	12 Feb 2002 00:03:50 -0000	1.12
+++ memsetup-sa1110.S	19 Apr 2002 20:01:36 -0000	1.13
@@ -72,6 +72,12 @@
 	.long	MSC2_VALUE		/* 0x2C MSC2 */
 	.long	SMCNFG_VALUE		/* 0x30 SMCNFG */
 
+PWR_BASE:	.long	0x90020000
+#define PSSR	0x04
+#define PSPR	0x08
+#define PPCR	0x14
+#define POSR	0x1C
+
 .globl memsetup
 memsetup:
 	mov r5, lr
@@ -101,6 +107,25 @@
 	ldr	r2, [r1, #MDCAS22 ]
 	str	r2, [r0, #MDCAS22 ]
 
+	/*
+	 * Refer to sections 9.5.3.7: Reviving DRAMS from Self-Refresh Mode
+	 * and 10.2.1: Hardware or Sleep Reset Procedures
+	 */
+	/* Step 1: Complete a power-on wait period (typically 100-200 usec)
+	 * to allow clocks to come up to speed */
+	mov	r4, #0x2000        /* DDD: way longer than 200 usec */
+spin:	subs	r4, r4, #1
+	bne	spin
+
+	/* Step 2 is for systems with SMROM, so we'll skip it. */
+
+	/* Step 3: clear DH
+	 * NOTE: do NOT clear SSS, the kernel wants it set */
+	ldr	r1, PWR_BASE
+	mov	r2, #0x08          /* PSSR_DH */
+	str	r2, [r1, #PSSR]    /* clear DH by writing 1 to it */
+
+
 #ifdef MDREFR_DONT_BELIEVE_IN_MAGIC
 	ldr	r2, [r1, #MDREFR ]
 	str	r2, [r0, #MDREFR ]
@@ -110,6 +135,8 @@
 	bic r2, r2, #MDREFR_K0DB2
 	bic r2, r2, #MDREFR_K1DB2
 	bic r2, r2, #MDREFR_K2DB2
+	bic r2, r2, #0xff          /* clear TRASR and DRI */
+	bic r2, r2, #0xff00
 	str r2, [ r0, #MDREFR ]
 
 	/* set TRASR and DRI, KxDB2 */

Index: start-sa11x0.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/start-sa11x0.S,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- start-sa11x0.S	18 Jan 2002 22:32:00 -0000	1.2
+++ start-sa11x0.S	19 Apr 2002 20:01:36 -0000	1.3
@@ -50,6 +50,7 @@
 #define PSSR	0x04
 #define PSPR	0x08
 #define PPCR	0x14
+#define POSR	0x1C
 	
 RST_BASE:	.word	0x90030000
 #define RCSR	0x04
@@ -82,29 +83,32 @@
 	ldr	r1, cpuspeed
 	str	r1, [r0, #PPCR]
 
-
-	/* init LED */
-	bl	ledinit
-
-	/* setup memory */
-	bl	memsetup
-
 	/* check if this is a wake-up from sleep */
 	ldr	r0, RST_BASE
 	ldr	r1, [r0, #RCSR]
 	and	r1, r1, #0x0f
-	teq	r1, #0x08
-	bne	real_reset	/* no, continue booting */
+	tst	r1, #0x08	/* check the Sleep Mode Reset bit */
+	beq	real_reset	/* no, continue booting */
+
+	/* Wait for the oscillator to stabilize */
+	ldr	r0, PWR_BASE
+wait_for_OOK:
+	ldr	r1, [r0, #POSR]
+	tst	r1, #1		/* test Oscillator OK bit */
+	beq	wait_for_OOK
 
 	/* yes, a wake-up. clear RCSR by writing a 1 (see 9.6.2.1 from [1]) */
+	ldr	r0, RST_BASE
 	mov	r1, #0x08
 	str	r1, [r0, #RCSR]	;
 
+	/* setup memory */
+	bl	memsetup
+	
 	/* handle Power Manager Sleep Status Register (PSSR)
 	 * see 9.5.7.5 from [1]*/
+	ldr	r0, PWR_BASE
 	ldr r1, [r0, #PSSR]
-	/* clear DH bit, brings out DRAM from self-refresh */
-	orr r1, r1, #0x08
 	/* clear PH bit, bring periperal pins out from sleep state */
 	orr r1, r1, #0x10
 	str r1, [r0, #PSSR]
@@ -114,7 +118,14 @@
 	ldr	r1, [r0, #PSPR]
 	mov	pc, r1
 
+	
 real_reset:
+	/* init LED */
+	bl	ledinit
+
+	/* setup memory */
+	bl	memsetup
+
 	/* turn off the LED. if it stays off it is an indication that
 	 * we didn't make it into the C code */
 	bl led_off