CVS: blob/src/blob idr.c,1.4,1.5

[Tim R. <tim...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv4728/src/blob

Modified Files:
	idr.c 
Log Message:
init sa1111 and enable flash writes

Index: idr.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/idr.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- idr.c	2002/01/03 16:07:17	1.4
+++ idr.c	2002/01/20 05:15:54	1.5
@@ -28,6 +28,8 @@
 #include <blob/flash.h>
 #include <blob/init.h>
 #include <blob/serial.h>
+#include <blob/sa1100.h>
+#include <blob/sa1111.h>
 
 /* flash descriptor for IDR flash */
 /* 1x Intel 28F128J3A strataflash (16MB) */
@@ -42,6 +44,56 @@
 		/* NULL block */
 	},
 };
+
+static void sa1111_init()
+{
+	/* switch on clock for sa1111 */
+	GAFR |= GPIO_32_768kHz;
+	GPDR |= GPIO_32_768kHz;
+	TUCR = TUCR_3_6864MHz;
+
+	/* Now, set up the PLL and RCLK in the SA-1111: */
+	SBI_SKCR = SKCR_PLL_BYPASS | SKCR_RDYEN | SKCR_OE_EN;
+	msleep(100);
+	SBI_SKCR = SKCR_PLL_BYPASS | SKCR_RCLKEN | SKCR_RDYEN | SKCR_OE_EN;
+
+	SerialOutputString( "SA1111 ID: " );
+	SerialOutputHex( SBI_SKID );
+	SerialOutputString( "\n" );
+
+	/*
+	 * SA-1111 Register Access Bus should now be available. Clocks for
+	 * any other SA-1111 functional blocks must be enabled separately
+	 * using the SKPCR.
+	 */
+	SKPCR |= SKPCR_DCLKEN | SKPCR_PWMCLKEN;
+
+	/*
+	 * If the system is going to use the SA-1111 DMA engines, set up
+	 * the memory bus request/grant pins. Also configure the shared
+	 * memory controller on the SA-1111 (SA-1111 Developer's Manual,
+	 * section 3.2.3) and power up the DMA bus clock:
+	 */
+	GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
+	GPDR |= GPIO_MBGNT;
+	GPDR &= ~GPIO_MBREQ;
+	TUCR |= TUCR_MR;
+
+	SBI_SMCR = (SMCR_DTIM | SMCR_MBGE |
+		FInsrt(FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), SMCR_DRAC) |
+		((FExtr(MDCNFG, MDCNFG_SA1110_TDL0)==3) ? SMCR_CLAT : 0));
+
+	/*
+	 * flash_enable on GPIO_A2
+	 * since we are planning jffs2, flash_enable should always be set. but
+	 * there is no accounting for taste. Tim Riker <Ti...@Ri...>
+	 */
+	PA_DDR &= ~(GPIO_GPIO2);
+	PA_DWR |= GPIO_GPIO2;
+}
+
+__initlist(sa1111_init,		INIT_LEVEL_INITIAL_HARDWARE);
+
 
 static void init_idr_flash_driver(void)
 {