From: Stefan E. <se...@us...> - 2001-11-15 11:56:23
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Update of /cvsroot/blob/blob/src/blob In directory usw-pr-cvs1:/tmp/cvs-serv30276 Modified Files: start.S Log Message: - handle PSSR register (hplefully) correctly now. Clear DH and PH bits when sleep wakeup is detected. Index: start.S =================================================================== RCS file: /cvsroot/blob/blob/src/blob/start.S,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- start.S 2001/11/04 23:18:05 1.5 +++ start.S 2001/11/15 11:56:20 1.6 @@ -64,6 +64,7 @@ #define ICMR 0x04 PWR_BASE: .word 0x90020000 +#define PSSR 0x04 #define PSPR 0x08 #define PPCR 0x14 @@ -110,6 +111,15 @@ /* yes, a wake-up. clear RCSR by writing a 1 (see 9.6.2.1 from [1]) */ mov r1, #0x08 str r1, [r0, #RCSR] ; + + /* handle Power Manager Sleep Status Register (PSSR) + * see 9.5.7.5 from [1]*/ + ldr r1, [r0, #PSSR] + /* clear DH bit, brings out DRAM from self-refresh */ + orr r1, r1, #0x08 + /* clear PH bit, bring periperal pins out from sleep state */ + orr r1, r1, #0x10 + str r1, [r0, #PSSR] /* get the value from the PSPR and jump to it */ ldr r0, PWR_BASE |