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CVS: blob/src/blob assabet.c,1.2,1.3 brutus.c,1.2,1.3 clart.c,1.2,1.3 lart.c,1.2,1.3 nesa.c,1.2,1.3 pleb.c,1.2,1.3 shannon.c,1.2,1.3 system3.c,1.2,1.3
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From: Erik M. <er...@us...> - 2001-10-21 21:38:37
|
Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv17396
Modified Files:
assabet.c brutus.c clart.c lart.c nesa.c pleb.c shannon.c
system3.c
Log Message:
The architectures now use the new flash driver functionality.
This greatly reduces the amount of code replication.
(Ok now, Russ?)
Index: assabet.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/assabet.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- assabet.c 2001/10/15 21:54:17 1.2
+++ assabet.c 2001/10/21 21:38:34 1.3
@@ -25,15 +25,15 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
-#include <blob/util.h>
+#include <blob/init.h>
+
+
/* flash descriptor for Assabet flash */
/* 2x Intel 28F128J3A strataflash (16MB) */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t assabet_flash_descriptors[] =
{
{
size: 2 * 128 * 1024,
@@ -47,81 +47,11 @@
-
-/* flash commands for two 16 bit intel flash chips */
-#define READ_ARRAY 0x00FF00FF
-#define ERASE_SETUP 0x00200020
-#define ERASE_CONFIRM 0x00D000D0
-#define PGM_SETUP 0x00400040
-#define STATUS_READ 0x00700070
-#define STATUS_CLEAR 0x00500050
-#define STATUS_BUSY 0x00800080
-#define STATUS_ERASE_ERR 0x00200020
-#define STATUS_PGM_ERR 0x00100010
-
-
-
-int erase_flash(u32 *addr)
+static void init_assabet_flash_driver(void)
{
- u32 result;
-
- /* prepare for erase */
- *addr = data_to_flash(ERASE_SETUP);
- barrier();
-
- /* erase block */
- *addr = data_to_flash(ERASE_CONFIRM);
- barrier();
-
- /* status check */
- do {
- *addr = data_to_flash(STATUS_READ);
- barrier();
- result = data_from_flash(*addr);
- barrier();
- } while((~result & STATUS_BUSY) != 0);
-
- /* put flash back into Read Array mode */
- *addr = data_to_flash(READ_ARRAY);
- barrier();
-
- if((result & STATUS_ERASE_ERR) != 0)
- return -EFLASHERASE;
-
- return 0;
+ flash_descriptors = assabet_flash_descriptors;
+ flash_driver = &intel32_flash_driver;
}
-
-
-
-int write_flash(u32 *dst, const u32* src)
-{
- u32 result;
-
- /* setup flash for writing */
- *dst = data_to_flash(PGM_SETUP);
- barrier();
-
- /* write data */
- *dst = *src;
- barrier();
-
- /* status check */
- do {
- *dst = data_to_flash(STATUS_READ);
- barrier();
-
- result = data_from_flash(*dst);
- barrier();
- } while((~result & STATUS_BUSY) != 0);
-
- /* put flash back into Read Array mode */
- *dst = data_to_flash(READ_ARRAY);
- barrier();
-
- if(((result & STATUS_PGM_ERR) != 0) || (*dst != *src))
- return -EFLASHPGM;
-
- return 0;
-}
+__initlist(init_assabet_flash_driver, INIT_LEVEL_OTHER_STUFF);
Index: brutus.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/brutus.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- brutus.c 2001/10/15 21:55:38 1.2
+++ brutus.c 2001/10/21 21:38:34 1.3
@@ -25,19 +25,17 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
-#include <blob/util.h>
+#include <blob/init.h>
-#warning "Please verify Brutus flash layout"
/* flash descriptor for Brutus flash. */
/* I have *really* no idea what kind of flash Brutus uses */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t brutus_flash_descriptors[] =
{
+#warning "Please verify Brutus flash layout"
{
/* NULL block */
},
@@ -45,19 +43,12 @@
-
-#warning "Please verify Brutus flash functions"
-int erase_flash(u32 *addr)
+static void init_brutus_flash_driver(void)
{
- return -EFLASHERASE;
+ flash_descriptors = brutus_flash_descriptors;
+#warning "Please add a proper Brutus flash driver"
+ flash_driver = &null_flash_driver;
}
-
-
-
-/* write a flash block at a given location */
-int write_flash(u32 *dst, const u32* src)
-{
- return -EFLASHPGM;
-}
+__initlist(init_brutus_flash_driver, INIT_LEVEL_OTHER_STUFF);
Index: clart.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/clart.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- clart.c 2001/10/15 21:54:17 1.2
+++ clart.c 2001/10/21 21:38:34 1.3
@@ -25,17 +25,15 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
-#include <blob/util.h>
+#include <blob/init.h>
/* flash descriptor for CreditLART flash */
/* 1x Intel 28F256J3A strataflash (16MB) */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t clart_flash_descriptors[] =
{
{
size: 128 * 1024,
@@ -49,85 +47,11 @@
-
-/* flash commands for a single 16 bit intel flash chip */
-#define READ_ARRAY 0x000000FF
-#define ERASE_SETUP 0x00000020
-#define ERASE_CONFIRM 0x000000D0
-#define PGM_SETUP 0x00000040
-#define STATUS_READ 0x00000070
-#define STATUS_CLEAR 0x00000050
-#define STATUS_BUSY 0x00000080
-#define STATUS_ERASE_ERR 0x00000020
-#define STATUS_PGM_ERR 0x00000010
-
-
-
-
-/* the next two functions should work for all Intel flashes */
-/* erases a flash block at the given address */
-int erase_flash(u32 *addr)
+static void init_clart_flash_driver(void)
{
- u32 result;
-
- /* prepare for erase */
- *addr = data_to_flash(ERASE_SETUP);
- barrier();
-
- /* erase block */
- *addr = data_to_flash(ERASE_CONFIRM);
- barrier();
-
- /* status check */
- do {
- *addr = data_to_flash(STATUS_READ);
- barrier();
- result = data_from_flash(*addr);
- barrier();
- } while((~result & STATUS_BUSY) != 0);
-
- /* put flash back into Read Array mode */
- *addr = data_to_flash(READ_ARRAY);
- barrier();
-
- if((result & STATUS_ERASE_ERR) != 0)
- return -EFLASHERASE;
-
- return 0;
+ flash_descriptors = clart_flash_descriptors;
+ flash_driver = &intel16_flash_driver;
}
-
-
-
-
-/* write a flash block at a given location */
-int write_flash(u32 *dst, const u32* src)
-{
- u32 result;
-
- /* setup flash for writing */
- *dst = data_to_flash(PGM_SETUP);
- barrier();
-
- /* write data */
- *dst = *src;
- barrier();
-
- /* status check */
- do {
- *dst = data_to_flash(STATUS_READ);
- barrier();
-
- result = data_from_flash(*dst);
- barrier();
- } while((~result & STATUS_BUSY) != 0);
-
- /* put flash back into Read Array mode */
- *dst = data_to_flash(READ_ARRAY);
- barrier();
- if(((result & STATUS_PGM_ERR) != 0) || (*dst != *src))
- return -EFLASHPGM;
-
- return 0;
-}
+__initlist(init_clart_flash_driver, INIT_LEVEL_OTHER_STUFF);
Index: lart.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/lart.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- lart.c 2001/10/15 21:54:17 1.2
+++ lart.c 2001/10/21 21:38:34 1.3
@@ -25,17 +25,15 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
-#include <blob/util.h>
+#include <blob/init.h>
/* flash descriptor for LART flash */
/* 2x Intel 28F160F3B fast boot block flash (4MB) */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t lart_flash_descriptors[] =
{
{
size: 2 * 8 * 1024,
@@ -58,83 +56,16 @@
-/* flash commands for two 16 bit intel flash chips */
-#define READ_ARRAY 0x00FF00FF
-#define ERASE_SETUP 0x00200020
-#define ERASE_CONFIRM 0x00D000D0
-#define PGM_SETUP 0x00400040
-#define STATUS_READ 0x00700070
-#define STATUS_CLEAR 0x00500050
-#define STATUS_BUSY 0x00800080
-#define STATUS_ERASE_ERR 0x00200020
-#define STATUS_PGM_ERR 0x00100010
-
-
-
-
-/* the next two functions should work for all Intel flashes */
-
-/* erases a flash block at the given address */
-int erase_flash(u32 *addr)
+static void init_lart_flash_driver(void)
{
- u32 result;
-
- /* prepare for erase */
- *addr = data_to_flash(ERASE_SETUP);
- barrier();
-
- /* erase block */
- *addr = data_to_flash(ERASE_CONFIRM);
- barrier();
-
- /* status check */
- do {
- *addr = data_to_flash(STATUS_READ);
- barrier();
- result = data_from_flash(*addr);
- barrier();
- } while((~result & STATUS_BUSY) != 0);
-
- /* put flash back into Read Array mode */
- *addr = data_to_flash(READ_ARRAY);
- barrier();
-
- if((result & STATUS_ERASE_ERR) != 0)
- return -EFLASHERASE;
+ /* we could do funky detection over here, because the LART can
+ * have both internal and external flash with different
+ * properties. for the time being we just ignore that fact.
+ * -- Erik
+ */
- return 0;
+ flash_descriptors = lart_flash_descriptors;
+ flash_driver = &intel32_flash_driver;
}
-
-
-/* write a flash block at a given location */
-int write_flash(u32 *dst, const u32* src)
-{
- u32 result;
-
- /* setup flash for writing */
- *dst = data_to_flash(PGM_SETUP);
- barrier();
-
- /* write data */
- *dst = *src;
- barrier();
-
- /* status check */
- do {
- *dst = data_to_flash(STATUS_READ);
- barrier();
-
- result = data_from_flash(*dst);
- barrier();
- } while((~result & STATUS_BUSY) != 0);
-
- /* put flash back into Read Array mode */
- *dst = data_to_flash(READ_ARRAY);
- barrier();
-
- if(((result & STATUS_PGM_ERR) != 0) || (*dst != *src))
- return -EFLASHPGM;
-
- return 0;
-}
+__initlist(init_lart_flash_driver, INIT_LEVEL_OTHER_STUFF);
Index: nesa.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/nesa.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- nesa.c 2001/10/15 21:56:37 1.2
+++ nesa.c 2001/10/21 21:38:34 1.3
@@ -25,20 +25,17 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
-#include <blob/util.h>
-
+#include <blob/init.h>
-#warning "Please fix NESA flash descriptor"
/* flash descriptor for NESA flash */
/* 2x AMD *whatever* flash (4MB) */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t nesa_flash_descriptors[] =
{
+#warning "Please fix NESA flash descriptor"
{
size: 2 * 8 * 1024,
num: 8,
@@ -55,154 +52,10 @@
-/* flash commands for two 16 bit AMD flash chips */
-#define READ_ARRAY 0x00F000F0
-#define UNLOCK1 0x00AA00AA
-#define UNLOCK2 0x00550055
-#define ERASE_SETUP 0x00800080
-#define ERASE_CONFIRM 0x00300030
-#define PGM_SETUP 0x00A000A0
-#define UNLOCK_BYPASS 0x00200020
-#define FLASH_ADDR1 (0x00000555 << 2)
-#define FLASH_ADDR2 (0x000002AA << 2)
-#define ERASE_DONE 0x00800080
-#define RDY_MASK 0x00800080
-#define STATUS_PGM_ERR 0x00200020
-#define STATUS_ERASE_ERR 0x00000001
-
-#define READY 1
-#define ERR 2
-
-
-
-
-#warning "Please check NESA flash code"
-
-/* the next two functions should work for all 2x 16 bit AMD flashes */
-
-int erase_flash(u32 *addr)
+static void init_nesa_flash_driver(void)
{
- u32 result;
- int chip1, chip2;
-
- /* prepare for erase */
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
- barrier();
- *(u32 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
- barrier();
- *(u32 *)FLASH_ADDR1 = data_to_flash(ERASE_SETUP);
- barrier();
-
- /* erase command */
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
- barrier();
- *(u32 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
- barrier();
- *addr = data_to_flash(ERASE_CONFIRM);
-
- /* I just can't find clean ways of dealing with this flash...
- * The error bit is a *set* bit, so if its read, and bit 7 is 0,
- * but bit 5 is 1, its an error, however, after these status reads
- * are done, erased flash goes to 0xff...sooo...each chip has to
- * be caught where the bits are the status bits -- Russ */
-
- /* Russ, why don't you do this like the LART does? Just check
- * the status of chips with a single compare. -- Erik */
- chip1 = chip2 = 0;
-
- do {
- result = data_from_flash(*addr);
- barrier();
-
- if (!chip1 && (result & 0xFFFF) & ERASE_DONE)
- chip1 = READY;
-
- if (!chip1 && (result & 0xFFFF) & STATUS_PGM_ERR)
- chip1 = ERR;
-
- if (!chip2 && (result >> 16) & ERASE_DONE)
- chip2 = READY;
-
- if (!chip2 && (result >> 16) & STATUS_PGM_ERR)
- chip2 = ERR;
-
- } while(!chip1 || !chip2);
-
- /* put flash back into Read Array mode */
- *(u32 *)FLASH_ADDR1 = data_to_flash(READ_ARRAY);
- barrier();
-
- if (chip1 == ERR || chip2 == ERR)
- return -EFLASHERASE;
-
- return 0;
+ flash_descriptors = nesa_flash_descriptors;
+ flash_driver = &amd32_flash_driver;
}
-
-
-
-
-int write_flash(u32 *dst, const u32* src)
-{
- u32 result;
- int chip1, chip2;
-
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
- barrier();
- *(u32 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
- barrier();
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK_BYPASS);
- barrier();
-
- *dst = data_to_flash(PGM_SETUP);
- barrier();
- *dst = *src;
- barrier();
-
- /* This is a pretty similar situation to the erasing status below
- * Bit 7 is ~(data bit 7) until the flash is complete. If bit 5
- * gets set before this happens, there is an error, but this could
- * happen near the clock edge, and bit 5 could be the actual data
- * before bit 7 changes, so we have to read again. -- Russ
- */
-
- chip1 = chip2 = 0;
- do {
- result = data_from_flash(*dst);
- barrier();
-
- if (!chip1 && ((result & 0x80) == (*src & 0x80)))
- chip1 = READY;
-
- if (!chip1 && ((result & 0xFFFF) & STATUS_PGM_ERR)) {
- result = data_from_flash(*dst);
- barrier();
-
- if ((result & 0x80) == (*src & 0x80))
- chip1 = READY;
- else
- chip1 = ERR;
- }
-
- if (!chip2 && ((result & (0x80 << 16)) == (*src & (0x80 << 16))))
- chip2 = READY;
-
- if (!chip2 && ((result >> 16) & STATUS_PGM_ERR)) {
- result = data_from_flash(*dst);
- barrier();
-
- if ((result & (0x80 << 16)) == (*src & (0x80 << 16)))
- chip2 = READY;
- else
- chip2 = ERR;
- }
-
- } while (!chip1 || !chip2);
-
- *(u32 *)FLASH_ADDR1 = data_to_flash(READ_ARRAY);
- barrier();
-
- if (chip1 == ERR || chip2 == ERR || *dst != *src)
- return -EFLASHPGM;
- return 0;
-}
+__initlist(init_nesa_flash_driver, INIT_LEVEL_OTHER_STUFF);
Index: pleb.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/pleb.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- pleb.c 2001/10/15 21:56:37 1.2
+++ pleb.c 2001/10/21 21:38:34 1.3
@@ -25,14 +25,13 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
#include <blob/init.h>
#include <blob/led.h>
-#include <blob/util.h>
+
+
/* the LED should always be on or otherwise the serial transmitter
* doesn't work
*/
@@ -43,17 +42,17 @@
led_lock();
}
+
/* do this just after the initial hardware has been initialised */
__initlist(lock_pleb_led, INIT_LEVEL_INITIAL_HARDWARE + 1);
-#warning "Please verify PLEB flash layout"
-
/* flash descriptor for PLEB flash. */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t pleb_flash_descriptors[] =
{
+#warning "Please add PLEB flash layout"
{
/* NULL block */
},
@@ -62,17 +61,11 @@
-#warning "Please verify PLEB flash functions"
-
-int erase_flash(u32 *addr)
+static void init_pleb_flash_driver(void)
{
- return -EFLASHERASE;
+ flash_descriptors = pleb_flash_descriptors;
+#warning "Please add a proper PLEB flash driver"
+ flash_driver = &null_flash_driver;
}
-
-
-/* write a flash block at a given location */
-int write_flash(u32 *dst, const u32* src)
-{
- return -EFLASHPGM;
-}
+__initlist(init_pleb_flash_driver, INIT_LEVEL_OTHER_STUFF);
Index: shannon.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/shannon.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- shannon.c 2001/10/15 21:56:37 1.2
+++ shannon.c 2001/10/21 21:38:34 1.3
@@ -25,20 +25,17 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
-#include <blob/util.h>
-
+#include <blob/init.h>
-#warning "Please fix SHANNON flash descriptor"
/* flash descriptor for SHANNON flash */
/* 2x AMD *whatever* flash (4MB) */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t shannon_flash_descriptors[] =
{
+#warning "Please fix SHANNON flash descriptor"
{
size: 2 * 8 * 1024,
num: 8,
@@ -54,153 +51,11 @@
-
-/* flash commands for two 16 bit AMD flash chips */
-#define READ_ARRAY 0x00F000F0
-#define UNLOCK1 0x00AA00AA
-#define UNLOCK2 0x00550055
-#define ERASE_SETUP 0x00800080
-#define ERASE_CONFIRM 0x00300030
-#define PGM_SETUP 0x00A000A0
-#define UNLOCK_BYPASS 0x00200020
-#define FLASH_ADDR1 (0x00000555 << 2)
-#define FLASH_ADDR2 (0x000002AA << 2)
-#define ERASE_DONE 0x00800080
-#define RDY_MASK 0x00800080
-#define STATUS_PGM_ERR 0x00200020
-#define STATUS_ERASE_ERR 0x00000001
-
-#define READY 1
-#define ERR 2
-
-
-
-#warning "Please check SHANNON flash code"
-
-int erase_flash(u32 *addr)
+static void init_shannon_flash_driver(void)
{
- u32 result;
- int chip1, chip2;
-
- /* prepare for erase */
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
- barrier();
- *(u32 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
- barrier();
- *(u32 *)FLASH_ADDR1 = data_to_flash(ERASE_SETUP);
- barrier();
-
- /* erase command */
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
- barrier();
- *(u32 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
- barrier();
- *addr = data_to_flash(ERASE_CONFIRM);
-
- /* I just can't find clean ways of dealing with this flash...
- * The error bit is a *set* bit, so if its read, and bit 7 is 0,
- * but bit 5 is 1, its an error, however, after these status reads
- * are done, erased flash goes to 0xff...sooo...each chip has to
- * be caught where the bits are the status bits -- Russ */
-
- /* Russ, why don't you do this like the LART does? Just check
- * the status of chips with a single compare. -- Erik */
- chip1 = chip2 = 0;
-
- do {
- result = data_from_flash(*addr);
- barrier();
-
- if (!chip1 && (result & 0xFFFF) & ERASE_DONE)
- chip1 = READY;
-
- if (!chip1 && (result & 0xFFFF) & STATUS_PGM_ERR)
- chip1 = ERR;
-
- if (!chip2 && (result >> 16) & ERASE_DONE)
- chip2 = READY;
-
- if (!chip2 && (result >> 16) & STATUS_PGM_ERR)
- chip2 = ERR;
-
- } while(!chip1 || !chip2);
-
- /* put flash back into Read Array mode */
- *(u32 *)FLASH_ADDR1 = data_to_flash(READ_ARRAY);
- barrier();
-
- if (chip1 == ERR || chip2 == ERR)
- return -EFLASHERASE;
-
- return 0;
+ flash_descriptors = shannon_flash_descriptors;
+ flash_driver = &amd32_flash_driver;
}
-
-
-
-
-int write_flash(u32 *dst, const u32* src)
-{
- u32 result;
- int chip1, chip2;
-
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK1);
- barrier();
- *(u32 *)FLASH_ADDR2 = data_to_flash(UNLOCK2);
- barrier();
- *(u32 *)FLASH_ADDR1 = data_to_flash(UNLOCK_BYPASS);
- barrier();
-
- *dst = data_to_flash(PGM_SETUP);
- barrier();
- *dst = *src;
- barrier();
-
- /* This is a pretty similar situation to the erasing status below
- * Bit 7 is ~(data bit 7) until the flash is complete. If bit 5
- * gets set before this happens, there is an error, but this could
- * happen near the clock edge, and bit 5 could be the actual data
- * before bit 7 changes, so we have to read again. -- Russ
- */
- chip1 = chip2 = 0;
- do {
- result = data_from_flash(*dst);
- barrier();
-
- if (!chip1 && ((result & 0x80) == (*src & 0x80)))
- chip1 = READY;
-
- if (!chip1 && ((result & 0xFFFF) & STATUS_PGM_ERR)) {
- result = data_from_flash(*dst);
- barrier();
-
- if ((result & 0x80) == (*src & 0x80))
- chip1 = READY;
- else
- chip1 = ERR;
- }
-
- if (!chip2 && ((result & (0x80 << 16)) == (*src & (0x80 << 16))))
- chip2 = READY;
-
- if (!chip2 && ((result >> 16) & STATUS_PGM_ERR)) {
- result = data_from_flash(*dst);
- barrier();
-
- if ((result & (0x80 << 16)) == (*src & (0x80 << 16)))
- chip2 = READY;
- else
- chip2 = ERR;
- }
-
- } while (!chip1 || !chip2);
-
- *(u32 *)FLASH_ADDR1 = data_to_flash(READ_ARRAY);
- barrier();
-
- if (chip1 == ERR || chip2 == ERR || *dst != *src)
- return -EFLASHPGM;
-
- return 0;
-}
+__initlist(init_shannon_flash_driver, INIT_LEVEL_OTHER_STUFF);
Index: system3.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/system3.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- system3.c 2001/10/15 21:56:37 1.2
+++ system3.c 2001/10/21 21:38:34 1.3
@@ -25,19 +25,17 @@
# include <blob/config.h>
#endif
-#include <blob/arch.h>
-#include <blob/errno.h>
#include <blob/flash.h>
-#include <blob/util.h>
+#include <blob/init.h>
-#warning "Please verify System3 flash layout"
/* flash descriptor for System3 flash. */
/* I have *really* no idea what kind of flash System3 uses */
-flash_descriptor_t flash_descriptors[] =
+static flash_descriptor_t system3_flash_descriptors[] =
{
+#warning "Please add System3 flash layout"
{
/* NULL block */
},
@@ -45,19 +43,12 @@
-
-#warning "Please verify System3 flash functions"
-int erase_flash(u32 *addr)
+static void init_system3_flash_driver(void)
{
- return -EFLASHERASE;
+ flash_descriptors = system3_flash_descriptors;
+#warning "Please add a proper System3 flash driver"
+ flash_driver = &null_flash_driver;
}
-
-
-
-/* write a flash block at a given location */
-int write_flash(u32 *dst, const u32* src)
-{
- return -EFLASHPGM;
-}
+__initlist(init_system3_flash_driver, INIT_LEVEL_OTHER_STUFF);
|
