Re: CVS: blob/src/blob nesa.c,1.1,1.2 pleb.c,1.1,1.2 shannon.c,1.1,1.2 system3.c,1.1,1.2

[Erik M. <J.A...@IT...>]

On Mon, Oct 15, 2001 at 03:05:52PM -0700, Russ Dill wrote:
> You should really break this out a bit more, as both the nesa and
> shannon have identical flash (probably true with other platforms as
> well). Maybe there should be an amd.c, and an intel.c. Each would
> contain functions for erasing and writing the flash. <arch.c> would set
> the proper write function, as well as an optional read32/write32 (for
> plaiting). If no erase/write function was set, then flashing would barf.

Well, yes and no. The Intel flashes should be easy to do, because 1x 16
bit and 2x 16 bit flashes can be done with the same code (only the
commands and error codes differ).

Looking at your comments in the code, the AMD flashes are a bit more
difficult to handle, so I doubt it's really worth it. I really want to
avoid recreating the complete MTD functionality in blob.

Anyway, at least it cleans up the flash code a lot, and I'll clean it
up even more when I start implementing the flash partitioning.


Erik

-- 
J.A.K. (Erik) Mouw, Information and Communication Theory Group, Department
of Electrical Engineering, Faculty of Information Technology and Systems,
Delft University of Technology, PO BOX 5031,  2600 GA Delft, The Netherlands
Phone: +31-15-2783635  Fax: +31-15-2781843  Email: J.A...@it...
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