blob/src memsetup-sa1100.S,1.2,1.3 start.S,1.3,1.4

[Erik M. <er...@us...>]

Update of /cvsroot/blob/blob/src
In directory usw-pr-cvs1:/tmp/cvs-serv22024

Modified Files:
	memsetup-sa1100.S start.S 
Log Message:
From Adam Wiggins: fix PLEB memory setup code


Index: memsetup-sa1100.S
===================================================================
RCS file: /cvsroot/blob/blob/src/memsetup-sa1100.S,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- memsetup-sa1100.S	2001/09/23 15:01:18	1.2
+++ memsetup-sa1100.S	2001/10/04 12:16:37	1.3
@@ -77,10 +77,10 @@
 #endif
 
 #if defined PLEB
-mdcas0:		.long	0x1c71c01f
-mdcas1:		.long	0xff1c71c7
+mdcas0:		.long	0x8e38e01f
+mdcas1:		.long	0xff8e38e3
 mdcas2:		.long	0xffffffff
-mdcnfg:		.long	0x0c7f3ca3
+mdcnfg:		.long	0x0bb2bcbf
 mcs0:		.long	0xfff8fff8
 #endif
 

Index: start.S
===================================================================
RCS file: /cvsroot/blob/blob/src/start.S,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- start.S	2001/10/03 17:18:13	1.3
+++ start.S	2001/10/04 12:16:37	1.4
@@ -75,9 +75,10 @@
 /* The initial CPU speed. Note that the SA11x0 CPUs can be safely overclocked:
  * 190 MHz CPUs are able to run at 221 MHz, 133 MHz CPUs can do 206 Mhz.
  */
-#if (defined ASSABET) || (defined CLART) || (defined LART) \
-	|| (defined NESA) || (defined NESA)
+#if (defined ASSABET) || (defined CLART) || (defined LART) || (defined NESA)
 cpuspeed:	.long	0x0b	/* 221 MHz */
+#elif defined PLEB
+cpuspeed:      .long   0x0a    /* 206.4 MHz */
 #elif defined SHANNON
 cpuspeed:	.long	0x09	/* 191.7 MHz */
 #else