blob/src memsetup.S,1.1.2.3,1.1.2.4

[Russ D. <ru...@us...>]

Update of /cvsroot/blob/blob/src
In directory usw-pr-cvs1:/tmp/cvs-serv8637

Modified Files:
      Tag: blob_1_0_9_hack
	memsetup.S 
Log Message:
Added flash timing for shannon

Index: memsetup.S
===================================================================
RCS file: /cvsroot/blob/blob/src/Attic/memsetup.S,v
retrieving revision 1.1.2.3
retrieving revision 1.1.2.4
diff -u -r1.1.2.3 -r1.1.2.4
--- memsetup.S	2001/07/16 21:41:26	1.1.2.3
+++ memsetup.S	2001/07/28 22:24:04	1.1.2.4
@@ -47,6 +47,7 @@
 #define MDCAS0	0x04
 #define MDCAS1	0x08
 #define MDCAS2	0x0c
+#define MCS0	0x10
 
 
 
@@ -56,6 +57,7 @@
 mdcas1:		.long	0xffc71c71
 mdcas2:		.long	0xffffffff
 mdcnfg:		.long	0x0334b22f
+mcs0:		.long	0xfff8fff8
 #endif
 	
 #if defined PLEB
@@ -63,6 +65,7 @@
 mdcas1:		.long	0xff1c71c7
 mdcas2:		.long	0xffffffff
 mdcnfg:		.long	0x0c7f3ca3
+mcs0:		.long	0xfff8fff8
 #endif
 
 #if defined SHANNON
@@ -70,14 +73,20 @@
 mdcas1:		.long	0xffc71c71
 mdcas2:		.long	0xffffffff
 mdcnfg:		.long	0x0334b21f
+mcs0:		.long	0xfff84458
 #endif
 
 
 .globl memsetup
 memsetup:
 #if defined USE_SA1100
-	/* Set up the DRAM in banks 0 and 1 */
+	/* Setup the flash memory in banks 0 and 1 */
 	ldr	r0, MEM_BASE
+	
+	ldr	r1, mcs0
+	str	r1, [r0, #MCS0]
+	
+	/* Set up the DRAM in banks 0 and 1 */
 	
 	/* MDCAS0 */
 	ldr	r1, mdcas0