blob/src start.S,1.1.1.1.2.14,1.1.1.1.2.15

[Russ D. <ru...@us...>]

Update of /cvsroot/blob/blob/src
In directory usw-pr-cvs1:/tmp/cvs-serv16377

Modified Files:
      Tag: blob_1_0_9_hack
	start.S 
Log Message:
206MHz was getting a crc error, its probably the memory timings, but we'll set it to 191.7Mhz for now

Index: start.S
===================================================================
RCS file: /cvsroot/blob/blob/src/start.S,v
retrieving revision 1.1.1.1.2.14
retrieving revision 1.1.1.1.2.15
diff -u -r1.1.1.1.2.14 -r1.1.1.1.2.15
--- start.S	2001/07/26 08:12:04	1.1.1.1.2.14
+++ start.S	2001/07/26 09:03:47	1.1.1.1.2.15
@@ -79,7 +79,7 @@
 	|| (defined NESA) || (defined NESA)
 cpuspeed:	.long	0x0b	/* 221 MHz */
 #elif defined SHANNON
-cpuspeed:	.long	0x0a	/* 206 MHz */
+cpuspeed:	.long	0x09	/* 191.7 MHz */
 #else
 #warning "FIXME: Include code to use the correct clock speed for your board"
 cpuspeed:	.long	0x05	/* safe 133 MHz speed */