Update of /cvsroot/blob/blob/include/blob
In directory usw-pr-cvs1:/tmp/cvs-serv32716
Modified Files:
memsetup.h
Log Message:
- corrected defines to match chris' recent changes.
NOTE: There seems a bit confusion here. The defines starting
with _ (i.e. _PSSR etc.) are _offsets_ from a base address.
This is to use relative adressing in assembly.
The defines w/o the _ (i.e. PSSR etc.) are _absolute_ physical
adresses.
Index: memsetup.h
===================================================================
RCS file: /cvsroot/blob/blob/include/blob/memsetup.h,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- memsetup.h 26 Jul 2002 07:18:37 -0000 1.10
+++ memsetup.h 2 Oct 2002 11:20:27 -0000 1.11
@@ -36,19 +36,20 @@
* Memory Config Register Indices
* based on 0xA0000000
*/
-#define MDCNFG 0x0
-#define MDCAS00 0x04
-#define MDCAS01 0x08
-#define MDCAS02 0x0c
-#define MCS0 0x10
-#define MCS1 0x14
-#define MECR 0x18
-#define MDREFR 0x1C
-#define MDCAS20 0x20
-#define MDCAS21 0x24
-#define MDCAS22 0x28
-#define MCS2 0x2C
-#define SMCNFG 0x30
+#define MEM_CONF_BASE 0xa0000000
+#define _MDCNFG 0x0
+#define _MDCAS00 0x04
+#define _MDCAS01 0x08
+#define _MDCAS02 0x0c
+#define _MCS0 0x10
+#define _MCS1 0x14
+#define _MECR 0x18
+#define _MDREFR 0x1C
+#define _MDCAS20 0x20
+#define _MDCAS21 0x24
+#define _MDCAS22 0x28
+#define _MCS2 0x2C
+#define _SMCNFG 0x30
/**********************************************************************
* MDCNFG masks
@@ -126,5 +127,26 @@
#define MECR_BSA1(n_) (((n_)&0x1f)<<21)
#define MECR_BSM1(n_) (((n_)&0x1f)<<26)
#define MECR_FAST1 (1<<31)
+
+/**********************************************************************
+ * Power Manager (PM) registers
+ */
+#define PM_BASE 0x90020000 /* PM base */
+#define _PMCR 0x00 /* PM Control Reg. */
+#define _PSSR 0x04 /* PM Sleep Status Reg. */
+#define _PSPR 0x08 /* PM Scratch-Pad Reg. */
+#define _PWER 0x0C /* PM Wake-up Enable Reg. */
+#define _PCFR 0x10 /* PM general ConFiguration Reg. */
+#define _PPCR 0x14 /* PM PLL Configuration Reg. */
+#define _PGSR 0x18 /* PM GPIO Sleep state Reg. */
+#define _POSR 0x1C /* PM Oscillator Status Reg. */
+
+#define PMCR_SF 0x00000001 /* Sleep Force (set only) */
+
+#define PSSR_SS 0x00000001 /* Software Sleep */
+#define PSSR_BFS 0x00000002 /* Battery Fault Status */
+#define PSSR_VFS 0x00000004 /* Vdd Fault Status (VDD_FAULT) */
+#define PSSR_DH 0x00000008 /* DRAM control Hold */
+#define PSSR_PH 0x00000010 /* Peripheral control Hold */
#endif
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