blob-cvs-commit

[Christopher H. <ch...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv8216/src/blob

Modified Files:
	Makefile.am badge4.c initcalls.c 
Log Message:
add i2c_probe
fix badge4 initialization to fetch the SDRAM info out of the SPD
add i2c.c and i2c-gpio.c to lib build
remove ide.c and pcmcia.c from lib build (currently broken)
switch initial terminal baud to whatever is in arch header



Index: Makefile.am
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/Makefile.am,v
retrieving revision 1.28
retrieving revision 1.29
diff -u -d -r1.28 -r1.29
--- Makefile.am	23 Apr 2002 12:36:19 -0000	1.28
+++ Makefile.am	27 Apr 2002 00:55:04 -0000	1.29
@@ -21,7 +21,6 @@
 # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 #
 
-
 bin_PROGRAMS	= \
 	blob-start-elf32 \
 	blob-start \

Index: badge4.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/badge4.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- badge4.c	13 Feb 2002 00:08:54 -0000	1.6
+++ badge4.c	27 Apr 2002 00:55:04 -0000	1.7
@@ -1,7 +1,7 @@
 /*
  * badge4.c: Badge 4 specific stuff
  *
- * Copyright (C) 2001  Hewlett-Packard Company
+ * Copyright (C) 2001-2002  Hewlett-Packard Company
  * Written by Christopher Hoover <ch...@hp...>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -26,10 +26,30 @@
 # include <blob/config.h>
 #endif
 
+#include <blob/arch/badge4.h>
 #include <blob/flash.h>
 #include <blob/init.h>
 #include <blob/sa1100.h>
 #include <blob/serial.h>
+#include <blob/util.h>
+#include <blob/i2c.h>
+#include <blob/i2c-gpio.h>
+#include <blob/spd.h>
+
+static struct i2c_bus_gpio_private badge4_i2c_bus_gpio_private = {
+	sda_gpio: BADGE4_GPIO_SDSDA,
+	scl_gpio: BADGE4_GPIO_SDSCL,
+	delay: 1000
+};
+
+static struct i2c_bus badge4_i2c_bus = {
+	init_bus: init_bus_gpio,
+	set_sda: set_sda_gpio,
+	get_sda: get_sda_gpio,
+	set_scl: set_scl_gpio,
+	get_scl: get_scl_gpio,
+	private: &badge4_i2c_bus_gpio_private
+};
 
 /* flash descriptor for Badge4 flash */
 /* 1 x Intel 28F320C3BA100 Advanced+ Boot Block Flash (32 Mbit) */
@@ -53,40 +73,35 @@
 	},
 };
 
-
-
-
-static void init_flash_driver(void)
+static void badge4_select_drivers(void)
 {
+	/* select serial driver */
+	serial_driver = &sa11x0_serial_driver;
+
 	flash_descriptors = badge4_flash_descriptors;
 	flash_driver = &intel16_flash_driver;
 }
 
-__initlist(init_flash_driver, INIT_LEVEL_DRIVER_SELECTION);
+__initlist(badge4_select_drivers, INIT_LEVEL_DRIVER_SELECTION);
 
 
-static void init_hardware(void)
+static void badge4_init_sa1111(void)
 {
 	/*
-	 * Grab a paper bag.  This is ugly.
-	 *
 	 * We have to do part of the SA-1111 initialization here.
 	 * Whenever we pull down GPIO_SA1111_NRST (GPIO 25, 1111_RST~
-	 * on the schematic), the DRAM goes to hell as that GPIO is
-	 * also wired into the CPLD that controls the DRAM interface.
-	 * Argh.
+	 * on the schematic), the SDRAM goes away as that gpio is also
+	 * wired into the CPLD that controls the SO-DIMM SDRAM
+	 * interface.  (Argh.)
 	 *
-	 * The only reason the following works is that we're running
-	 * blob out of sram.  (The same kind of thing would also work
-	 * when running out of flash, but there's no good place to
-	 * hook int platform-specific initialization in the blob
-	 * loader in the short window when it is running out of
-	 * flash.  
+	 * The only reason this code runs at all is that we have set
+	 * up blob to run out of SRAM.  Fortunately all BadgePAD 4's
+	 * have SRAM.
 	 */
 
 	/* Asert nRESET. */
-	GPCR = GPIO_GPIO25;
-	GPDR |= GPIO_GPIO25;
+	GPCR = BADGE4_GPIO_SA1111_NRST;
+	GPDR |= BADGE4_GPIO_SA1111_NRST;
 
 	/*
 	 * Set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -97,25 +112,100 @@
 	TUCR = TUCR_3_6864MHz;
 
 	/* De-assert nRESET */
-	GPSR = GPIO_GPIO25;
+	GPSR = BADGE4_GPIO_SA1111_NRST;
 
 	/*
 	 * The SA-1111 initialization is not yet done, but Linux
 	 * can do the rest.
 	 */
+}
+
+static inline int spd_byte(int addr) 
+{
+	return i2c_read_device_byte_at(&badge4_i2c_bus, SPD_I2C_ADDR(0), addr);
+}
+
+static void badge4_setup_sdram(void)
+{
+	int i, size;
+	int typ0, typ1;
+	int memory_type, row_bits, col_bits, row_density;
+
+	/* Intialize the I2C bus and driver. */
+	i2c_init(&badge4_i2c_bus);
+
+	/* Probe for the SPD EEPROM */
+	if (i2c_probe(&badge4_i2c_bus, SPD_I2C_ADDR(0)) != 0) {
+		printf("SDRAM: SDRAM SO-DIMM absent\n");
+		return;
+	}
+
+	/* Read the SPD to determine the SO-DIMM SDRAM parameters. */
+
+	/* quick sanity check */
+	memory_type = spd_byte(SPD_MEMORY_TYPE);
+	if (memory_type != SPD_MEMORY_TYPE_SDRAM) {
+		printf("SDRAM: SDRAM SO-DIMM wrong type (%d)\n", memory_type);
+		goto fail;
+	}
+
+	row_bits = spd_byte(SPD_ROW_BITS);
+	col_bits = spd_byte(SPD_COL_BITS);
+	row_density = spd_byte(SPD_ROW_DENSITY);
+
+	/* calculate the size: bit 0 is 4M, bit 1 is 8M, etc. */
+	size = 0;
+	for (i = 0; i < 8; i++)
+		if (row_density & (1<<i))
+			size += (4<<i);
+
+	printf("SDRAM: %d Mbytes (row bits=%d, col bits=%d)\n", 
+	       size, row_bits, col_bits);
 
 	/*
-	 * GPIO 19 and 20 specify SDRAM "type".
-	 * These settings are for 12 row bits, 9 col bits.
-	 * ### Incorporate SPD code here.
+	 * Here's what the CPLD expects
+	 *
+	 * typ1 typ0	flavor				typical geometry
+	 * 0	0	SO-DIMM with 64 Mbit parts	xx/8
+	 * 0	1	SO-DIMM with 128 Mbit parts	12/9
+	 * 1	0	SO-DIMM with 256 Mbit parts	13/9
 	 */
-	GPSR = GPIO_GPIO19;
-	GPCR = GPIO_GPIO20;
-	GPDR |= (GPIO_GPIO19 | GPIO_GPIO20);
 
-	/* select serial driver */
-	serial_driver = &sa11x0_serial_driver;
-}
+	/* ### should we use the other SPD info or is col/row bits enough? */
+	if (col_bits == 8) {
+		typ1 = 0; typ0 = 0;
+	} else if (row_bits == 12 && col_bits == 9) {
+		typ1 = 0; typ0 = 1;
+	} else if (row_bits == 13 && col_bits == 9) {
+		typ1 = 1; typ0 = 0;
+	} else {
+		printf("SDRAM: unexpected SDRAM geometry\n");
+		goto fail;
+	}
+
+ set:
+	printf("SDRAM: setting type typ1=%d, typ0=%d\n", typ1, typ0);
+	GPDR |= (BADGE4_GPIO_SDTYP0 | BADGE4_GPIO_SDTYP1);
+	if (typ0)
+		GPSR = BADGE4_GPIO_SDTYP0;
+	else
+		GPCR = BADGE4_GPIO_SDTYP0;
+	if (typ1)
+		GPSR = BADGE4_GPIO_SDTYP1;
+	else
+		GPCR = BADGE4_GPIO_SDTYP1;
 
+	return;
 
-__initlist(init_hardware, INIT_LEVEL_DRIVER_SELECTION);
+ fail:
+	printf("SDRAM: making unwarranted assumption that SDRAM is 12x9\n");
+	typ1 = 0; typ0 = 1;
+	goto set;
+}
+
+static void badge4_init_hardware(void)
+{
+	badge4_init_sa1111();
+	badge4_setup_sdram();
+}
+__initlist(badge4_init_hardware, INIT_LEVEL_INITIAL_HARDWARE + 1);

Index: initcalls.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/initcalls.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- initcalls.c	3 Jan 2002 16:07:17 -0000	1.3
+++ initcalls.c	27 Apr 2002 00:55:04 -0000	1.4
@@ -27,6 +27,7 @@
 # include <blob/config.h>
 #endif
 
+#include <blob/arch.h>
 #include <blob/init.h>
 #include <blob/icache.h>
 #include <blob/led.h>
@@ -39,7 +40,7 @@
 /* default serial initialisation */
 static void serial_default_init(void)
 {
-	serial_init(baud_9600);
+	serial_init(TERMINAL_SPEED);
 }