blob-cvs-commit

[Stefan E. <se...@us...>]

Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv14277

Modified Files:
	system3.c 
Log Message:
- pcmcia stuff. This is all a mess, i know. I'll remove dead
  code and clean all up next week. This is just that Tim Riker
  has something to look at :)


Index: system3.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/system3.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- system3.c	13 Feb 2002 00:08:54 -0000	1.10
+++ system3.c	18 Apr 2002 19:55:34 -0000	1.11
@@ -42,22 +42,61 @@
 #include <blob/command.h>
 #include <blob/uucodec.h>
 #include <blob/serial.h>
+#include <blob/time.h>
+
+#include <blob/sa1100.h>
+#include <blob/sa1111.h>
+#include <blob/pcmcia.h>
+#include <blob/ide.h>
 
 /**********************************************************************
  * defines
  */
+#define CONFIG_PCMCIA_SUPPORT
 
 /* this will send a cold shiver through erik's spine ... */
 #define	ERR( x )		{ ret = x; goto DONE; }
 
 /* more readable IMHO */
 #define MEM( x )        (*((u32 *)x))
+#define SET(reg,bit) ((reg) |= (1<<(bit)))
+#define RST(reg,bit) ((reg) &= ~(1<<(bit)))
+
+#define mem_b(adr)  ( ((volatile unsigned char*)0)[adr]          )
+#define mem_w(adr)  ( ((volatile unsigned short int*)0)[(adr)/2] )
+#define mem_dw(adr) ( ((volatile unsigned long*)(0)) [(adr)/4]   )
+
+#if 0
+#define GPDR		(0x90040004)
+#define	GPSR		(0x90040008)
+#define GPCR		(0x9004000c)
+#define GAFR		(0x9004001c)
+#define TUCR		(0x90030008)  /* Test Unit Control Reg. */
+#endif
+
+#define	CF_REG_CFG		(0x200)
+#define CF_CFG_SRST		(0x80)
+#define CF_CFG_LVLREQ	(0x40)
+#define CF_CFG_MMAP		(0x00)
+#define CF_CFG_IOMAP	(0x01)
+#define CF_CFG_IO_IDE0	(0x02)
+#define CF_CFG_IO_IDE1	(0x03)
+
+#define CF_REG_CFGSTAT	(0x202)
+
+#define SYSTEM3_DEBUG 1
+
+#if SYSTEM3_DEBUG
+#	define _DBG( fmt, args... )	printf("%s(): " fmt, __FUNCTION__ , ## args)
+#endif
+
 
 /**********************************************************************
  * globals
  */
 
 extern blob_status_t blob_status;
+static void sa1111_init();
 
 /**********************************************************************
  * module globals
@@ -95,23 +134,230 @@
 	flash_descriptors = system3_flash_descriptors;
 	flash_driver = &intel32_flash_driver;
 }
-
 __initlist(init_system3_flash_driver, INIT_LEVEL_DRIVER_SELECTION);
 
+static void system3_init_hardware(void)
+{
+	/* init on-board CPLD */
+	MEM(SYSTEM3_CTRL_0) = 0x0b;
+	MEM(SYSTEM3_CTRL_1) = 0x00;
+	MEM(SYSTEM3_CTRL_2) = 0x00;
 
+#if 0
+	/* activate SYSCLCK for keyboard controller */
+	SET( MEM(GAFR), 27 );
+	SET( MEM(GPDR), 27 );
 
+	/* 3.6864 MHz SYSCLK */
+	SET( MEM(TUCR), 29 );
+	RST( MEM(TUCR), 30 );
+	RST( MEM(TUCR), 31 );
 
-static void system3_init_hardware(void)
-{
+	msleep( 1 );
+#endif
+
+	//sa1111_init();
+	
+	MEM(SYSTEM3_CTRL_1) = 0x04;
+
+
+	/* tweak blob config */
+	blob_status.boot_delay = 1;
+
+	
 	/* select serial driver */
 	serial_driver = &sa11x0_serial_driver;
 }
-
 __initlist(system3_init_hardware, INIT_LEVEL_DRIVER_SELECTION);
 
+static void sa1111_init()
+{
+
+	_DBG( "%s", "START\n" );
+	_DBG( "%s", "Switch on SYSCLCK 3.6864 MHz\n" );
+	
+	/* switch on clock for sa1111 */
+	GAFR |= GPIO_32_768kHz;
+	GPDR |= GPIO_32_768kHz;
+	TUCR = TUCR_3_6864MHz;
+
+	/* Now, set up the PLL and RCLK in the SA-1111: */
+	SBI_SKCR = SKCR_PLL_BYPASS | SKCR_RDYEN | SKCR_OE_EN;
+	msleep(100);
+	SBI_SKCR = SKCR_PLL_BYPASS | SKCR_RCLKEN | SKCR_RDYEN | SKCR_OE_EN;
+
+	printf( "SA1111 ID: %08x\n", SBI_SKID );
+
+	/*
+	 * SA-1111 Register Access Bus should now be available. Clocks for
+	 * any other SA-1111 functional blocks must be enabled separately
+	 * using the SKPCR.
+	 */
+	SKPCR |= SKPCR_DCLKEN | SKPCR_PWMCLKEN;
+
+	/*
+	 * If the system is going to use the SA-1111 DMA engines, set up
+	 * the memory bus request/grant pins. Also configure the shared
+	 * memory controller on the SA-1111 (SA-1111 Developer's Manual,
+	 * section 3.2.3) and power up the DMA bus clock:
+	 */
+	GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
+	GPDR |= GPIO_MBGNT;
+	GPDR &= ~GPIO_MBREQ;
+	TUCR |= TUCR_MR;
+
+	SBI_SMCR = (SMCR_DTIM | SMCR_MBGE |
+		FInsrt(FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), SMCR_DRAC) |
+		((FExtr(MDCNFG, MDCNFG_SA1110_TDL0)==3) ? SMCR_CLAT : 0));
+
+	_DBG( "%s", "DONE\n" );
+}
+
+#if defined(CONFIG_PCMCIA_SUPPORT)
+int pcmcia_init()
+{
+	printf( "PT Digital Board PCMCIA init\n" );
+	/* nothing to do ATM */
+	sa1111_init();
+	printf( "MECR=0x%08x\n", MECR );
+	printf( "MSC0=0x%08x\n", MSC0 );
+	printf( "MSC1=0x%08x\n", MSC1 );
+	printf( "MSC2=0x%08x\n", MSC2 );
+	return 0;
+}
+
+static int pcmcia_test( int argc, char *argv[] )
+{
+	int ret = 0;
+	int slot = 0;
+	u32	*slot_base;
+	u32	*slot_attr;
+	u16 cfg_reg;
+	ide_drive_t	drive;
+	int numDev;
+	int sec;
+
+	unsigned char * devTypeStr[]
+		= { "no device found", "unknown type", "ATA", "ATAPI" };
+	char buffer[4096];
+
+	/* set ata debg level high */
+	//ataio_dbg_set( 5 );
+
+	ret = pcmcia_init();
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	if ( argc > 1 ) {
+		switch ( argv[1][0] ) {
+			case '0':
+				slot = 0;
+				break;
+			case '1':
+				slot = 1;
+				break;
+		}
+	}
+
+	pcmcia_dbg_set( 5 );
+	//ide_dbg_set( 5 );
+
+	ret = pcmcia_slot_detect( slot );
+	if ( !ret )						ERR( -EINVAL );
+
+	printf( "slot %d detected\n", slot );
+
+	ret = pcmcia_slot_enable( slot );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	ret = pcmcia_slot_address_get( slot, &slot_base, &slot_attr );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	ret = pcmcia_slot_reset( slot );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	mem_b( (u32)slot_attr + CF_REG_CFG ) = ( mem_b( (u32)slot_attr + CF_REG_CFG ) & 0xC0 ) | CF_CFG_IO_IDE0;
+
+	printf( "CF CFG REG = 0x%x\n", mem_b( (u32)slot_attr + CF_REG_CFG ) );
+
+	printf( "slot %d enabled\n", slot );
+
+	ret = pcmcia_cis_parse( slot );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+#if 0
+	ret = pcmcia_slot_cfg_reg_get( slot, &cfg_reg );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	ret = ide_init( &drive, (u32)slot_base );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	ret = ide_reset( &drive );
+
+	ret = ide_identify_drive( &drive );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	ret = ide_status_dump( &drive );
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	for ( sec=0; sec<10; sec++ ) {
+		ret = hd_read_mapped( &drive, sec, buffer );
+		if ( ret != 0 )					ERR( -EINVAL );
+		dumpmem( buffer, 512 );
+	}
+#endif
+
+#if 0
+	printf( "slot %d base address: %x\n", slot, (u32)slot_base );
+	printf( "slot %d config register: %x\n", slot, 0x1f0 );
+
+	pio_set_iobase_addr( (u32)slot_base, (u32)slot_base + 0x1f0 );
+	printf( "\nUsing I/O base addresses %x and %x.\n",
+			(u32)slot_base, (u32)slot_base + 0x1f0 );
+
+	/* 2) find out what devices are present -- this is the step */
+	/* many driver writers ignore.  You really can't just do */
+	/* resets and commands without first knowing what is out there. */
+	/* Even if you don't care the driver does care. */
+	numDev = reg_config();
+	printf( "\nFound %d devices on this ATA interface:\n", numDev );
+	printf( "   Device 0 type is %s.\n", devTypeStr[ reg_config_info[0] ] );
+	printf( "   Device 1 type is %s.\n", devTypeStr[ reg_config_info[1] ] );
 
+	/* that's the basics, now do some stuff in polling mode */
 
+	/* do an ATA soft reset (SRST) and return the command block */
+	/* regs for device 0 in struct reg_cmd_info */
+	printf( "Soft Reset...\n" );
+	ret = reg_reset( 0, 0 );
+	if ( ret )						ERR( -EINVAL );
 
+	ret = reg_pio_data_in(
+			0, CMD_IDENTIFY_DEVICE,
+			0, 0,
+			0, 0, 0,
+			buffer,
+			1, 0
+			);
+	if ( ret != 0 )					ERR( -EINVAL );
+	dumpmem( buffer, 512 );
+#endif
+
+	ret = pcmcia_dump_stati();
+	if ( ret != 0 )					ERR( -EINVAL );
+
+	ret = 0;
+DONE:
+	if ( ret != 0 ) {
+		printf( "pcmciatest: ERROR: code %d\n", ret );
+	}
+	return ret;
+}
+static char pcmciahelp[] = "pcmcia test\n";
+__commandlist(pcmcia_test, "pcmciatest", pcmciahelp);
+#endif
+
+
+#if 0
 /*********************************************************************
  * cmd_download_file
  *
@@ -135,6 +381,12 @@
 	ret = strtou32( argv[2], &len );
 	if ( ret < 0 )				ERR( -EINVAL );
 
+#if defined(CONFIG_XMODEM_SUPPORT)
+	printf( "XMODEM download\n" );
+#else
+	printf( "UUENCODE download\n" );
+#endif
+
 	if (blob_status.terminalSpeed != blob_status.downloadSpeed) {
 		SerialOutputString("Switching to download speed\n");
 		SerialOutputString("You have 60 seconds to switch your terminal emulator to the same speed and\n");
@@ -144,8 +396,11 @@
 	} else {
 		SerialOutputString("You have 60 seconds to start downloading.\n");
 	}
-
+#if defined(CONFIG_XMODEM_SUPPORT)
+	ret = XModemReceive( (char *)dest, len );
+#else
 	ret = UUDecode((char *)dest, len);
+#endif
 	if ( ret == len ) {
 		SerialOutputString("Received ");
 		SerialOutputDec(ret);
@@ -154,7 +409,7 @@
 		SerialOutputString(") bytes.\n");
 		ret = 0;
 	} else {
-		SerialOutputString("error during uudecode\n");
+		SerialOutputString("error during download\n");
 	}
 	
 	if (blob_status.terminalSpeed != blob_status.downloadSpeed) {
@@ -250,3 +505,4 @@
 static char flasherasehelp[] = "ferase adr size(bytes)\n"
 "erase a flash region\n";
 __commandlist( cmd_flash_erase, "ferase", flasherasehelp );
+#endif