Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv27195/src/blob
Modified Files:
badge4.c jornada720.c memsetup-sa1110.S
Log Message:
Latest port for HPL BadgePAD 4 and HP Jornada 720. Both are thought to
work well.
Index: badge4.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/badge4.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- badge4.c 2002/01/03 16:07:17 1.3
+++ badge4.c 2002/01/15 01:45:01 1.4
@@ -67,12 +67,51 @@
static void init_hardware(void)
{
- // GPIO 19 and 20 specify SDRAM "type".
- // These settings are for 12 row bits, 9 col bits.
- // ### Incorporate SPD code here.
- GPDR |= (GPIO_GPIO19 | GPIO_GPIO20);
+ /*
+ * Grab a paper bag. This is ugly.
+ *
+ * We have to do part of the SA-1111 initialization here.
+ * Whenever we pull down GPIO_SA1111_NRST (GPIO 25, 1111_RST~
+ * on the schematic), the DRAM goes to hell as that GPIO is
+ * also wired into the CPLD that controls the DRAM interface.
+ * Argh.
+ *
+ * The only reason the following works is that we're running
+ * blob out of sram. (The same kind of thing would also work
+ * when running out of flash, but there's no good place to
+ * hook int platform-specific initialization in the blob
+ * loader in the short window when it is running out of
+ * flash.
+ */
+
+ /* Asert nRESET. */
+ GPCR = GPIO_GPIO25;
+ GPDR |= GPIO_GPIO25;
+
+ /*
+ * Set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
+ * (SA-1110 Developer's Manual, section 9.1.2.1)
+ */
+ GAFR |= GPIO_32_768kHz;
+ GPDR |= GPIO_32_768kHz;
+ TUCR = TUCR_3_6864MHz;
+
+ /* De-assert nRESET */
+ GPSR = GPIO_GPIO25;
+
+ /*
+ * The SA-1111 initialization is not yet done, but Linux
+ * can do the rest.
+ */
+
+ /*
+ * GPIO 19 and 20 specify SDRAM "type".
+ * These settings are for 12 row bits, 9 col bits.
+ * ### Incorporate SPD code here.
+ */
GPSR = GPIO_GPIO19;
GPCR = GPIO_GPIO20;
+ GPDR |= (GPIO_GPIO19 | GPIO_GPIO20);
/* select serial driver */
serial_driver = &sa11x0_serial_driver;
Index: jornada720.c
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/jornada720.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- jornada720.c 2002/01/03 16:07:18 1.3
+++ jornada720.c 2002/01/15 01:45:01 1.4
@@ -66,24 +66,23 @@
}
-static void init_flash_driver(void)
+static void init_driver(void)
{
flash_descriptors = jornada720_flash_descriptors;
flash_driver = &intel32_flash_driver;
flash_driver->enable_vpp = jornada720_enable_vpp;
flash_driver->disable_vpp = jornada720_disable_vpp;
+
+ /* select serial driver */
+ serial_driver = &sa11x0_serial_driver;
}
-__initlist(init_flash_driver, INIT_LEVEL_DRIVER_SELECTION);
+__initlist(init_driver, INIT_LEVEL_DRIVER_SELECTION);
-static void init_hardware(void)
+static void init_hardware_plus_one(void)
{
- PPSR &= ~(GPIO_GPIO10 | GPIO_GPIO7);
- PPDR |= (GPIO_GPIO10 | GPIO_GPIO7);
-
-#warning "Please check this code!"
/* Careful over here! the timer might not yet be initialised
* at this point, so calling msleep() is unsafe! The best way
* to make sure that it is, is to put the GPIO stuff in a
@@ -91,13 +90,14 @@
* INIT_LEVEL_INITIAL_HARDWARE+1. The serial port stuff can be
* called without problems at INIT_LEVEL_INITIAL_HARDWARE -- Erik
*/
+
+ PPSR &= ~(GPIO_GPIO10 | GPIO_GPIO7);
+ PPDR |= GPIO_GPIO10 | GPIO_GPIO7;
+
msleep(10 * 1000);
/* Take the MCU out of reset mode */
PPSR |= GPIO_GPIO10;
-
- /* select serial driver */
- serial_driver = &sa11x0_serial_driver;
}
-__initlist(init_hardware, INIT_LEVEL_DRIVER_SELECTION);
+__initlist(init_hardware_plus_one, INIT_LEVEL_INITIAL_HARDWARE + 1);
Index: memsetup-sa1110.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/memsetup-sa1110.S,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -d -r1.8 -r1.9
--- memsetup-sa1110.S 2001/12/27 18:27:37 1.8
+++ memsetup-sa1110.S 2002/01/15 01:45:01 1.9
@@ -61,7 +61,11 @@
.long MSC0_VALUE /* 0x10 MSC0 */
.long MSC1_VALUE /* 0x14 MSC1 */
.long MECR_VALUE /* 0x18 MECR */
+#ifdef MDRFER_DONT_BELIEVE_IN_MAGIC
+ .long MDREFR_VALUE
+#else
.long 0xdeadbeef /* 0x1C MDREFR */
+#endif
.long MDCAS20_VALUE /* 0x20 MDCAS20 */
.long MDCAS21_VALUE /* 0x24 MDCAS21 */
.long MDCAS22_VALUE /* 0x28 MDCAS22 */
@@ -97,6 +101,10 @@
ldr r2, [r1, #MDCAS22 ]
str r2, [r0, #MDCAS22 ]
+#ifdef MDREFR_DONT_BELIEVE_IN_MAGIC
+ ldr r2, [r1, #MDREFR ]
+ str r2, [r0, #MDREFR ]
+#else
/* clear KxDB2 */
ldr r2, [ r0, #MDREFR ]
bic r2, r2, #MDREFR_K0DB2
@@ -129,6 +137,7 @@
ldr r2, [ r0, #MDREFR ]
orr r2, r2, #MDREFR_E1PIN
str r2, [ r0, #MDREFR ]
+#endif
/* Issue read requests to disabled bank to start refresh */
ldr r1, MEM_START
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