Update of /cvsroot/blob/blob/src/blob
In directory usw-pr-cvs1:/tmp/cvs-serv15621
Modified Files:
start.S
Log Message:
- Use BLOB_ABS_BASE_ADDR to know where to load the second stage loader
- Copy only 64kB instead of 128kB
Index: start.S
===================================================================
RCS file: /cvsroot/blob/blob/src/blob/start.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- start.S 2001/10/28 20:39:37 1.4
+++ start.S 2001/11/04 23:18:05 1.5
@@ -71,7 +71,7 @@
#define RCSR 0x04
/* main memory starts at 0xc0000000 */
-MEM_START: .word MEMORY_START
+BLOB_START: .word BLOB_ABS_BASE_ADDR
/* The initial CPU speed. Note that the SA11x0 CPUs can be safely overclocked:
@@ -118,10 +118,10 @@
normal_boot:
- /* check the first 1MB in increments of 4k */
+ /* check the first 1MB of BLOB_START in increments of 4k */
mov r7, #0x1000
mov r6, r7, lsl #8 /* 4k << 2^8 = 1MB */
- ldr r5, MEM_START
+ ldr r5, BLOB_START
mem_test_loop:
mov r0, r5
@@ -138,10 +138,9 @@
adr r0, _start
/* relocate the second stage loader */
- add r2, r0, #(128 * 1024) /* blob is 128kB */
+ add r2, r0, #(64 * 1024) /* blob maximum size is 64kB */
add r0, r0, #0x400 /* skip first 1024 bytes */
- ldr r1, MEM_START
- add r1, r1, #0x400 /* skip over here as well */
+ ldr r1, BLOB_START
/* r0 = source address
* r1 = target address
@@ -161,8 +160,7 @@
/* blob is copied to ram, so jump to it */
- ldr r0, MEM_START
- add r0, r0, #0x400
+ ldr r0, BLOB_START
mov pc, r0
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