Update of /cvsroot/blob/blob/src
In directory usw-pr-cvs1:/tmp/cvs-serv19599/src
Modified Files:
Makefile.am icache.c
Log Message:
i-cache code can also be called from init and exit lists
Index: Makefile.am
===================================================================
RCS file: /cvsroot/blob/blob/src/Makefile.am,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- Makefile.am 2001/10/03 16:02:43 1.8
+++ Makefile.am 2001/10/03 17:17:15 1.9
@@ -61,6 +61,7 @@
command.c \
error.c \
flash.c \
+ icache.c \
init.c \
led.c \
linux.c \
Index: icache.c
===================================================================
RCS file: /cvsroot/blob/blob/src/icache.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -r1.1 -r1.2
--- icache.c 2001/10/03 17:15:24 1.1
+++ icache.c 2001/10/03 17:17:15 1.2
@@ -0,0 +1,74 @@
+/*
+ * icache.c: i-cache handling
+ *
+ * Copyright (C) 2001 Russ Dill <Rus...@as...>
+ *
+ * $Id$
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ident "$Id$"
+
+#ifdef HAVE_CONFIG_H
+# include "config.h"
+#endif
+
+#include "init.h"
+#include "types.h"
+
+
+
+static void enable_icache(void)
+{
+ register u32 i;
+
+ /* read control register */
+ asm ("mrc p15, 0, %0, c1, c0, 0": "=r" (i));
+
+ /* set i-cache */
+ i |= 0x1000;
+
+ /* write back to control register */
+ asm ("mcr p15, 0, %0, c1, c0, 0": : "r" (i));
+}
+
+
+
+
+static void disable_icache(void)
+{
+ register u32 i;
+
+ /* read control register */
+ asm ("mrc p15, 0, %0, c1, c0, 0": "=r" (i));
+
+ /* clear i-cache */
+ i &= ~0x1000;
+
+ /* write back to control register */
+ asm ("mcr p15, 0, %0, c1, c0, 0": : "r" (i));
+
+ /* flush i-cache */
+ asm ("mcr p15, 0, %0, c7, c5, 0": : "r" (i));
+}
+
+
+
+
+/* init and exit calls */
+__initlist(enable_icache, INIT_LEVEL_INITIAL_HARDWARE);
+__exitlist(disable_icache, INIT_LEVEL_INITIAL_HARDWARE);
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