Re: [B2-devel] IEEE FPU build problems

[Gwenole B. <gb...@di...>]

Hi,

>> However, the runtime FP results don't seem anywhere near right.
>
> That could be because extract_extended() and 
> make_extended_no_normalize() are not implemented yet for quad doubles. 
> i.e. the mantissa is filled in with bits not at the right place. Sorry 
> about that, I will have a look.

Done something in CVS. That may still be wrong though. BTW, I read at 
some page that the mips64 compiler can have sizeof(long double) == 16 
but (i) does not have an IEEE-compliant format, (ii) is emulated in a 
pair of double registers? As such, I am wondering if disabling quad 
doubles isn't the safest solution at this point.

Bye,
Gwenole