Menu
▾
▴
basilisk-cvs
|
From: CVS <do...@th...> - 2003-01-31 20:40:11
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Added Files: codegen_x86.h Log Message: Add new run-time assembler derived from GNU lightning. It is suitable for both i386 and x86-64 architectures. Still needs some work (see TODO) and an actual glue to the JIT backend. Original work is LGPL, but per section 3 of this license, I opt for GPL v2 for Basilisk II purposes. |
|
From: CVS <do...@th...> - 2003-01-31 23:48:30
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Add some FPU instructions. Minor clean-ups. |
|
From: CVS <do...@th...> - 2003-03-17 17:18:44
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Add some SSE/SSE2 instructions |
|
From: CVS <do...@th...> - 2003-03-18 10:08:33
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Handle absolute and RIP addressing modes in x86-64 |
|
From: CVS <do...@th...> - 2003-03-18 13:13:14
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Add CMOV and BSF/BSR instructions |
|
From: CVS <do...@th...> - 2003-03-18 16:28:43
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Fix _REXBmr(). Add CPUID. Some C++ compiler fixes. Make x86_emit_failure() be void, and let x86_emit_failure0() be an int expression instead. |
|
From: CVS <do...@th...> - 2003-03-18 17:02:01
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Add sign/zero-extend instructions |
|
From: CVS <do...@th...> - 2003-03-19 11:34:29
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Fix 0(%rbp,<reg>,1) operand encoding |
|
From: CVS <do...@th...> - 2003-03-19 16:25:32
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Fix MOVBrr |
|
From: CVS <do...@th...> - 2003-03-19 17:06:40
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Optimize TEST[BWLQ]ir case where dest register is %rax Add JCCSii and JCCii which directly takes the displacement value to encode |
|
From: CVS <do...@th...> - 2003-05-19 17:28:07
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: - Fix "extended register" predicate to exclude X86_NOREG and X86_RIP - Really handle requested 32-bit absolute address in AMD64 target - Fix REX prefixes in 16-bit ALU instructions - Fix POPF, remove useless? POPFD and PUSHFD |
|
From: <do...@do...> - 2004-10-24 22:22:56
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: fix SIB encoding with base=r13 fix PUSH/POP with x86_64 extended registers fix CALL/JMP REX prefixes |
|
From: <do...@do...> - 2004-10-31 16:02:09
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Reorder SPL, BPL, SIL, DIL IDs so that 8-bit register allocation is simpler Fix MOVZBL and MOVSBL encodings with those extended 8-bit registers |
|
From: <do...@do...> - 2004-11-01 15:37:43
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: - optimize absolute addresses into RIP relative, if possible - fix MOVQir as the operand is 64-bit - fix IMULWrr, IMULLrr, IMULQrr, MOVSBWrr, MOVZBWrr |
|
From: <do...@do...> - 2004-11-08 20:48:25
|
Update of /cvs/BasiliskII/src/uae_cpu/compiler Modified Files: codegen_x86.h Log Message: Enable RIP-relative addressing, optimize REX conditions processing in ! X86_FLAT_REGISTERS mode, fix __REX_mem encodings (e.g. POPLm) |
|
From: <cv...@ce...> - 2006-02-06 22:57:26
|
Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche Modified Files: codegen_x86.h Log Message: Cosmetics, fix %rh cases in !X86_FLAT_REGISTERS mode, lahf/sahf are now valid instructions in long mode (recent enough CPU revisions: lahf_lm). |
|
From: <cv...@ce...> - 2006-07-14 09:09:17
|
Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche Modified Files: codegen_x86.h Log Message: Run-time assembler fixes: - Check for RIP register only in 64-bit mode - Add missing macros and arguments (BT*im) - MOVSWQ/MOVZWQ are 64-bit mode instructions only |
|
From: <cv...@ce...> - 2006-07-14 16:53:53
|
Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche Modified Files: codegen_x86.h Log Message: Add more SSE templates for new SheepShaver's code generator -- though it should be made independent of this file. |
|
From: <cv...@ce...> - 2006-07-17 04:07:44
|
Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche Modified Files: codegen_x86.h Log Message: Add LEALQmr, EMMS, SSE CMP and a series of new SSE opcodes (auto-generated) |
|
From: <cv...@ce...> - 2006-07-23 10:20:29
|
Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche Modified Files: codegen_x86.h Log Message: icc9.1 & gcc4.1 warning fixes |
|
From: <cv...@ce...> - 2008-01-01 21:48:39
|
Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche Modified Files: codegen_x86.h Log Message: Add macros for SSSE3 instructions encoding (PSHUFB in particular). |
|
From: <cv...@ce...> - 2008-02-11 16:50:37
|
Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche Modified Files: codegen_x86.h Log Message: Use symbolic constants for Jcc and SETcc instructions. Don't emit extraneous REX bits for JMP and CALL instructions. |
×
Want the latest updates on software, tech news, and AI?
Get latest updates about software, tech news, and AI from SourceForge directly in your inbox once a month.
Thanks for helping keep SourceForge clean.
X