Thread: [Basilisk-cvs] BasiliskII/src/uae_cpu/compiler compemu_support.cpp

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Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Use vm_acquire() to allocate translation cache

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Don't forget to use vm_realease() to free up translation cache. Also free
the right amount of memory that was previously allocated.

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Move -DSAHF_SETO_PROFITABLE down in x86 & gas specific block. Also ensure
SAHF_SETO_PROFITABLE is defined when compiling the JIT. Aka I don't want
to support obsolete and probably bogus code nowadays.

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Add PROFILE_UNTRANSLATED_INSNS information. Interestingly, the following
are the bottleneck now: DIVS, BSR.L (why isn't it translated yet?),
bit-field instructions (I need to self-motivate enough for that), and
A-Traps.

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
- Turn on runtime detection of loop and jump alignment as Aranym people
  reported they got some improvement with it and larger loops. Small
  loops are an issue for now until unrolling is implemented for DBcc.
- Const jumps are identified in readcpu. I don't want to duplicate code
  uselessly. Rather, it's the JIT job to know whether we are doing block
  inlining and un-marking those instructions as end-of-block.

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Remove obsolete CFLOW_* constants but keep cpuop_{begin,end} for an
inline-threaded core.

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Fix align_target with a padding of 0 bytes

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Add facility to filter out some opcodes from the compfunctbl[] et al.

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
flags are live after a call to fflags_into_flags_internal()

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Make sure a 32-bit B2/JIT works reasonnably well on AMD64 too. This implies
to force RAMBaseHost < 0x80000000. This is empirically determined to work on
Linux/x86 and Linux/amd64.

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
Add "jitblacklist" prefs item so that opcodes ranges could be excluded for
translation. This should help debugging of (badly) translated code.

Usage: jitblacklist xxxx(-yyyy)?(;xxxx(-yyyy)?)*
where xxxx/yyyy are hexadecimal numbers

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
fix protection changes on translation cache + cosmetic fixlet

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
fix inline dispatcher to really generate a cmove on x86-64 (silly bug!)

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
add some code to gather stats on m68k registers used in translated blocks

Update of /cvs/BasiliskII/src/uae_cpu/compiler

Modified Files:
	compemu_support.cpp 
Log Message:
ensure allocated code fits under 32-bit boundaries

Update of /cvs/BasiliskII/src/uae_cpu/compiler by gbeauche

Modified Files:
	compemu_support.cpp 
Log Message:
Enable FLIGHT_RECORDER for generated code but don't record registers in
that case (yet).

Update of /cvs/BasiliskII/src/uae_cpu/compiler by gbeauche

Modified Files:
	compemu_support.cpp 
Log Message:
Really make translation through constant jumps functional. This can be
disabled with the new prefs item "jitinline". Some rapid Speedometer 4
benchmarks showed only a 4% improvement.

Update of /cvs/BasiliskII/src/uae_cpu/compiler by gbeauche

Modified Files:
	compemu_support.cpp 
Log Message:
Much improved responsiveness on NetBSD systems.

On those systems, it's really hard to get high resolution timings and the
system oftens fails to honour a timeout in less than 20 ms. The idea here
is to have an average m68k instruction count (countdown quantum) that
triggers real interrupt checks. The quantum is calibrated every 10 ticks
and has a 1000 Hz resolution on average. 

Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche

Modified Files:
	compemu_support.cpp 
Log Message:
prefer lower indexes in register allocation, this avoids REX prefixes on
x86_64 when %r8 - %r15 are used (very light speedup expected)

Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche

Modified Files:
	compemu_support.cpp 
Log Message:
Fix for LAZY_FLUSH_ICACHE_RANGE. Blocks are indexed by native addresses.

Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche

Modified Files:
	compemu_support.cpp 
Log Message:
Add support for comma-separated elements in "jitblacklist" item.

Update of /home/cvs/cebix/BasiliskII/src/uae_cpu/compiler by gbeauche

Modified Files:
	compemu_support.cpp 
Log Message:
Fix JIT for 68020/68030 emulation mode.

Thread: [Basilisk-cvs] BasiliskII/src/uae_cpu/compiler compemu_support.cpp

basilisk-cvs