Re: [avr-llvm-devel] Inline assembly.

[Stepan D. <stp...@na...>]

Hello Borja,
Here is the new patch for multibyte reference. Please look at new tests 
to see what was implemented exactly.
To fix issue I described in previous letter I've added new reg classes 
that contains pairs of 8 bit registers:
If we pass i32 parameter that should be split onto four 8 bit regs, we 
set i16 register class first, then it would be replaced with 8 bit 
registers if needed. Currently I see it is the only solution that 
doesn't touch vmcore.

-Stepan.

Stepan Dyatkovskiy wrote:
> Hello Borja,
> Great. I have found out next inline-asm issue.
> When you pass i32 bit type, it could be split onto two registers only,
> no matter which register class you set for it. This behaviour is
> implemented in SelectionDAGBuilder::visitInlineAsm. I think I'll
> implement simplest version of ExpandInlineAsm today, that will fix
> operand types properly.
>
> -Stepan
>
> Borja Ferrer wrote:
>> I've been adding fixes to pass a ton of regression in the Generic folder.
>> Currently there are two tests that fail with a "cannot select
>> build_pair" related to adding 16bit reg classes in the inline asm code.
>> The rest of failing tests are related with not being able to run llc
>> with -O0. There's a serious codegen bug that i spotted yesterday while
>> doing the fixes that I need to work on.
>>
>>
>> 2013/7/22 Borja Ferrer <bor...@gm...
>> <mailto:bor...@gm...>>
>>
>>      Hello Stepan,
>>
>>      3) Yes, it's the second case. It's explained in
>>      http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
>>      but in case there are any doubts basically it works the same way as
>>      multibyte constraints except that when you see an "aN", where N is a
>>      number, you should print the alternative regname. Of course this
>>      should only work for X Y and Z, not sure how gcc complains when you
>>      use another register, or maybe it ignores it and prints the normal
>>      register name.
>>
>>
>
>
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