From: Borja F. <bor...@gm...> - 2013-06-23 00:46:35
|
Ok I understand it now. I will check what other backends do, but what you proposed seems reasonable. What happens in your example above when you use a real instruction like for example LDD? Does it still use GPR8 regs? To me it's weird that if you use a real instruction where operands are clearly defined in the td file the instruction selector uses an invalid regclass. 2013/6/22 Stepan Dyatkovskiy <stp...@na...> > So I suppose, I need analyze Op in SelectInlineAsmMemoryOperand, > then create virtual reg of PTRDISPREGS class and use it. > > -Stepan. > > Stepan Dyatkovskiy wrote: > >> Hi Borja, >> >> Borja Ferrer wrote: >> >>> Resending the email to the list without any previous emails: >>> >>> Hello Stepan, >>> >>> 1) This should be fixed now with my last commit. >>> 2) I dont really understand what you mean. Can you expand a bit more >>> here? >>> >> >> Currently for line: >> >> call void asm "some_instr $0", "=*Q"(i16* @b) >> >> It does emit: >> >> ldi r24, lo8(b) >> ldi r25, hi8(b) >> ;APP >> some_instr [r24] >> >> While it shuold emit Y+q instead of r24 e.g.: >> >> ldi YL , lo8(b) >> ldi YH , hi8(b) >> ;APP >> some_instr Y+1 >> >> -Stepan >> >> ------------------------------**------------------------------** >> ------------------ >> >> This SF.net email is sponsored by Windows: >> >> Build for Windows Store. >> >> http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >> ______________________________**_________________ >> avr-llvm-devel mailing list >> avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> https://lists.sourceforge.net/**lists/listinfo/avr-llvm-devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >> >> > |