[avr-llvm-devel] Tests

[Sherard D. <sc...@gm...>]

Hey everyone,

So I started to work on writing some tests, and... not as easy as I
thought it would be. Writing the tests are easy, the hard part is
*defining* what is correct. I've mostly been studying the code GCC
produces, however I don't want to end up writing tests that verify that
the output is just like what GCC would produce, or otherwise limit the
possible output.

I have looked at the tests written for most of the other backends, and
what I see usually seems either really strict (restricting possible code
generation), really specific (targeted at a specific bug report), or
simply tests that don't check their output.

Pasted below is one of the test files I've written. Any comments would
be greatly appreciated, as I seem to be having a rather difficult time
grasping the idea of verifying correct code, for which multiple pieces
of code can all be considered correct.

%struct.Large = type { i32, i32, i32, i32 }

declare i8 @targetCallRegisters8(i8, i8, i8, i8)
declare i32 @targetCallRegisters32(i32, i32, i32, i32)
declare i32 @targetCallStack(i32, %struct.Large)

define i8 @callerStack(i32 %a, %struct.Large %b) {
  ; CHECK: callerStack
  ; CHECK: in [[SSUBRL:r[0-9]+]], 0x3D
  ; CHECK: in [[SSUBRH:r[0-9]+]], 0x3E
  ; CHECK: sbiw [[STACKRL]], 0x10
  ; CHECK: out 0x3E, [[SSUBRH]]
  ; CHECK: out 0x3D, [[SSUBRL]]
  ; CHECK: ldi r22, 0xE0
  ; CHECK: ldi r23, 0x00
  ; CHECK: ldi r24, 0x00
  ; CHECK: ldi r25, 0x00
  ; CHECK: {{[eir]*call}}
  ; CHECK: in [[SADDRL:r[0-9]+]], 0x3D
  ; CHECK: in [[SADDRH:r[0-9]+]], 0x3E
  ; CHECK: adiw [[STACKRL]], 0x10
  ; CHECK: out 0x3E, [[SADDRH]]
  ; CHECK: out 0x3D, [[SADDRL]]
  
  %1 = call i32 @targetCallStack(i32 224, %struct.Large %b)
  ret i8 0  
}

define i8 @callerRegisters8() {
  ; CHECK: callerRegisters8
  ; CHECK: ldi r24, 0xA0
  ; CHECK: ldi r22, 0xB0
  ; CHECK: ldi r20, 0xC0
  ; CHECK: ldi r18, 0xD0
  ; CHECK: {{[eir]*call}}
  
  %1 = call i8 @targetCallRegisters8(i8 160, i8 176, i8 192, i8 208)
  ret i8 %1
}

define i8 @callerRegisters32() {
  ; CHECK: callerRegisters32
  ; CHECK: ldi r22, 0xA0
  ; CHECK: ldi r18, 0xB0
  ; CHECK: ldi [[TMPREG1:r[0-9]+]], 0xC0
  ; CHECK: mov r14, [[TMPREG1]]
  ; CHECK: ldi [[TMPREG2:r[0-9]+]], 0xD0
  ; CHECK: mov r10, [[TMPREG2]]
  ; CHECK: {{[eir]*call}}
  
  %1 = call i32 @targetCallRegisters32(i32 160, i32 176, i32 192, i32
208)
  ret i8 0
}