Re: [avr-llvm-devel] Important stuff

[John M. <ato...@gm...>]

On Sun, Dec 5, 2010 at 10:40 AM, Borja Ferrer <bor...@gm...> wrote:

> I'm currently discussing this issue in the llvmdev mailing list because it
> seems there's no easy way to work with register pairs. You can check it in
> the thread with title "Register Pairing". Basically this is the code im
> testing, it shows how some regs arent paired correctly missing movw
> insertion opportunities:
> <snip>
> ; here we have the case i was explaining, pairs dont match because they're
> the other way round, function result is in r25:r24
> ; but it's storing the hi part in r20 instead of r21, so we cant insert a
> movw
>    mov    r20, r25
>    mov    r21, r24 <--- should be mov r21, r25; mov r20, r24 to be able to
> insert a movw
> <snip>
> John if you have any suggestions they're welcome. I've also asked how to
> combine two 8 bit instructions into a 16 bit one, mainly for movw and
> adiw/sbiw. I wrote a function pass that searches 2 moves in a row and
> combines them into a movw, but if other instructions get in between the
> moves like it happens in the previous example (note those ands and xors)
> then they get missed. GCC has an easy way of handling the register pairing
> issue, Lang in the mailing list suggested using his register allocator which
> is able to work with constraints like the ones we have, look in the src for
> PBQP.
>

It's starting to sound like, from reading the other thread, that we will
need to modify the LLVM code generator and/or tablegen  to get the registers
to be assigned in the correct order. So the PBQP solver can create pairs but
I'm wondering if it will it also be able to assign them in the correct
order? The PBQP sounds really interesting. I've tried reading up on the
concept a few times before but still haven't looked at the source code yet.