[avr-llvm-devel] Load / Store

[Borja F. <bor...@gm...>]

Hello, during the last few days i've been playing a bit with memory
operations, in particular with load and stores but with big hacks. AVR's
memory operations arent very standard because they only work with three reg
pairs, and the X ptr version doesnt allow adding an offset, so we end up
having sort of 2 different addressing capabilities.

I started doing a big hack, saying that a ptr is 8 bits wide instead of 16,
this allows matching the st and ld instructions without any further
complexities. Now i need to figure out how to customize st/ld so it takes in
a register pair to form a 16bit ptr.

This brings some doubts:
- If ptrs were 8 bits we could have a reg class with r26, r28 and r30 for
st/ld and the compiler would be able to choose between this class what reg
to use. However we have to stick with reg pairs so we have to think how to
overcome this, if we dont use reg classes will we have to decide which pair
has to be used manually in each operation??.
Also notice that we should try to avoid using X to access struct members or
whatever because it doesnt support doing "X+<offs>" so we have to see how to
handle different addressing modes, favouring Y or Z in such cases etc.

Another thing, i dont know how feasible is doing this, but should we make
program and data space addrs transparent to the user?

any design consideration replies are welcome