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From: Stepan D. <stp...@na...> - 2013-06-20 19:56:17
|
Hi Borja, > 2) there are some constraints to work with multi byte values (A0, B0, > C0, etc) that dont work at all, they produce wrong code. I guess this is > the next thing that should be implemented. OK. Will work at it. > One more thing, remember to commit the test cases when they're ready. Agh! Forgot to add it. So you mean to commit it now if they a ready? P.S.: Hope will present patch for memory constraint tomorrow. -Stepan. |
|
From: Borja F. <bor...@gm...> - 2013-06-20 15:16:06
|
1) Ok I understand now your point. It's a valid hack for now.
2) I see, I've done some tests and it works as expected so no more worries.
I've been testing some complex inline asm from avr libc and found the
following things:
1) I was able to trigger the assertion in getRegForInlineAsmConstraint, I
havent investigated more, but it's something that needs to be looked at.
2) there are some constraints to work with multi byte values (A0, B0, C0,
etc) that dont work at all, they produce wrong code. I guess this is the
next thing that should be implemented.
3) Likewise from 2) the %a0 constraint for the base pointer regs wont work
either.
One more thing, remember to commit the test cases when they're ready.
2013/6/20 Stepan Dyatkovskiy <stp...@na...>
> Hello Borja,
>
>
> > 1) for the M constraint you expand the type to MVT::i16 in case the
>
>> value is negative. I dont understand the need to do this.
>>
> By default AsmWriter treats constants as signed values. So "i8 255" would
> be printed as "i8 -1". But I'm not sure that avr-as would interpret this as
> "*i8* -1" (I even definitely sure it fails some code). So I'v made it i16;
> doing that, we can be sure that values in range 0..255 would be printed as
> unsigned.
> May be it is kind of hack, though on the first stage I'd just make things
> working...
>
>
> 2) did you manage to understand how the G constraint works? I see you
>> return a 0 MVT::i8 constant, but floats are 32 bits so how does this
>> really work.
>>
> IMHO, kind of stupid constraint. avr-gcc doesn't eat .c inline asm string
> like below:
>
> 'asm("instr %0"::"G"(0.1) );'
>
> avr-gcc exits with error: impossible constraint in 'asm'
>
> while 'asm("instr %0"::"G"(0.0) )' works fine.
>
> 'asm("instr %0"::"G"() );' doesn't work either.
>
> So '"G"(0.0)' is the only correct case.
>
> I set it to i8, since we just need convert it to zero. I suppose for
> avr-as it doesn't matter which kind of zero would be presented (0, 0x0 or
> 0.000). E.g. avr-gcc prints 0x0.
>
> -Stepan.
>
> P.S.: Just as playground code:
> // file: test.c
> // cmd: avr-gcc test.c -S -o -
> void f() {
> int a,b,c,d;
> asm("instr %0"::"G"(0.0) );
> }
>
>
>>
>>
>>
>> 2013/6/18 Borja Ferrer <bor...@gm...
>> <mailto:bor...@gm...>**>
>>
>> Sure Stepan, go ahead. I can do any post commit cleanups afterwards.
>>
>>
>> 2013/6/17 John Myers <ato...@gm...
>> <mailto:atomicdog.jwm@gmail.**com <ato...@gm...>>>
>>
>>
>> You should have commit access.
>>
>>
>> On Mon, Jun 17, 2013 at 1:35 PM, Stepan Dyatkovskiy
>> <stp...@na... <mailto:stp...@na...>> wrote:
>>
>> Hi Borja,
>> 2.1:
>> You're right. Will return C_Register.
>> About Q, I'd want to learn a bit more before it would be
>> implemented. Perhaps there is nothing special, but I'd want
>> to check.
>> 2.2. Yes, we can return cw_constant. I had used ARM template
>> :-) They just had set it as cw_other :-)
>> 3. avr-llvm has appeared in "My Projects" in source forge
>> menu. Does it mean I have permissions already? Can I do test
>> commit (one more \n in README)?
>> 4. I propose to commit everything (with fixes you proposed)
>> to avoid growing snow ball patch ;-)
>> --
>> Truly yours,
>> Stepan Dyatkovskiy
>> 17.06.2013, 22:50, "Borja Ferrer" <bor...@gm...
>> <mailto:bor...@gm...>**>:
>>
>>> Ok thanks for the fixes, more things:
>>>
>>> 2.1) AVRTargetLowering::**getConstraintType: Looking at
>>> other backends, I think the x, y, z, t constraints should
>>> return C_Register instead of C_RegisterClass since these
>>> are used for specific regs inside a regclass. Probably the
>>> same for the q one. What do you think?
>>>
>>> 2.2) Ok, so you've given the largest weight to the bigger
>>> regclasses d, r, l and then for the other reg constraints
>>> the smaller weight, I agree then.
>>> Now, for the constant constraints you should return
>>> CW_Constant instead, other backends first check that the
>>> imm val is in range and if it is then set it to that
>>> value, this is taken from the x86 one:
>>> case 'K':
>>> if (ConstantInt *C =
>>> dyn_cast<ConstantInt>(**CallOperandVal)) {
>>> if ((C->getSExtValue() >= -0x80) &&
>>> (C->getSExtValue() <= 0x7f))
>>> weight = CW_Constant;
>>> }
>>> break;
>>> Finally for Q we should return CW_Memory no?
>>>
>>> 2.3) In getRegForInlineAsmConstraint, if this inline asm
>>> stuff is run after type legalization you could turn that
>>> type checking at the top of the function into an assert()
>>> comment: Upper register r16..r32. <<-- typo registerS and r32
>>>
>>> John or Eric, please give Stepan commit permissions.
>>>
>>>
>>> 2013/6/17 Stepan Dyatkovskiy <stp...@na...
>>> <mailto:stp...@na...>>
>>>
>>>
>>> Hello Borja,
>>>
>>>
>>> ok here we go:
>>>
>>> 1) in AVRRegisterInfo.td: im ok with the lGPR8
>>> regclass since we dont
>>> have it yet and i guess it's needed for the l
>>> constraint, but rename it
>>> to GPR8lo. The hGPR8 regclass comment says lower
>>> registers, so typo
>>> there, but anyways can't you use the LD8 regclass?
>>> Rename simplehGPR8 to
>>> LD8lo, we'll need it in the future for some MUL
>>> instructions.
>>>
>>> Everything here were fixed as you mentioned.
>>>
>>>
>>>
>>> 2) in AVRISelLowering.cpp: for the t, x, y, z
>>> shouldn't we return
>>> C_Register? Probably for b aswell.
>>> 2.1) in getSingleConstraintMatchWeight can you
>>> clarify me what's the
>>> diff between CW_SpecificReg and CW_Register.
>>> Shouldn't the G constraint
>>> be a Constant? Same for the other constraints?
>>>
>>> All this stuff with weights is due to support of
>>> multiple constraints. For some operands you may set
>>> *the set* of constraints, e.g. 'mr': get either memory
>>> of register. In that case we're use weights. What
>>> should we select for 'bx' constraint for example? One
>>> of y,z or x? So, currently llvm gets register first
>>> from class with bigger weight. Since CW_SpecificReg <
>>> CW_Register it will select one of y,z.
>>>
>>> For more information see implementation of
>>> "TargetLowering::__**getMultipleConstraintMatchWeig**
>>> __ht"
>>> and "TargetLowering::__**ParseConstraints".
>>>
>>>
>>> 'G' shouldn't be CW_Register, of course, that was my
>>> typo. I've fixed it, now it as all other constants
>>> just a CW_Default.
>>>
>>>
>>> 2.2) in getRegForInlineAsmConstraint fixup the
>>> regclasses per point (1).
>>> for w you could use the IWREGS regclass, the docs
>>> say they are regpairs,
>>> not 8 bit regs as you declared in the .td file.
>>>
>>> That was also fixed.
>>>
>>> -Stepan.
>>>
>>>
>>> The rest looks great.
>>>
>>>
>>> 2013/6/14 Borja Ferrer <bor...@gm...
>>> <mailto:bor...@gm...>
>>> <mailto:bor...@gm...
>>> <mailto:bor...@gm...>**>__>
>>>
>>>
>>> Going to review the patch now.
>>>
>>> No, there is no test for allocation order, I
>>> don't know a good way
>>> of testing that. If you want you can replace
>>> the register list by
>>> several sequences.
>>>
>>>
>>> 2013/6/14 Stepan Dyatkovskiy
>>> <stp...@na... <mailto:stp...@na...>
>>> <mailto:stp...@na...
>>> <mailto:stp...@na...>>>
>>>
>>>
>>> Hi Borja,
>>> All constraints are supported now.
>>> The new patch is attached.
>>>
>>> -- Added support for all documented
>>> constraints.
>>> -- Fixed tests as you mentioned.
>>>
>>> Relative to GPR8,
>>> Do we have some tests that check
>>> allocation order? If so, all of
>>> them were passed :-)
>>>
>>> Though I can use the explicit enumeration
>>> way you're currently
>>> using...
>>>
>>> -Stepan.
>>>
>>> Borja Ferrer wrote:
>>>
>>> Ok, there are some small style issues
>>> but i will fix them
>>> after you can
>>> commit (braces in
>>> AVRAsmPrinter::____**PrintAsmOperand),
>>>
>>>
>>> afterwards you may
>>> check them for future reference.
>>>
>>> About the GPR8 replacement, I'm not
>>> sure now, but will it
>>> change the
>>> register allocation order using the
>>> "sequence" set
>>> instruction? This was
>>> changed some time ago so I dont
>>> remember what was the new...@na...
>>>
>>> <mailto:stp...@na...
>>> <mailto:stp...@na...>>>>>
>>>
>>>
>>>
>>> Hi all,
>>> I'll use this
>>> reference for
>>> implementation, right?
>>> http://savannah.nongnu.org/___**
>>> ___download/avr-libc/avr-libc-**______user-manual-1.8.0.pdf.**bz2<http://savannah.nongnu.org/______download/avr-libc/avr-libc-______user-manual-1.8.0.pdf.bz2>
>>> <http://savannah.nongnu.org/__**
>>> __download/avr-libc/avr-libc-_**___user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
>>> >
>>>
>>>
>>> <http://savannah.nongnu.org/__**
>>> __download/avr-libc/avr-libc-_**___user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
>>> <http://savannah.nongnu.org/__**
>>> download/avr-libc/avr-libc-__**user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>>> >>
>>>
>>>
>>>
>>>
>>> <http://savannah.nongnu.org/__**
>>> __download/avr-libc/avr-libc-_**___user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
>>> <http://savannah.nongnu.org/__**
>>> download/avr-libc/avr-libc-__**user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>>> >
>>>
>>> <http://savannah.nongnu.org/__**
>>> download/avr-libc/avr-libc-__**user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>>> <http://savannah.nongnu.org/**
>>> download/avr-libc/avr-libc-**user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2>
>>> >>>
>>>
>>> -Stepan.
>>>
>>> Stepan Dyatkovskiy
>>> wrote:
>>> > Ops. Forget to
>>> apply patch itself...
>>> >
>>> > -Stepan.
>>> >
>>> > Stepan
>>> Dyatkovskiy wrote:
>>> >> Hi all. That's a
>>> Thursday patch with
>>> inline asm.
>>> Currently
>>> the only
>>> >> constraint is
>>> supported: register ('r').
>>> >>
>>> >> -Stepan.
>>> >>
>>> >>
>>>
>>>
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>>> net/lists/listinfo/avr-llvm-__**devel
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>>
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|
|
From: Stepan D. <stp...@na...> - 2013-06-20 13:02:57
|
Hello Borja,
> 1) for the M constraint you expand the type to MVT::i16 in case the
> value is negative. I dont understand the need to do this.
By default AsmWriter treats constants as signed values. So "i8 255"
would be printed as "i8 -1". But I'm not sure that avr-as would
interpret this as "*i8* -1" (I even definitely sure it fails some code).
So I'v made it i16; doing that, we can be sure that values in range
0..255 would be printed as unsigned.
May be it is kind of hack, though on the first stage I'd just make
things working...
> 2) did you manage to understand how the G constraint works? I see you
> return a 0 MVT::i8 constant, but floats are 32 bits so how does this
> really work.
IMHO, kind of stupid constraint. avr-gcc doesn't eat .c inline asm
string like below:
'asm("instr %0"::"G"(0.1) );'
avr-gcc exits with error: impossible constraint in ‘asm’
while 'asm("instr %0"::"G"(0.0) )' works fine.
'asm("instr %0"::"G"() );' doesn't work either.
So '"G"(0.0)' is the only correct case.
I set it to i8, since we just need convert it to zero. I suppose for
avr-as it doesn't matter which kind of zero would be presented (0, 0x0
or 0.000). E.g. avr-gcc prints 0x0.
-Stepan.
P.S.: Just as playground code:
// file: test.c
// cmd: avr-gcc test.c -S -o -
void f() {
int a,b,c,d;
asm("instr %0"::"G"(0.0) );
}
>
>
>
>
> 2013/6/18 Borja Ferrer <bor...@gm...
> <mailto:bor...@gm...>>
>
> Sure Stepan, go ahead. I can do any post commit cleanups afterwards.
>
>
> 2013/6/17 John Myers <ato...@gm...
> <mailto:ato...@gm...>>
>
> You should have commit access.
>
>
> On Mon, Jun 17, 2013 at 1:35 PM, Stepan Dyatkovskiy
> <stp...@na... <mailto:stp...@na...>> wrote:
>
> Hi Borja,
> 2.1:
> You're right. Will return C_Register.
> About Q, I'd want to learn a bit more before it would be
> implemented. Perhaps there is nothing special, but I'd want
> to check.
> 2.2. Yes, we can return cw_constant. I had used ARM template
> :-) They just had set it as cw_other :-)
> 3. avr-llvm has appeared in "My Projects" in source forge
> menu. Does it mean I have permissions already? Can I do test
> commit (one more \n in README)?
> 4. I propose to commit everything (with fixes you proposed)
> to avoid growing snow ball patch ;-)
> --
> Truly yours,
> Stepan Dyatkovskiy
> 17.06.2013, 22:50, "Borja Ferrer" <bor...@gm...
> <mailto:bor...@gm...>>:
>> Ok thanks for the fixes, more things:
>>
>> 2.1) AVRTargetLowering::getConstraintType: Looking at
>> other backends, I think the x, y, z, t constraints should
>> return C_Register instead of C_RegisterClass since these
>> are used for specific regs inside a regclass. Probably the
>> same for the q one. What do you think?
>>
>> 2.2) Ok, so you've given the largest weight to the bigger
>> regclasses d, r, l and then for the other reg constraints
>> the smaller weight, I agree then.
>> Now, for the constant constraints you should return
>> CW_Constant instead, other backends first check that the
>> imm val is in range and if it is then set it to that
>> value, this is taken from the x86 one:
>> case 'K':
>> if (ConstantInt *C =
>> dyn_cast<ConstantInt>(CallOperandVal)) {
>> if ((C->getSExtValue() >= -0x80) &&
>> (C->getSExtValue() <= 0x7f))
>> weight = CW_Constant;
>> }
>> break;
>> Finally for Q we should return CW_Memory no?
>>
>> 2.3) In getRegForInlineAsmConstraint, if this inline asm
>> stuff is run after type legalization you could turn that
>> type checking at the top of the function into an assert()
>> comment: Upper register r16..r32. <<-- typo registerS and r32
>>
>> John or Eric, please give Stepan commit permissions.
>>
>>
>> 2013/6/17 Stepan Dyatkovskiy <stp...@na...
>> <mailto:stp...@na...>>
>>
>> Hello Borja,
>>
>>
>> ok here we go:
>>
>> 1) in AVRRegisterInfo.td: im ok with the lGPR8
>> regclass since we dont
>> have it yet and i guess it's needed for the l
>> constraint, but rename it
>> to GPR8lo. The hGPR8 regclass comment says lower
>> registers, so typo
>> there, but anyways can't you use the LD8 regclass?
>> Rename simplehGPR8 to
>> LD8lo, we'll need it in the future for some MUL
>> instructions.
>>
>> Everything here were fixed as you mentioned.
>>
>>
>>
>> 2) in AVRISelLowering.cpp: for the t, x, y, z
>> shouldn't we return
>> C_Register? Probably for b aswell.
>> 2.1) in getSingleConstraintMatchWeight can you
>> clarify me what's the
>> diff between CW_SpecificReg and CW_Register.
>> Shouldn't the G constraint
>> be a Constant? Same for the other constraints?
>>
>> All this stuff with weights is due to support of
>> multiple constraints. For some operands you may set
>> *the set* of constraints, e.g. 'mr': get either memory
>> of register. In that case we're use weights. What
>> should we select for 'bx' constraint for example? One
>> of y,z or x? So, currently llvm gets register first
>> from class with bigger weight. Since CW_SpecificReg <
>> CW_Register it will select one of y,z.
>>
>> For more information see implementation of
>> "TargetLowering::__getMultipleConstraintMatchWeig__ht"
>> and "TargetLowering::__ParseConstraints".
>>
>> 'G' shouldn't be CW_Register, of course, that was my
>> typo. I've fixed it, now it as all other constants
>> just a CW_Default.
>>
>>
>> 2.2) in getRegForInlineAsmConstraint fixup the
>> regclasses per point (1).
>> for w you could use the IWREGS regclass, the docs
>> say they are regpairs,
>> not 8 bit regs as you declared in the .td file.
>>
>> That was also fixed.
>>
>> -Stepan.
>>
>>
>> The rest looks great.
>>
>>
>> 2013/6/14 Borja Ferrer <bor...@gm...
>> <mailto:bor...@gm...>
>> <mailto:bor...@gm...
>> <mailto:bor...@gm...>>__>
>>
>>
>> Going to review the patch now.
>>
>> No, there is no test for allocation order, I
>> don't know a good way
>> of testing that. If you want you can replace
>> the register list by
>> several sequences.
>>
>>
>> 2013/6/14 Stepan Dyatkovskiy
>> <stp...@na... <mailto:stp...@na...>
>> <mailto:stp...@na...
>> <mailto:stp...@na...>>>
>>
>>
>> Hi Borja,
>> All constraints are supported now.
>> The new patch is attached.
>>
>> -- Added support for all documented
>> constraints.
>> -- Fixed tests as you mentioned.
>>
>> Relative to GPR8,
>> Do we have some tests that check
>> allocation order? If so, all of
>> them were passed :-)
>>
>> Though I can use the explicit enumeration
>> way you're currently
>> using...
>>
>> -Stepan.
>>
>> Borja Ferrer wrote:
>>
>> Ok, there are some small style issues
>> but i will fix them
>> after you can
>> commit (braces in
>> AVRAsmPrinter::____PrintAsmOperand),
>>
>> afterwards you may
>> check them for future reference.
>>
>> About the GPR8 replacement, I'm not
>> sure now, but will it
>> change the
>> register allocation order using the
>> "sequence" set
>> instruction? This was
>> changed some time ago so I dont
>> remember what was the new...@na...
>> <mailto:stp...@na...
>> <mailto:stp...@na...>>>>>
>>
>>
>>
>> Hi all,
>> I'll use this
>> reference for
>> implementation, right?
>> http://savannah.nongnu.org/______download/avr-libc/avr-libc-______user-manual-1.8.0.pdf.bz2
>> <http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
>>
>> <http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2
>> <http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>>
>>
>>
>>
>>
>> <http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2
>> <http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>>
>> <http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2
>> <http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2>>>
>>
>> -Stepan.
>>
>> Stepan Dyatkovskiy
>> wrote:
>> > Ops. Forget to
>> apply patch itself...
>> >
>> > -Stepan.
>> >
>> > Stepan
>> Dyatkovskiy wrote:
>> >> Hi all. That's a
>> Thursday patch with
>> inline asm.
>> Currently
>> the only
>> >> constraint is
>> supported: register ('r').
>> >>
>> >> -Stepan.
>> >>
>> >>
>>
>>
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From: Borja F. <bor...@gm...> - 2013-06-20 00:10:05
|
Stepan thanks for the commit!
I've done some post commit style fixes and fix a possible crash with a
dyn_cast.
I have two further questions after reviewing your code more thoroughly:
1) for the M constraint you expand the type to MVT::i16 in case the value
is negative. I dont understand the need to do this.
2) did you manage to understand how the G constraint works? I see you
return a 0 MVT::i8 constant, but floats are 32 bits so how does this really
work.
2013/6/18 Borja Ferrer <bor...@gm...>
> Sure Stepan, go ahead. I can do any post commit cleanups afterwards.
>
>
> 2013/6/17 John Myers <ato...@gm...>
>
>> You should have commit access.
>>
>>
>> On Mon, Jun 17, 2013 at 1:35 PM, Stepan Dyatkovskiy <stp...@na...>wrote:
>>
>>> Hi Borja,
>>>
>>> 2.1:
>>> You're right. Will return C_Register.
>>> About Q, I'd want to learn a bit more before it would be implemented.
>>> Perhaps there is nothing special, but I'd want to check.
>>>
>>> 2.2. Yes, we can return cw_constant. I had used ARM template :-) They
>>> just had set it as cw_other :-)
>>>
>>> 3. avr-llvm has appeared in "My Projects" in source forge menu. Does it
>>> mean I have permissions already? Can I do test commit (one more \n in
>>> README)?
>>>
>>> 4. I propose to commit everything (with fixes you proposed) to avoid
>>> growing snow ball patch ;-)
>>>
>>> --
>>> Truly yours,
>>> Stepan Dyatkovskiy
>>>
>>>
>>> 17.06.2013, 22:50, "Borja Ferrer" <bor...@gm...>:
>>>
>>> Ok thanks for the fixes, more things:
>>>
>>> 2.1) AVRTargetLowering::getConstraintType: Looking at other backends, I
>>> think the x, y, z, t constraints should return C_Register instead of
>>> C_RegisterClass since these are used for specific regs inside a regclass.
>>> Probably the same for the q one. What do you think?
>>>
>>> 2.2) Ok, so you've given the largest weight to the bigger regclasses d,
>>> r, l and then for the other reg constraints the smaller weight, I agree
>>> then.
>>> Now, for the constant constraints you should return CW_Constant instead,
>>> other backends first check that the imm val is in range and if it is then
>>> set it to that value, this is taken from the x86 one:
>>> case 'K':
>>> if (ConstantInt *C = dyn_cast<ConstantInt>(CallOperandVal)) {
>>> if ((C->getSExtValue() >= -0x80) && (C->getSExtValue() <= 0x7f))
>>> weight = CW_Constant;
>>> }
>>> break;
>>> Finally for Q we should return CW_Memory no?
>>>
>>> 2.3) In getRegForInlineAsmConstraint, if this inline asm stuff is run
>>> after type legalization you could turn that type checking at the top of the
>>> function into an assert()
>>> comment: Upper register r16..r32. <<-- typo registerS and r32
>>>
>>> John or Eric, please give Stepan commit permissions.
>>>
>>>
>>>
>>> 2013/6/17 Stepan Dyatkovskiy <stp...@na...>
>>>
>>> Hello Borja,
>>>
>>>
>>> ok here we go:
>>>
>>> 1) in AVRRegisterInfo.td: im ok with the lGPR8 regclass since we dont
>>> have it yet and i guess it's needed for the l constraint, but rename it
>>> to GPR8lo. The hGPR8 regclass comment says lower registers, so typo
>>> there, but anyways can't you use the LD8 regclass? Rename simplehGPR8 to
>>> LD8lo, we'll need it in the future for some MUL instructions.
>>>
>>> Everything here were fixed as you mentioned.
>>>
>>>
>>>
>>> 2) in AVRISelLowering.cpp: for the t, x, y, z shouldn't we return
>>> C_Register? Probably for b aswell.
>>> 2.1) in getSingleConstraintMatchWeight can you clarify me what's the
>>> diff between CW_SpecificReg and CW_Register. Shouldn't the G constraint
>>> be a Constant? Same for the other constraints?
>>>
>>> All this stuff with weights is due to support of multiple constraints.
>>> For some operands you may set *the set* of constraints, e.g. 'mr': get
>>> either memory of register. In that case we're use weights. What should we
>>> select for 'bx' constraint for example? One of y,z or x? So, currently llvm
>>> gets register first from class with bigger weight. Since CW_SpecificReg <
>>> CW_Register it will select one of y,z.
>>>
>>> For more information see implementation of "TargetLowering::**
>>> getMultipleConstraintMatchWeig**ht" and "TargetLowering::**
>>> ParseConstraints".
>>>
>>> 'G' shouldn't be CW_Register, of course, that was my typo. I've fixed
>>> it, now it as all other constants just a CW_Default.
>>>
>>>
>>> 2.2) in getRegForInlineAsmConstraint fixup the regclasses per point (1).
>>> for w you could use the IWREGS regclass, the docs say they are regpairs,
>>> not 8 bit regs as you declared in the .td file.
>>>
>>> That was also fixed.
>>>
>>> -Stepan.
>>>
>>>
>>> The rest looks great.
>>>
>>>
>>> 2013/6/14 Borja Ferrer <bor...@gm...
>>> <mailto:bor...@gm...>**>
>>>
>>>
>>> Going to review the patch now.
>>>
>>> No, there is no test for allocation order, I don't know a good way
>>> of testing that. If you want you can replace the register list by
>>> several sequences.
>>>
>>>
>>> 2013/6/14 Stepan Dyatkovskiy <stp...@na...
>>> <mailto:stp...@na...>>
>>>
>>>
>>> Hi Borja,
>>> All constraints are supported now.
>>> The new patch is attached.
>>>
>>> -- Added support for all documented constraints.
>>> -- Fixed tests as you mentioned.
>>>
>>> Relative to GPR8,
>>> Do we have some tests that check allocation order? If so, all of
>>> them were passed :-)
>>>
>>> Though I can use the explicit enumeration way you're currently
>>> using...
>>>
>>> -Stepan.
>>>
>>> Borja Ferrer wrote:
>>>
>>> Ok, there are some small style issues but i will fix them
>>> after you can
>>> commit (braces in AVRAsmPrinter::__**PrintAsmOperand),
>>>
>>> afterwards you may
>>> check them for future reference.
>>>
>>> About the GPR8 replacement, I'm not sure now, but will it
>>> change the
>>> register allocation order using the "sequence" set
>>> instruction? This was
>>> changed some time ago so I dont remember what was the new
>>> behaviour.
>>> In the test cases please add a CHECK line for the function
>>> name, check
>>> the other test cases in the folder to see what i mean.
>>> You may need to add inline asm support in clang aswell,
>>> there are some
>>> methods that need to be implemented there inside the AVR
>>> classes,
>>> probably for error reporting stuff.
>>>
>>> 1) I dont know of any compatible projects, sorry. I've
>>> tested big C
>>> programs like a floating point emulation library.
>>> 2) for now only the tests there.
>>> 3) John please give Stepan commit access to SVN.
>>>
>>> Heh Eric, that's ok, for inline asm there's no room for
>>> optimizations
>>> but for other compiler features sure :)
>>>
>>>
>>>
>>>
>>> 2013/6/13 Stepan Dyatkovskiy <stp...@na...
>>> <mailto:stp...@na...> <mailto:stp...@na...
>>> <mailto:stp...@na...>>>
>>>
>>> Hi Borja,
>>> This is today patch.
>>> 1. Added and tested support for register constraints
>>> (a,b,d,e,q,r,t,w,x,y,z,l).
>>> 2. Refactored GPR8 registers class, added new registers
>>> classes:
>>> lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8.
>>> 3. Fixed code-style.
>>>
>>> P.S.: In case you decided to give me commit access:
>>> 1. Do you have some AVR projects that are compilable
>>> with avr-llvm?
>>> I mean kind of llvm's test-suite replacement.
>>> 2. What ought to be tested before commit, except the
>>> "test/CodeGen/AVR" tests?
>>> 3. My SourceForge account name is: "kaomoneus".
>>>
>>> -Stepan.
>>>
>>> Borja Ferrer wrote:
>>>
>>> The patch looks good, some comments about coding
>>> style. We use a
>>> different standard compared to llvm's, most
>>> important things are:
>>> 1) braces go into new lines.
>>> 2) always place braces even if they're for a 1 line
>>> statement
>>>
>>> this:
>>> + std::pair<unsigned, const TargetRegisterClass*>
>>> + getRegForInlineAsmConstraint(_**
>>> ___const
>>>
>>> std::string
>>>
>>> &Constraint,
>>> + EVT VT) const;
>>> +
>>> should be:
>>> std::pair<unsigned, const TargetRegisterClass *>
>>> << space
>>> between
>>> name and *
>>> getRegForInlineAsmConstraint(_**___const
>>> std::string
>>>
>>> &Constraint,
>>> EVT VT) const;
>>>
>>> this:
>>> + ConstraintWeight getSingleConstraintMatchWeight*
>>> *____(
>>>
>>>
>>> + AsmOperandInfo &info, const char *constraint)
>>> const;
>>> should be:
>>> ConstraintWeight
>>> getSingleConstraintMatchWeight**____(AsmOperandInfo
>>>
>>> &info,
>>>
>>>
>>> const char
>>> *constraint)
>>> const;
>>>
>>>
>>> if there are any other small details i can fix them
>>> post commit.
>>>
>>>
>>>
>>> 2013/6/13 Borja Ferrer <bor...@gm...
>>> <mailto:bor...@gm...>
>>> <mailto:bor...@gm...
>>> <mailto:bor...@gm...>**>
>>> <mailto:bor...@gm...
>>> <mailto:bor...@gm...> <mailto:bor...@gm...
>>> <mailto:bor...@gm...>**>__>__>
>>>
>>>
>>>
>>>
>>> Nice Stepan, I will review your patch later
>>> on. You should
>>> be given
>>> commit access to this svn repo until we
>>> finally decide
>>> where to move
>>> on all of the code.
>>>
>>>
>>> 2013/6/13 Stepan Dyatkovskiy
>>> <stp...@na... <mailto:stp...@na...>
>>> <mailto:stp...@na... <mailto:stp...@na...
>>> >>
>>> <mailto:stp...@na...
>>> <mailto:stp...@na...> <mailto:stp...@na...
>>> <mailto:stp...@na...>>>>
>>>
>>>
>>>
>>> Hi all,
>>> I'll use this reference for
>>> implementation, right?
>>> http://savannah.nongnu.org/___**
>>> _download/avr-libc/avr-libc-__**__user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
>>> <http://savannah.nongnu.org/__**
>>> download/avr-libc/avr-libc-__**user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>>> >
>>>
>>>
>>>
>>> <http://savannah.nongnu.org/__**
>>> download/avr-libc/avr-libc-__**user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>>> <http://savannah.nongnu.org/**download/avr-libc/avr-libc-**
>>> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2>
>>> >>
>>>
>>> -Stepan.
>>>
>>> Stepan Dyatkovskiy wrote:
>>> > Ops. Forget to apply patch itself...
>>> >
>>> > -Stepan.
>>> >
>>> > Stepan Dyatkovskiy wrote:
>>> >> Hi all. That's a Thursday patch with
>>> inline asm.
>>> Currently
>>> the only
>>> >> constraint is supported: register
>>> ('r').
>>> >>
>>> >> -Stepan.
>>> >>
>>> >>
>>>
>>> ------------------------------**
>>> ____--------------------------**--__--__------------------
>>>
>>>
>>> >>
>>> >> This SF.net email is sponsored by
>>> Windows:
>>> >>
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>>> >>
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>>> *devel <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel>>
>>>
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>>> net/lists/listinfo/avr-llvm-__**devel
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>>> >>
>>> >
>>> >
>>> >
>>> >
>>>
>>>
>>> ------------------------------**
>>> ____--------------------------**--__--__------------------
>>>
>>>
>>> > This SF.net email is sponsored by
>>> Windows:
>>> >
>>> > Build for Windows Store.
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>>> <http://p.sf.net/sfu/windows-_**_dev2dev<http://p.sf.net/sfu/windows-__dev2dev>
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>>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...>
>>> >>
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>>> <mailto:avr-llvm-devel@lists.>**____sourceforge.net
>>> <http://sourceforge.net>
>>> <mailto:avr-llvm-devel@lists._**_sourceforge.net
>>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...>
>>> >>>
>>>
>>> >
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>>> ____lists/listinfo/avr-llvm-__**devel<https://lists.sourceforge.net/____lists/listinfo/avr-llvm-__devel>
>>> <https://lists.sourceforge.**net/__lists/listinfo/avr-llvm-*
>>> *devel <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel>>
>>>
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>>> net/lists/listinfo/avr-llvm-__**devel
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>>> devel <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel>>>
>>> >
>>>
>>>
>>>
>>>
>>> ------------------------------**
>>> ____--------------------------**--__--__------------------
>>>
>>>
>>> This SF.net email is sponsored by Windows:
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>>> Build for Windows Store.
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>>> >>
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>>> <mailto:avr-llvm-devel@lists.>**____sourceforge.net
>>> <http://sourceforge.net>
>>> <mailto:avr-llvm-devel@lists._**_sourceforge.net
>>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...>
>>> >>>
>>> https://lists.sourceforge.net/**
>>> ____lists/listinfo/avr-llvm-__**devel<https://lists.sourceforge.net/____lists/listinfo/avr-llvm-__devel>
>>> <https://lists.sourceforge.**net/__lists/listinfo/avr-llvm-*
>>> *devel <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel>>
>>>
>>> <https://lists.sourceforge.__**
>>> net/lists/listinfo/avr-llvm-__**devel
>>> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**
>>> devel <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>
>
|
|
From: Borja F. <bor...@gm...> - 2013-06-17 23:38:24
|
Sure Stepan, go ahead. I can do any post commit cleanups afterwards.
2013/6/17 John Myers <ato...@gm...>
> You should have commit access.
>
>
> On Mon, Jun 17, 2013 at 1:35 PM, Stepan Dyatkovskiy <stp...@na...>wrote:
>
>> Hi Borja,
>>
>> 2.1:
>> You're right. Will return C_Register.
>> About Q, I'd want to learn a bit more before it would be implemented.
>> Perhaps there is nothing special, but I'd want to check.
>>
>> 2.2. Yes, we can return cw_constant. I had used ARM template :-) They
>> just had set it as cw_other :-)
>>
>> 3. avr-llvm has appeared in "My Projects" in source forge menu. Does it
>> mean I have permissions already? Can I do test commit (one more \n in
>> README)?
>>
>> 4. I propose to commit everything (with fixes you proposed) to avoid
>> growing snow ball patch ;-)
>>
>> --
>> Truly yours,
>> Stepan Dyatkovskiy
>>
>>
>> 17.06.2013, 22:50, "Borja Ferrer" <bor...@gm...>:
>>
>> Ok thanks for the fixes, more things:
>>
>> 2.1) AVRTargetLowering::getConstraintType: Looking at other backends, I
>> think the x, y, z, t constraints should return C_Register instead of
>> C_RegisterClass since these are used for specific regs inside a regclass.
>> Probably the same for the q one. What do you think?
>>
>> 2.2) Ok, so you've given the largest weight to the bigger regclasses d,
>> r, l and then for the other reg constraints the smaller weight, I agree
>> then.
>> Now, for the constant constraints you should return CW_Constant instead,
>> other backends first check that the imm val is in range and if it is then
>> set it to that value, this is taken from the x86 one:
>> case 'K':
>> if (ConstantInt *C = dyn_cast<ConstantInt>(CallOperandVal)) {
>> if ((C->getSExtValue() >= -0x80) && (C->getSExtValue() <= 0x7f))
>> weight = CW_Constant;
>> }
>> break;
>> Finally for Q we should return CW_Memory no?
>>
>> 2.3) In getRegForInlineAsmConstraint, if this inline asm stuff is run
>> after type legalization you could turn that type checking at the top of the
>> function into an assert()
>> comment: Upper register r16..r32. <<-- typo registerS and r32
>>
>> John or Eric, please give Stepan commit permissions.
>>
>>
>>
>> 2013/6/17 Stepan Dyatkovskiy <stp...@na...>
>>
>> Hello Borja,
>>
>>
>> ok here we go:
>>
>> 1) in AVRRegisterInfo.td: im ok with the lGPR8 regclass since we dont
>> have it yet and i guess it's needed for the l constraint, but rename it
>> to GPR8lo. The hGPR8 regclass comment says lower registers, so typo
>> there, but anyways can't you use the LD8 regclass? Rename simplehGPR8 to
>> LD8lo, we'll need it in the future for some MUL instructions.
>>
>> Everything here were fixed as you mentioned.
>>
>>
>>
>> 2) in AVRISelLowering.cpp: for the t, x, y, z shouldn't we return
>> C_Register? Probably for b aswell.
>> 2.1) in getSingleConstraintMatchWeight can you clarify me what's the
>> diff between CW_SpecificReg and CW_Register. Shouldn't the G constraint
>> be a Constant? Same for the other constraints?
>>
>> All this stuff with weights is due to support of multiple constraints.
>> For some operands you may set *the set* of constraints, e.g. 'mr': get
>> either memory of register. In that case we're use weights. What should we
>> select for 'bx' constraint for example? One of y,z or x? So, currently llvm
>> gets register first from class with bigger weight. Since CW_SpecificReg <
>> CW_Register it will select one of y,z.
>>
>> For more information see implementation of "TargetLowering::**
>> getMultipleConstraintMatchWeig**ht" and "TargetLowering::**
>> ParseConstraints".
>>
>> 'G' shouldn't be CW_Register, of course, that was my typo. I've fixed it,
>> now it as all other constants just a CW_Default.
>>
>>
>> 2.2) in getRegForInlineAsmConstraint fixup the regclasses per point (1).
>> for w you could use the IWREGS regclass, the docs say they are regpairs,
>> not 8 bit regs as you declared in the .td file.
>>
>> That was also fixed.
>>
>> -Stepan.
>>
>>
>> The rest looks great.
>>
>>
>> 2013/6/14 Borja Ferrer <bor...@gm...
>> <mailto:bor...@gm...>**>
>>
>>
>> Going to review the patch now.
>>
>> No, there is no test for allocation order, I don't know a good way
>> of testing that. If you want you can replace the register list by
>> several sequences.
>>
>>
>> 2013/6/14 Stepan Dyatkovskiy <stp...@na...
>> <mailto:stp...@na...>>
>>
>>
>> Hi Borja,
>> All constraints are supported now.
>> The new patch is attached.
>>
>> -- Added support for all documented constraints.
>> -- Fixed tests as you mentioned.
>>
>> Relative to GPR8,
>> Do we have some tests that check allocation order? If so, all of
>> them were passed :-)
>>
>> Though I can use the explicit enumeration way you're currently
>> using...
>>
>> -Stepan.
>>
>> Borja Ferrer wrote:
>>
>> Ok, there are some small style issues but i will fix them
>> after you can
>> commit (braces in AVRAsmPrinter::__**PrintAsmOperand),
>>
>> afterwards you may
>> check them for future reference.
>>
>> About the GPR8 replacement, I'm not sure now, but will it
>> change the
>> register allocation order using the "sequence" set
>> instruction? This was
>> changed some time ago so I dont remember what was the new
>> behaviour.
>> In the test cases please add a CHECK line for the function
>> name, check
>> the other test cases in the folder to see what i mean.
>> You may need to add inline asm support in clang aswell,
>> there are some
>> methods that need to be implemented there inside the AVR
>> classes,
>> probably for error reporting stuff.
>>
>> 1) I dont know of any compatible projects, sorry. I've
>> tested big C
>> programs like a floating point emulation library.
>> 2) for now only the tests there.
>> 3) John please give Stepan commit access to SVN.
>>
>> Heh Eric, that's ok, for inline asm there's no room for
>> optimizations
>> but for other compiler features sure :)
>>
>>
>>
>>
>> 2013/6/13 Stepan Dyatkovskiy <stp...@na...
>> <mailto:stp...@na...> <mailto:stp...@na...
>> <mailto:stp...@na...>>>
>>
>> Hi Borja,
>> This is today patch.
>> 1. Added and tested support for register constraints
>> (a,b,d,e,q,r,t,w,x,y,z,l).
>> 2. Refactored GPR8 registers class, added new registers
>> classes:
>> lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8.
>> 3. Fixed code-style.
>>
>> P.S.: In case you decided to give me commit access:
>> 1. Do you have some AVR projects that are compilable
>> with avr-llvm?
>> I mean kind of llvm's test-suite replacement.
>> 2. What ought to be tested before commit, except the
>> "test/CodeGen/AVR" tests?
>> 3. My SourceForge account name is: "kaomoneus".
>>
>> -Stepan.
>>
>> Borja Ferrer wrote:
>>
>> The patch looks good, some comments about coding
>> style. We use a
>> different standard compared to llvm's, most
>> important things are:
>> 1) braces go into new lines.
>> 2) always place braces even if they're for a 1 line
>> statement
>>
>> this:
>> + std::pair<unsigned, const TargetRegisterClass*>
>> + getRegForInlineAsmConstraint(_**
>> ___const
>>
>> std::string
>>
>> &Constraint,
>> + EVT VT) const;
>> +
>> should be:
>> std::pair<unsigned, const TargetRegisterClass *>
>> << space
>> between
>> name and *
>> getRegForInlineAsmConstraint(_**___const std::string
>>
>> &Constraint,
>> EVT VT) const;
>>
>> this:
>> + ConstraintWeight getSingleConstraintMatchWeight**
>> ____(
>>
>>
>> + AsmOperandInfo &info, const char *constraint)
>> const;
>> should be:
>> ConstraintWeight
>> getSingleConstraintMatchWeight**____(AsmOperandInfo
>>
>> &info,
>>
>>
>> const char
>> *constraint)
>> const;
>>
>>
>> if there are any other small details i can fix them
>> post commit.
>>
>>
>>
>> 2013/6/13 Borja Ferrer <bor...@gm...
>> <mailto:bor...@gm...>
>> <mailto:bor...@gm...
>> <mailto:bor...@gm...>**>
>> <mailto:bor...@gm...
>> <mailto:bor...@gm...> <mailto:bor...@gm...
>> <mailto:bor...@gm...>**>__>__>
>>
>>
>>
>>
>> Nice Stepan, I will review your patch later
>> on. You should
>> be given
>> commit access to this svn repo until we
>> finally decide
>> where to move
>> on all of the code.
>>
>>
>> 2013/6/13 Stepan Dyatkovskiy
>> <stp...@na... <mailto:stp...@na...>
>> <mailto:stp...@na... <mailto:stp...@na...
>> >>
>> <mailto:stp...@na...
>> <mailto:stp...@na...> <mailto:stp...@na...
>> <mailto:stp...@na...>>>>
>>
>>
>>
>> Hi all,
>> I'll use this reference for
>> implementation, right?
>> http://savannah.nongnu.org/___**
>> _download/avr-libc/avr-libc-__**__user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
>> <http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__
>> **user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>> >
>>
>>
>>
>> <http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__
>> **user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>> <http://savannah.nongnu.org/**download/avr-libc/avr-libc-**
>> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2>
>> >>
>>
>> -Stepan.
>>
>> Stepan Dyatkovskiy wrote:
>> > Ops. Forget to apply patch itself...
>> >
>> > -Stepan.
>> >
>> > Stepan Dyatkovskiy wrote:
>> >> Hi all. That's a Thursday patch with
>> inline asm.
>> Currently
>> the only
>> >> constraint is supported: register ('r').
>> >>
>> >> -Stepan.
>> >>
>> >>
>>
>> ------------------------------**
>> ____--------------------------**--__--__------------------
>>
>>
>> >>
>> >> This SF.net email is sponsored by
>> Windows:
>> >>
>> >> Build for Windows Store.
>> >>
>> >>
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>> <http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev>
>> >>
>> >>
>> ______________________________**_____________________
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>> >>
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>> <http://sourceforge.net>
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>> >>
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>> <mailto:avr-llvm-devel@lists.>**____sourceforge.net
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>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...>
>> >>>
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>> >>
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>> ____lists/listinfo/avr-llvm-__**devel<https://lists.sourceforge.net/____lists/listinfo/avr-llvm-__devel>
>> <https://lists.sourceforge.**net/__lists/listinfo/avr-llvm-**
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>> **devel
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>> devel <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel>>>
>> >>
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>> >
>> >
>> >
>>
>>
>> ------------------------------**
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>>
>>
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>> >
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>> <http://p.sf.net/sfu/windows-_**_dev2dev<http://p.sf.net/sfu/windows-__dev2dev>
>> >
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>> >>
>>
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>> >>
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>> <mailto:avr-llvm-devel@lists.>**____sourceforge.net
>> <http://sourceforge.net>
>> <mailto:avr-llvm-devel@lists._**_sourceforge.net
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>> >>>
>> https://lists.sourceforge.net/**
>> ____lists/listinfo/avr-llvm-__**devel<https://lists.sourceforge.net/____lists/listinfo/avr-llvm-__devel>
>> <https://lists.sourceforge.**net/__lists/listinfo/avr-llvm-**
>> devel <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel>>
>>
>> <https://lists.sourceforge.__**net/lists/listinfo/avr-llvm-__
>> **devel
>> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**
>> devel <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel>>>
>>
>>
>>
>>
>>
>>
>>
>>
>
|
|
From: John M. <ato...@gm...> - 2013-06-17 20:39:31
|
You should have commit access.
On Mon, Jun 17, 2013 at 1:35 PM, Stepan Dyatkovskiy <stp...@na...>wrote:
> Hi Borja,
>
> 2.1:
> You're right. Will return C_Register.
> About Q, I'd want to learn a bit more before it would be implemented.
> Perhaps there is nothing special, but I'd want to check.
>
> 2.2. Yes, we can return cw_constant. I had used ARM template :-) They just
> had set it as cw_other :-)
>
> 3. avr-llvm has appeared in "My Projects" in source forge menu. Does it
> mean I have permissions already? Can I do test commit (one more \n in
> README)?
>
> 4. I propose to commit everything (with fixes you proposed) to avoid
> growing snow ball patch ;-)
>
> --
> Truly yours,
> Stepan Dyatkovskiy
>
>
> 17.06.2013, 22:50, "Borja Ferrer" <bor...@gm...>:
>
> Ok thanks for the fixes, more things:
>
> 2.1) AVRTargetLowering::getConstraintType: Looking at other backends, I
> think the x, y, z, t constraints should return C_Register instead of
> C_RegisterClass since these are used for specific regs inside a regclass.
> Probably the same for the q one. What do you think?
>
> 2.2) Ok, so you've given the largest weight to the bigger regclasses d, r,
> l and then for the other reg constraints the smaller weight, I agree then.
> Now, for the constant constraints you should return CW_Constant instead,
> other backends first check that the imm val is in range and if it is then
> set it to that value, this is taken from the x86 one:
> case 'K':
> if (ConstantInt *C = dyn_cast<ConstantInt>(CallOperandVal)) {
> if ((C->getSExtValue() >= -0x80) && (C->getSExtValue() <= 0x7f))
> weight = CW_Constant;
> }
> break;
> Finally for Q we should return CW_Memory no?
>
> 2.3) In getRegForInlineAsmConstraint, if this inline asm stuff is run
> after type legalization you could turn that type checking at the top of the
> function into an assert()
> comment: Upper register r16..r32. <<-- typo registerS and r32
>
> John or Eric, please give Stepan commit permissions.
>
>
>
> 2013/6/17 Stepan Dyatkovskiy <stp...@na...>
>
> Hello Borja,
>
>
> ok here we go:
>
> 1) in AVRRegisterInfo.td: im ok with the lGPR8 regclass since we dont
> have it yet and i guess it's needed for the l constraint, but rename it
> to GPR8lo. The hGPR8 regclass comment says lower registers, so typo
> there, but anyways can't you use the LD8 regclass? Rename simplehGPR8 to
> LD8lo, we'll need it in the future for some MUL instructions.
>
> Everything here were fixed as you mentioned.
>
>
>
> 2) in AVRISelLowering.cpp: for the t, x, y, z shouldn't we return
> C_Register? Probably for b aswell.
> 2.1) in getSingleConstraintMatchWeight can you clarify me what's the
> diff between CW_SpecificReg and CW_Register. Shouldn't the G constraint
> be a Constant? Same for the other constraints?
>
> All this stuff with weights is due to support of multiple constraints. For
> some operands you may set *the set* of constraints, e.g. 'mr': get either
> memory of register. In that case we're use weights. What should we select
> for 'bx' constraint for example? One of y,z or x? So, currently llvm gets
> register first from class with bigger weight. Since CW_SpecificReg <
> CW_Register it will select one of y,z.
>
> For more information see implementation of "TargetLowering::**
> getMultipleConstraintMatchWeig**ht" and "TargetLowering::**
> ParseConstraints".
>
> 'G' shouldn't be CW_Register, of course, that was my typo. I've fixed it,
> now it as all other constants just a CW_Default.
>
>
> 2.2) in getRegForInlineAsmConstraint fixup the regclasses per point (1).
> for w you could use the IWREGS regclass, the docs say they are regpairs,
> not 8 bit regs as you declared in the .td file.
>
> That was also fixed.
>
> -Stepan.
>
>
> The rest looks great.
>
>
> 2013/6/14 Borja Ferrer <bor...@gm...
> <mailto:bor...@gm...>**>
>
>
> Going to review the patch now.
>
> No, there is no test for allocation order, I don't know a good way
> of testing that. If you want you can replace the register list by
> several sequences.
>
>
> 2013/6/14 Stepan Dyatkovskiy <stp...@na...
> <mailto:stp...@na...>>
>
>
> Hi Borja,
> All constraints are supported now.
> The new patch is attached.
>
> -- Added support for all documented constraints.
> -- Fixed tests as you mentioned.
>
> Relative to GPR8,
> Do we have some tests that check allocation order? If so, all of
> them were passed :-)
>
> Though I can use the explicit enumeration way you're currently
> using...
>
> -Stepan.
>
> Borja Ferrer wrote:
>
> Ok, there are some small style issues but i will fix them
> after you can
> commit (braces in AVRAsmPrinter::__**PrintAsmOperand),
>
> afterwards you may
> check them for future reference.
>
> About the GPR8 replacement, I'm not sure now, but will it
> change the
> register allocation order using the "sequence" set
> instruction? This was
> changed some time ago so I dont remember what was the new
> behaviour.
> In the test cases please add a CHECK line for the function
> name, check
> the other test cases in the folder to see what i mean.
> You may need to add inline asm support in clang aswell,
> there are some
> methods that need to be implemented there inside the AVR
> classes,
> probably for error reporting stuff.
>
> 1) I dont know of any compatible projects, sorry. I've
> tested big C
> programs like a floating point emulation library.
> 2) for now only the tests there.
> 3) John please give Stepan commit access to SVN.
>
> Heh Eric, that's ok, for inline asm there's no room for
> optimizations
> but for other compiler features sure :)
>
>
>
>
> 2013/6/13 Stepan Dyatkovskiy <stp...@na...
> <mailto:stp...@na...> <mailto:stp...@na...
> <mailto:stp...@na...>>>
>
> Hi Borja,
> This is today patch.
> 1. Added and tested support for register constraints
> (a,b,d,e,q,r,t,w,x,y,z,l).
> 2. Refactored GPR8 registers class, added new registers
> classes:
> lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8.
> 3. Fixed code-style.
>
> P.S.: In case you decided to give me commit access:
> 1. Do you have some AVR projects that are compilable
> with avr-llvm?
> I mean kind of llvm's test-suite replacement.
> 2. What ought to be tested before commit, except the
> "test/CodeGen/AVR" tests?
> 3. My SourceForge account name is: "kaomoneus".
>
> -Stepan.
>
> Borja Ferrer wrote:
>
> The patch looks good, some comments about coding
> style. We use a
> different standard compared to llvm's, most
> important things are:
> 1) braces go into new lines.
> 2) always place braces even if they're for a 1 line
> statement
>
> this:
> + std::pair<unsigned, const TargetRegisterClass*>
> + getRegForInlineAsmConstraint(_**___const
>
> std::string
>
> &Constraint,
> + EVT VT) const;
> +
> should be:
> std::pair<unsigned, const TargetRegisterClass *>
> << space
> between
> name and *
> getRegForInlineAsmConstraint(_**___const std::string
>
> &Constraint,
> EVT VT) const;
>
> this:
> + ConstraintWeight getSingleConstraintMatchWeight**
> ____(
>
>
> + AsmOperandInfo &info, const char *constraint)
> const;
> should be:
> ConstraintWeight
> getSingleConstraintMatchWeight**____(AsmOperandInfo
>
> &info,
>
>
> const char
> *constraint)
> const;
>
>
> if there are any other small details i can fix them
> post commit.
>
>
>
> 2013/6/13 Borja Ferrer <bor...@gm...
> <mailto:bor...@gm...>
> <mailto:bor...@gm...
> <mailto:bor...@gm...>**>
> <mailto:bor...@gm...
> <mailto:bor...@gm...> <mailto:bor...@gm...
> <mailto:bor...@gm...>**>__>__>
>
>
>
>
> Nice Stepan, I will review your patch later
> on. You should
> be given
> commit access to this svn repo until we
> finally decide
> where to move
> on all of the code.
>
>
> 2013/6/13 Stepan Dyatkovskiy
> <stp...@na... <mailto:stp...@na...>
> <mailto:stp...@na... <mailto:stp...@na...>>
> <mailto:stp...@na...
> <mailto:stp...@na...> <mailto:stp...@na...
> <mailto:stp...@na...>>>>
>
>
>
> Hi all,
> I'll use this reference for
> implementation, right?
> http://savannah.nongnu.org/___**_download/avr-libc/avr-libc-__
> **__user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
> <http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__*
> *user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
> >
>
>
>
> <http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__*
> *user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
> <http://savannah.nongnu.org/**download/avr-libc/avr-libc-**
> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2>
> >>
>
> -Stepan.
>
> Stepan Dyatkovskiy wrote:
> > Ops. Forget to apply patch itself...
> >
> > -Stepan.
> >
> > Stepan Dyatkovskiy wrote:
> >> Hi all. That's a Thursday patch with
> inline asm.
> Currently
> the only
> >> constraint is supported: register ('r').
> >>
> >> -Stepan.
> >>
> >>
>
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>
> >>
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|
From: Borja F. <bor...@gm...> - 2013-06-17 18:50:13
|
Ok thanks for the fixes, more things:
2.1) AVRTargetLowering::getConstraintType: Looking at other backends, I
think the x, y, z, t constraints should return C_Register instead of
C_RegisterClass since these are used for specific regs inside a regclass.
Probably the same for the q one. What do you think?
2.2) Ok, so you've given the largest weight to the bigger regclasses d, r,
l and then for the other reg constraints the smaller weight, I agree then.
Now, for the constant constraints you should return CW_Constant instead,
other backends first check that the imm val is in range and if it is then
set it to that value, this is taken from the x86 one:
case 'K':
if (ConstantInt *C = dyn_cast<ConstantInt>(CallOperandVal)) {
if ((C->getSExtValue() >= -0x80) && (C->getSExtValue() <= 0x7f))
weight = CW_Constant;
}
break;
Finally for Q we should return CW_Memory no?
2.3) In getRegForInlineAsmConstraint, if this inline asm stuff is run after
type legalization you could turn that type checking at the top of the
function into an assert()
comment: Upper register r16..r32. <<-- typo registerS and r32
John or Eric, please give Stepan commit permissions.
2013/6/17 Stepan Dyatkovskiy <stp...@na...>
> Hello Borja,
>
>
> ok here we go:
>>
>> 1) in AVRRegisterInfo.td: im ok with the lGPR8 regclass since we dont
>> have it yet and i guess it's needed for the l constraint, but rename it
>> to GPR8lo. The hGPR8 regclass comment says lower registers, so typo
>> there, but anyways can't you use the LD8 regclass? Rename simplehGPR8 to
>> LD8lo, we'll need it in the future for some MUL instructions.
>>
> Everything here were fixed as you mentioned.
>
>
>
>> 2) in AVRISelLowering.cpp: for the t, x, y, z shouldn't we return
>> C_Register? Probably for b aswell.
>> 2.1) in getSingleConstraintMatchWeight can you clarify me what's the
>> diff between CW_SpecificReg and CW_Register. Shouldn't the G constraint
>> be a Constant? Same for the other constraints?
>>
>
> All this stuff with weights is due to support of multiple constraints. For
> some operands you may set *the set* of constraints, e.g. 'mr': get either
> memory of register. In that case we're use weights. What should we select
> for 'bx' constraint for example? One of y,z or x? So, currently llvm gets
> register first from class with bigger weight. Since CW_SpecificReg <
> CW_Register it will select one of y,z.
>
> For more information see implementation of "TargetLowering::**
> getMultipleConstraintMatchWeig**ht" and "TargetLowering::**
> ParseConstraints".
>
> 'G' shouldn't be CW_Register, of course, that was my typo. I've fixed it,
> now it as all other constants just a CW_Default.
>
>
> 2.2) in getRegForInlineAsmConstraint fixup the regclasses per point (1).
>> for w you could use the IWREGS regclass, the docs say they are regpairs,
>> not 8 bit regs as you declared in the .td file.
>>
> That was also fixed.
>
> -Stepan.
>
>
>> The rest looks great.
>>
>>
>> 2013/6/14 Borja Ferrer <bor...@gm...
>> <mailto:bor...@gm...>**>
>>
>>
>> Going to review the patch now.
>>
>> No, there is no test for allocation order, I don't know a good way
>> of testing that. If you want you can replace the register list by
>> several sequences.
>>
>>
>> 2013/6/14 Stepan Dyatkovskiy <stp...@na...
>> <mailto:stp...@na...>>
>>
>>
>> Hi Borja,
>> All constraints are supported now.
>> The new patch is attached.
>>
>> -- Added support for all documented constraints.
>> -- Fixed tests as you mentioned.
>>
>> Relative to GPR8,
>> Do we have some tests that check allocation order? If so, all of
>> them were passed :-)
>>
>> Though I can use the explicit enumeration way you're currently
>> using...
>>
>> -Stepan.
>>
>> Borja Ferrer wrote:
>>
>> Ok, there are some small style issues but i will fix them
>> after you can
>> commit (braces in AVRAsmPrinter::__**PrintAsmOperand),
>>
>> afterwards you may
>> check them for future reference.
>>
>> About the GPR8 replacement, I'm not sure now, but will it
>> change the
>> register allocation order using the "sequence" set
>> instruction? This was
>> changed some time ago so I dont remember what was the new
>> behaviour.
>> In the test cases please add a CHECK line for the function
>> name, check
>> the other test cases in the folder to see what i mean.
>> You may need to add inline asm support in clang aswell,
>> there are some
>> methods that need to be implemented there inside the AVR
>> classes,
>> probably for error reporting stuff.
>>
>> 1) I dont know of any compatible projects, sorry. I've
>> tested big C
>> programs like a floating point emulation library.
>> 2) for now only the tests there.
>> 3) John please give Stepan commit access to SVN.
>>
>> Heh Eric, that's ok, for inline asm there's no room for
>> optimizations
>> but for other compiler features sure :)
>>
>>
>>
>>
>> 2013/6/13 Stepan Dyatkovskiy <stp...@na...
>> <mailto:stp...@na...> <mailto:stp...@na...
>> <mailto:stp...@na...>>>
>>
>>
>> Hi Borja,
>> This is today patch.
>> 1. Added and tested support for register constraints
>> (a,b,d,e,q,r,t,w,x,y,z,l).
>> 2. Refactored GPR8 registers class, added new registers
>> classes:
>> lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8.
>> 3. Fixed code-style.
>>
>> P.S.: In case you decided to give me commit access:
>> 1. Do you have some AVR projects that are compilable
>> with avr-llvm?
>> I mean kind of llvm's test-suite replacement.
>> 2. What ought to be tested before commit, except the
>> "test/CodeGen/AVR" tests?
>> 3. My SourceForge account name is: "kaomoneus".
>>
>> -Stepan.
>>
>> Borja Ferrer wrote:
>>
>> The patch looks good, some comments about coding
>> style. We use a
>> different standard compared to llvm's, most
>> important things are:
>> 1) braces go into new lines.
>> 2) always place braces even if they're for a 1 line
>> statement
>>
>> this:
>> + std::pair<unsigned, const TargetRegisterClass*>
>> + getRegForInlineAsmConstraint(_**
>> ___const
>>
>> std::string
>>
>> &Constraint,
>> + EVT VT) const;
>> +
>> should be:
>> std::pair<unsigned, const TargetRegisterClass *>
>> << space
>> between
>> name and *
>> getRegForInlineAsmConstraint(_**___const std::string
>>
>> &Constraint,
>> EVT VT) const;
>>
>> this:
>> + ConstraintWeight getSingleConstraintMatchWeight**
>> ____(
>>
>>
>> + AsmOperandInfo &info, const char *constraint)
>> const;
>> should be:
>> ConstraintWeight
>> getSingleConstraintMatchWeight**____(AsmOperandInfo
>>
>> &info,
>>
>>
>> const char
>> *constraint)
>> const;
>>
>>
>> if there are any other small details i can fix them
>> post commit.
>>
>>
>>
>> 2013/6/13 Borja Ferrer <bor...@gm...
>> <mailto:bor...@gm...>
>> <mailto:bor...@gm...
>> <mailto:bor...@gm...>**>
>> <mailto:bor...@gm...
>> <mailto:bor...@gm...> <mailto:bor...@gm...
>> <mailto:bor...@gm...>**>__>__>
>>
>>
>>
>>
>> Nice Stepan, I will review your patch later
>> on. You should
>> be given
>> commit access to this svn repo until we
>> finally decide
>> where to move
>> on all of the code.
>>
>>
>> 2013/6/13 Stepan Dyatkovskiy
>> <stp...@na... <mailto:stp...@na...>
>> <mailto:stp...@na... <mailto:stp...@na...
>> >>
>> <mailto:stp...@na...
>> <mailto:stp...@na...> <mailto:stp...@na...
>> <mailto:stp...@na...>>>>
>>
>>
>>
>> Hi all,
>> I'll use this reference for
>> implementation, right?
>> http://savannah.nongnu.org/___**
>> _download/avr-libc/avr-libc-__**__user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2>
>> <http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__
>> **user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>> >
>>
>>
>>
>> <http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__
>> **user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2>
>> <http://savannah.nongnu.org/**download/avr-libc/avr-libc-**
>> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2>
>> >>
>>
>> -Stepan.
>>
>> Stepan Dyatkovskiy wrote:
>> > Ops. Forget to apply patch itself...
>> >
>> > -Stepan.
>> >
>> > Stepan Dyatkovskiy wrote:
>> >> Hi all. That's a Thursday patch with
>> inline asm.
>> Currently
>> the only
>> >> constraint is supported: register ('r').
>> >>
>> >> -Stepan.
>> >>
>> >>
>>
>>
>> ------------------------------**
>> ____--------------------------**--__--__------------------
>>
>>
>> >>
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|
|
From: Stepan D. <stp...@na...> - 2013-06-17 16:43:24
|
Hello Borja, > ok here we go: > > 1) in AVRRegisterInfo.td: im ok with the lGPR8 regclass since we dont > have it yet and i guess it's needed for the l constraint, but rename it > to GPR8lo. The hGPR8 regclass comment says lower registers, so typo > there, but anyways can't you use the LD8 regclass? Rename simplehGPR8 to > LD8lo, we'll need it in the future for some MUL instructions. Everything here were fixed as you mentioned. > > 2) in AVRISelLowering.cpp: for the t, x, y, z shouldn't we return > C_Register? Probably for b aswell. > 2.1) in getSingleConstraintMatchWeight can you clarify me what's the > diff between CW_SpecificReg and CW_Register. Shouldn't the G constraint > be a Constant? Same for the other constraints? All this stuff with weights is due to support of multiple constraints. For some operands you may set *the set* of constraints, e.g. 'mr': get either memory of register. In that case we're use weights. What should we select for 'bx' constraint for example? One of y,z or x? So, currently llvm gets register first from class with bigger weight. Since CW_SpecificReg < CW_Register it will select one of y,z. For more information see implementation of "TargetLowering::getMultipleConstraintMatchWeight" and "TargetLowering::ParseConstraints". 'G' shouldn't be CW_Register, of course, that was my typo. I've fixed it, now it as all other constants just a CW_Default. > 2.2) in getRegForInlineAsmConstraint fixup the regclasses per point (1). > for w you could use the IWREGS regclass, the docs say they are regpairs, > not 8 bit regs as you declared in the .td file. That was also fixed. -Stepan. > > The rest looks great. > > > 2013/6/14 Borja Ferrer <bor...@gm... > <mailto:bor...@gm...>> > > Going to review the patch now. > > No, there is no test for allocation order, I don't know a good way > of testing that. If you want you can replace the register list by > several sequences. > > > 2013/6/14 Stepan Dyatkovskiy <stp...@na... > <mailto:stp...@na...>> > > Hi Borja, > All constraints are supported now. > The new patch is attached. > > -- Added support for all documented constraints. > -- Fixed tests as you mentioned. > > Relative to GPR8, > Do we have some tests that check allocation order? If so, all of > them were passed :-) > > Though I can use the explicit enumeration way you're currently > using... > > -Stepan. > > Borja Ferrer wrote: > > Ok, there are some small style issues but i will fix them > after you can > commit (braces in AVRAsmPrinter::__PrintAsmOperand), > afterwards you may > check them for future reference. > > About the GPR8 replacement, I'm not sure now, but will it > change the > register allocation order using the "sequence" set > instruction? This was > changed some time ago so I dont remember what was the new > behaviour. > In the test cases please add a CHECK line for the function > name, check > the other test cases in the folder to see what i mean. > You may need to add inline asm support in clang aswell, > there are some > methods that need to be implemented there inside the AVR > classes, > probably for error reporting stuff. > > 1) I dont know of any compatible projects, sorry. I've > tested big C > programs like a floating point emulation library. > 2) for now only the tests there. > 3) John please give Stepan commit access to SVN. > > Heh Eric, that's ok, for inline asm there's no room for > optimizations > but for other compiler features sure :) > > > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na... > <mailto:stp...@na...> <mailto:stp...@na... > <mailto:stp...@na...>>> > > > Hi Borja, > This is today patch. > 1. Added and tested support for register constraints > (a,b,d,e,q,r,t,w,x,y,z,l). > 2. Refactored GPR8 registers class, added new registers > classes: > lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8. > 3. Fixed code-style. > > P.S.: In case you decided to give me commit access: > 1. Do you have some AVR projects that are compilable > with avr-llvm? > I mean kind of llvm's test-suite replacement. > 2. What ought to be tested before commit, except the > "test/CodeGen/AVR" tests? > 3. My SourceForge account name is: "kaomoneus". > > -Stepan. > > Borja Ferrer wrote: > > The patch looks good, some comments about coding > style. We use a > different standard compared to llvm's, most > important things are: > 1) braces go into new lines. > 2) always place braces even if they're for a 1 line > statement > > this: > + std::pair<unsigned, const TargetRegisterClass*> > + getRegForInlineAsmConstraint(____const > std::string > > &Constraint, > + EVT VT) const; > + > should be: > std::pair<unsigned, const TargetRegisterClass *> > << space > between > name and * > getRegForInlineAsmConstraint(____const std::string > &Constraint, > EVT VT) const; > > this: > + ConstraintWeight getSingleConstraintMatchWeight____( > > + AsmOperandInfo &info, const char *constraint) > const; > should be: > ConstraintWeight > getSingleConstraintMatchWeight____(AsmOperandInfo > &info, > > > const char > *constraint) > const; > > > if there are any other small details i can fix them > post commit. > > > > 2013/6/13 Borja Ferrer <bor...@gm... > <mailto:bor...@gm...> > <mailto:bor...@gm... > <mailto:bor...@gm...>> > <mailto:bor...@gm... > <mailto:bor...@gm...> <mailto:bor...@gm... > <mailto:bor...@gm...>>__>__> > > > > Nice Stepan, I will review your patch later > on. You should > be given > commit access to this svn repo until we > finally decide > where to move > on all of the code. > > > 2013/6/13 Stepan Dyatkovskiy > <stp...@na... <mailto:stp...@na...> > <mailto:stp...@na... <mailto:stp...@na...>> > <mailto:stp...@na... > <mailto:stp...@na...> <mailto:stp...@na... > <mailto:stp...@na...>>>> > > > > Hi all, > I'll use this reference for > implementation, right? > http://savannah.nongnu.org/____download/avr-libc/avr-libc-____user-manual-1.8.0.pdf.bz2 > <http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2> > > > <http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2 > <http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2>> > > -Stepan. > > Stepan Dyatkovskiy wrote: > > Ops. Forget to apply patch itself... > > > > -Stepan. > > > > Stepan Dyatkovskiy wrote: > >> Hi all. That's a Thursday patch with > inline asm. > Currently > the only > >> constraint is supported: register ('r'). > >> > >> -Stepan. > >> > >> > > > ------------------------------____----------------------------__--__------------------ > > >> > >> This SF.net email is sponsored by Windows: > >> > >> Build for Windows Store. > >> > >> > http://p.sf.net/sfu/windows-____dev2dev > <http://p.sf.net/sfu/windows-__dev2dev> > <http://p.sf.net/sfu/windows-__dev2dev > <http://p.sf.net/sfu/windows-dev2dev>> > >> > ___________________________________________________ > >> avr-llvm-devel mailing list > >> > avr-llvm-devel@lists.__sourcef__orge.net > <http://sourceforge.net> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>> > <mailto:avr-llvm-devel@lists. > <mailto:avr-llvm-devel@lists.>____sourceforge.net > <http://sourceforge.net> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>>> > > >> > https://lists.sourceforge.net/____lists/listinfo/avr-llvm-__devel > <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> > > <https://lists.sourceforge.__net/lists/listinfo/avr-llvm-__devel > <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel>> > >> > > > > > > > > > > > ------------------------------____----------------------------__--__------------------ > > > This SF.net email is sponsored by Windows: > > > > Build for Windows Store. > > > > http://p.sf.net/sfu/windows-____dev2dev > <http://p.sf.net/sfu/windows-__dev2dev> > <http://p.sf.net/sfu/windows-__dev2dev > <http://p.sf.net/sfu/windows-dev2dev>> > > > > > > > > > ___________________________________________________ > > avr-llvm-devel mailing list > > > avr-llvm-devel@lists.__sourcef__orge.net > <http://sourceforge.net> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>> > <mailto:avr-llvm-devel@lists. > <mailto:avr-llvm-devel@lists.>____sourceforge.net > <http://sourceforge.net> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>>> > > > > https://lists.sourceforge.net/____lists/listinfo/avr-llvm-__devel > <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> > > <https://lists.sourceforge.__net/lists/listinfo/avr-llvm-__devel > <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel>> > > > > > > > ------------------------------____----------------------------__--__------------------ > > This SF.net email is sponsored by Windows: > > Build for Windows Store. > > http://p.sf.net/sfu/windows-____dev2dev > <http://p.sf.net/sfu/windows-__dev2dev> > <http://p.sf.net/sfu/windows-__dev2dev > <http://p.sf.net/sfu/windows-dev2dev>> > > ___________________________________________________ > avr-llvm-devel mailing list > avr-llvm-devel@lists.__sourcef__orge.net > <http://sourceforge.net> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>> > <mailto:avr-llvm-devel@lists. > <mailto:avr-llvm-devel@lists.>____sourceforge.net > <http://sourceforge.net> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>>> > https://lists.sourceforge.net/____lists/listinfo/avr-llvm-__devel > <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> > > <https://lists.sourceforge.__net/lists/listinfo/avr-llvm-__devel > <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel>> > > > > > > > > |
|
From: Borja F. <bor...@gm...> - 2013-06-14 20:38:15
|
ok here we go: 1) in AVRRegisterInfo.td: im ok with the lGPR8 regclass since we dont have it yet and i guess it's needed for the l constraint, but rename it to GPR8lo. The hGPR8 regclass comment says lower registers, so typo there, but anyways can't you use the LD8 regclass? Rename simplehGPR8 to LD8lo, we'll need it in the future for some MUL instructions. 2) in AVRISelLowering.cpp: for the t, x, y, z shouldn't we return C_Register? Probably for b aswell. 2.1) in getSingleConstraintMatchWeight can you clarify me what's the diff between CW_SpecificReg and CW_Register. Shouldn't the G constraint be a Constant? Same for the other constraints? 2.2) in getRegForInlineAsmConstraint fixup the regclasses per point (1). for w you could use the IWREGS regclass, the docs say they are regpairs, not 8 bit regs as you declared in the .td file. The rest looks great. 2013/6/14 Borja Ferrer <bor...@gm...> > Going to review the patch now. > > No, there is no test for allocation order, I don't know a good way of > testing that. If you want you can replace the register list by several > sequences. > > > 2013/6/14 Stepan Dyatkovskiy <stp...@na...> > >> Hi Borja, >> All constraints are supported now. >> The new patch is attached. >> >> -- Added support for all documented constraints. >> -- Fixed tests as you mentioned. >> >> Relative to GPR8, >> Do we have some tests that check allocation order? If so, all of them >> were passed :-) >> >> Though I can use the explicit enumeration way you're currently using... >> >> -Stepan. >> >> Borja Ferrer wrote: >> >>> Ok, there are some small style issues but i will fix them after you can >>> commit (braces in AVRAsmPrinter::**PrintAsmOperand), afterwards you may >>> check them for future reference. >>> >>> About the GPR8 replacement, I'm not sure now, but will it change the >>> register allocation order using the "sequence" set instruction? This was >>> changed some time ago so I dont remember what was the new behaviour. >>> In the test cases please add a CHECK line for the function name, check >>> the other test cases in the folder to see what i mean. >>> You may need to add inline asm support in clang aswell, there are some >>> methods that need to be implemented there inside the AVR classes, >>> probably for error reporting stuff. >>> >>> 1) I dont know of any compatible projects, sorry. I've tested big C >>> programs like a floating point emulation library. >>> 2) for now only the tests there. >>> 3) John please give Stepan commit access to SVN. >>> >>> Heh Eric, that's ok, for inline asm there's no room for optimizations >>> but for other compiler features sure :) >>> >>> >>> >>> >>> 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto: >>> stp...@na...>> >>> >>> >>> Hi Borja, >>> This is today patch. >>> 1. Added and tested support for register constraints >>> (a,b,d,e,q,r,t,w,x,y,z,l). >>> 2. Refactored GPR8 registers class, added new registers classes: >>> lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8. >>> 3. Fixed code-style. >>> >>> P.S.: In case you decided to give me commit access: >>> 1. Do you have some AVR projects that are compilable with avr-llvm? >>> I mean kind of llvm's test-suite replacement. >>> 2. What ought to be tested before commit, except the >>> "test/CodeGen/AVR" tests? >>> 3. My SourceForge account name is: "kaomoneus". >>> >>> -Stepan. >>> >>> Borja Ferrer wrote: >>> >>> The patch looks good, some comments about coding style. We use a >>> different standard compared to llvm's, most important things are: >>> 1) braces go into new lines. >>> 2) always place braces even if they're for a 1 line statement >>> >>> this: >>> + std::pair<unsigned, const TargetRegisterClass*> >>> + getRegForInlineAsmConstraint(_**_const std::string >>> >>> &Constraint, >>> + EVT VT) const; >>> + >>> should be: >>> std::pair<unsigned, const TargetRegisterClass *> << space >>> between >>> name and * >>> getRegForInlineAsmConstraint(_**_const std::string &Constraint, >>> EVT VT) const; >>> >>> this: >>> + ConstraintWeight getSingleConstraintMatchWeight**__( >>> >>> + AsmOperandInfo &info, const char *constraint) const; >>> should be: >>> ConstraintWeight >>> getSingleConstraintMatchWeight**__(AsmOperandInfo &info, >>> >>> const char >>> *constraint) >>> const; >>> >>> >>> if there are any other small details i can fix them post commit. >>> >>> >>> >>> 2013/6/13 Borja Ferrer <bor...@gm... >>> <mailto:bor...@gm...> >>> <mailto:bor...@gm... <mailto:bor...@gm...>** >>> >__> >>> >>> >>> >>> Nice Stepan, I will review your patch later on. You should >>> be given >>> commit access to this svn repo until we finally decide >>> where to move >>> on all of the code. >>> >>> >>> 2013/6/13 Stepan Dyatkovskiy <stp...@na... >>> <mailto:stp...@na...> >>> <mailto:stp...@na... <mailto:stp...@na...>>> >>> >>> >>> >>> Hi all, >>> I'll use this reference for implementation, right? >>> http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__** >>> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2> >>> >>> <http://savannah.nongnu.org/**download/avr-libc/avr-libc-** >>> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2> >>> > >>> >>> -Stepan. >>> >>> Stepan Dyatkovskiy wrote: >>> > Ops. Forget to apply patch itself... >>> > >>> > -Stepan. >>> > >>> > Stepan Dyatkovskiy wrote: >>> >> Hi all. That's a Thursday patch with inline asm. >>> Currently >>> the only >>> >> constraint is supported: register ('r'). >>> >> >>> >> -Stepan. >>> >> >>> >> >>> >>> ------------------------------**__----------------------------** >>> --__------------------ >>> >>> >> >>> >> This SF.net email is sponsored by Windows: >>> >> >>> >> Build for Windows Store. >>> >> >>> >> http://p.sf.net/sfu/windows-__**dev2dev<http://p.sf.net/sfu/windows-__dev2dev> >>> <http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >>> > >>> >> ______________________________**___________________ >>> >> avr-llvm-devel mailing list >>> >> avr-llvm-devel@lists.__sourcef**orge.net<http://sourceforge.net> >>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >>> > >>> <mailto:avr-llvm-devel@lists._**_sourceforge.net >>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >>> >> >>> >>> >> >>> https://lists.sourceforge.net/**__lists/listinfo/avr-llvm-** >>> devel <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> >>> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >>> > >>> >> >>> > >>> > >>> > >>> > >>> >>> ------------------------------**__----------------------------** >>> --__------------------ >>> >>> > This SF.net email is sponsored by Windows: >>> > >>> > Build for Windows Store. >>> > >>> > http://p.sf.net/sfu/windows-__**dev2dev<http://p.sf.net/sfu/windows-__dev2dev> >>> <http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >>> > >>> > >>> > >>> > >>> > ______________________________**___________________ >>> > avr-llvm-devel mailing list >>> > avr-llvm-devel@lists.__sourcef**orge.net<http://sourceforge.net> >>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >>> > >>> <mailto:avr-llvm-devel@lists._**_sourceforge.net >>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >>> >> >>> >>> > >>> https://lists.sourceforge.net/**__lists/listinfo/avr-llvm-** >>> devel <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> >>> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >>> > >>> > >>> >>> >>> >>> ------------------------------**__----------------------------** >>> --__------------------ >>> >>> This SF.net email is sponsored by Windows: >>> >>> Build for Windows Store. >>> >>> http://p.sf.net/sfu/windows-__**dev2dev<http://p.sf.net/sfu/windows-__dev2dev> >>> <http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >>> > >>> ______________________________**___________________ >>> avr-llvm-devel mailing list >>> avr-llvm-devel@lists.__sourcef**orge.net<http://sourceforge.net> >>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >>> > >>> <mailto:avr-llvm-devel@lists._**_sourceforge.net >>> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >>> >> >>> https://lists.sourceforge.net/**__lists/listinfo/avr-llvm-** >>> devel <https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> >>> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >>> > >>> >>> >>> >>> >>> >>> >> > |
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From: Borja F. <bor...@gm...> - 2013-06-14 19:45:11
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Going to review the patch now. No, there is no test for allocation order, I don't know a good way of testing that. If you want you can replace the register list by several sequences. 2013/6/14 Stepan Dyatkovskiy <stp...@na...> > Hi Borja, > All constraints are supported now. > The new patch is attached. > > -- Added support for all documented constraints. > -- Fixed tests as you mentioned. > > Relative to GPR8, > Do we have some tests that check allocation order? If so, all of them were > passed :-) > > Though I can use the explicit enumeration way you're currently using... > > -Stepan. > > Borja Ferrer wrote: > >> Ok, there are some small style issues but i will fix them after you can >> commit (braces in AVRAsmPrinter::**PrintAsmOperand), afterwards you may >> check them for future reference. >> >> About the GPR8 replacement, I'm not sure now, but will it change the >> register allocation order using the "sequence" set instruction? This was >> changed some time ago so I dont remember what was the new behaviour. >> In the test cases please add a CHECK line for the function name, check >> the other test cases in the folder to see what i mean. >> You may need to add inline asm support in clang aswell, there are some >> methods that need to be implemented there inside the AVR classes, >> probably for error reporting stuff. >> >> 1) I dont know of any compatible projects, sorry. I've tested big C >> programs like a floating point emulation library. >> 2) for now only the tests there. >> 3) John please give Stepan commit access to SVN. >> >> Heh Eric, that's ok, for inline asm there's no room for optimizations >> but for other compiler features sure :) >> >> >> >> >> 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto:stp...@na... >> >> >> >> >> Hi Borja, >> This is today patch. >> 1. Added and tested support for register constraints >> (a,b,d,e,q,r,t,w,x,y,z,l). >> 2. Refactored GPR8 registers class, added new registers classes: >> lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8. >> 3. Fixed code-style. >> >> P.S.: In case you decided to give me commit access: >> 1. Do you have some AVR projects that are compilable with avr-llvm? >> I mean kind of llvm's test-suite replacement. >> 2. What ought to be tested before commit, except the >> "test/CodeGen/AVR" tests? >> 3. My SourceForge account name is: "kaomoneus". >> >> -Stepan. >> >> Borja Ferrer wrote: >> >> The patch looks good, some comments about coding style. We use a >> different standard compared to llvm's, most important things are: >> 1) braces go into new lines. >> 2) always place braces even if they're for a 1 line statement >> >> this: >> + std::pair<unsigned, const TargetRegisterClass*> >> + getRegForInlineAsmConstraint(_**_const std::string >> >> &Constraint, >> + EVT VT) const; >> + >> should be: >> std::pair<unsigned, const TargetRegisterClass *> << space >> between >> name and * >> getRegForInlineAsmConstraint(_**_const std::string &Constraint, >> EVT VT) const; >> >> this: >> + ConstraintWeight getSingleConstraintMatchWeight**__( >> >> + AsmOperandInfo &info, const char *constraint) const; >> should be: >> ConstraintWeight >> getSingleConstraintMatchWeight**__(AsmOperandInfo &info, >> >> const char >> *constraint) >> const; >> >> >> if there are any other small details i can fix them post commit. >> >> >> >> 2013/6/13 Borja Ferrer <bor...@gm... >> <mailto:bor...@gm...> >> <mailto:bor...@gm... <mailto:bor...@gm...>** >> >__> >> >> >> >> Nice Stepan, I will review your patch later on. You should >> be given >> commit access to this svn repo until we finally decide >> where to move >> on all of the code. >> >> >> 2013/6/13 Stepan Dyatkovskiy <stp...@na... >> <mailto:stp...@na...> >> <mailto:stp...@na... <mailto:stp...@na...>>> >> >> >> >> Hi all, >> I'll use this reference for implementation, right? >> http://savannah.nongnu.org/__**download/avr-libc/avr-libc-__** >> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2> >> >> <http://savannah.nongnu.org/**download/avr-libc/avr-libc-** >> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2> >> > >> >> -Stepan. >> >> Stepan Dyatkovskiy wrote: >> > Ops. Forget to apply patch itself... >> > >> > -Stepan. >> > >> > Stepan Dyatkovskiy wrote: >> >> Hi all. That's a Thursday patch with inline asm. >> Currently >> the only >> >> constraint is supported: register ('r'). >> >> >> >> -Stepan. >> >> >> >> >> >> ------------------------------**__----------------------------** >> --__------------------ >> >> >> >> >> This SF.net email is sponsored by Windows: >> >> >> >> Build for Windows Store. >> >> >> >> http://p.sf.net/sfu/windows-__**dev2dev<http://p.sf.net/sfu/windows-__dev2dev> >> <http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >> > >> >> ______________________________**___________________ >> >> avr-llvm-devel mailing list >> >> avr-llvm-devel@lists.__sourcef**orge.net<http://sourceforge.net> >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> > >> <mailto:avr-llvm-devel@lists._**_sourceforge.net >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> >> >> >> >> >> https://lists.sourceforge.net/**__lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> >> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >> > >> >> >> > >> > >> > >> > >> >> ------------------------------**__----------------------------** >> --__------------------ >> >> > This SF.net email is sponsored by Windows: >> > >> > Build for Windows Store. >> > >> > http://p.sf.net/sfu/windows-__**dev2dev<http://p.sf.net/sfu/windows-__dev2dev> >> <http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >> > >> > >> > >> > >> > ______________________________**___________________ >> > avr-llvm-devel mailing list >> > avr-llvm-devel@lists.__sourcef**orge.net<http://sourceforge.net> >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> > >> <mailto:avr-llvm-devel@lists._**_sourceforge.net >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> >> >> >> > >> https://lists.sourceforge.net/**__lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> >> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >> > >> > >> >> >> >> ------------------------------**__----------------------------** >> --__------------------ >> >> This SF.net email is sponsored by Windows: >> >> Build for Windows Store. >> >> http://p.sf.net/sfu/windows-__**dev2dev<http://p.sf.net/sfu/windows-__dev2dev> >> <http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >> > >> ______________________________**___________________ >> avr-llvm-devel mailing list >> avr-llvm-devel@lists.__sourcef**orge.net <http://sourceforge.net> >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> > >> <mailto:avr-llvm-devel@lists._**_sourceforge.net >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> >> >> https://lists.sourceforge.net/**__lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel> >> <https://lists.sourceforge.**net/lists/listinfo/avr-llvm-**devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >> > >> >> >> >> >> >> > |
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From: Stepan D. <stp...@na...> - 2013-06-14 13:16:49
|
Hi Borja, All constraints are supported now. The new patch is attached. -- Added support for all documented constraints. -- Fixed tests as you mentioned. Relative to GPR8, Do we have some tests that check allocation order? If so, all of them were passed :-) Though I can use the explicit enumeration way you're currently using... -Stepan. Borja Ferrer wrote: > Ok, there are some small style issues but i will fix them after you can > commit (braces in AVRAsmPrinter::PrintAsmOperand), afterwards you may > check them for future reference. > > About the GPR8 replacement, I'm not sure now, but will it change the > register allocation order using the "sequence" set instruction? This was > changed some time ago so I dont remember what was the new behaviour. > In the test cases please add a CHECK line for the function name, check > the other test cases in the folder to see what i mean. > You may need to add inline asm support in clang aswell, there are some > methods that need to be implemented there inside the AVR classes, > probably for error reporting stuff. > > 1) I dont know of any compatible projects, sorry. I've tested big C > programs like a floating point emulation library. > 2) for now only the tests there. > 3) John please give Stepan commit access to SVN. > > Heh Eric, that's ok, for inline asm there's no room for optimizations > but for other compiler features sure :) > > > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto:stp...@na...>> > > Hi Borja, > This is today patch. > 1. Added and tested support for register constraints > (a,b,d,e,q,r,t,w,x,y,z,l). > 2. Refactored GPR8 registers class, added new registers classes: > lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8. > 3. Fixed code-style. > > P.S.: In case you decided to give me commit access: > 1. Do you have some AVR projects that are compilable with avr-llvm? > I mean kind of llvm's test-suite replacement. > 2. What ought to be tested before commit, except the > "test/CodeGen/AVR" tests? > 3. My SourceForge account name is: "kaomoneus". > > -Stepan. > > Borja Ferrer wrote: > > The patch looks good, some comments about coding style. We use a > different standard compared to llvm's, most important things are: > 1) braces go into new lines. > 2) always place braces even if they're for a 1 line statement > > this: > + std::pair<unsigned, const TargetRegisterClass*> > + getRegForInlineAsmConstraint(__const std::string > &Constraint, > + EVT VT) const; > + > should be: > std::pair<unsigned, const TargetRegisterClass *> << space > between > name and * > getRegForInlineAsmConstraint(__const std::string &Constraint, > EVT VT) const; > > this: > + ConstraintWeight getSingleConstraintMatchWeight__( > + AsmOperandInfo &info, const char *constraint) const; > should be: > ConstraintWeight > getSingleConstraintMatchWeight__(AsmOperandInfo &info, > const char > *constraint) > const; > > > if there are any other small details i can fix them post commit. > > > > 2013/6/13 Borja Ferrer <bor...@gm... > <mailto:bor...@gm...> > <mailto:bor...@gm... <mailto:bor...@gm...>>__> > > > Nice Stepan, I will review your patch later on. You should > be given > commit access to this svn repo until we finally decide > where to move > on all of the code. > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na... > <mailto:stp...@na...> > <mailto:stp...@na... <mailto:stp...@na...>>> > > > Hi all, > I'll use this reference for implementation, right? > http://savannah.nongnu.org/__download/avr-libc/avr-libc-__user-manual-1.8.0.pdf.bz2 > <http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2> > > -Stepan. > > Stepan Dyatkovskiy wrote: > > Ops. Forget to apply patch itself... > > > > -Stepan. > > > > Stepan Dyatkovskiy wrote: > >> Hi all. That's a Thursday patch with inline asm. > Currently > the only > >> constraint is supported: register ('r'). > >> > >> -Stepan. > >> > >> > > ------------------------------__------------------------------__------------------ > >> > >> This SF.net email is sponsored by Windows: > >> > >> Build for Windows Store. > >> > >> http://p.sf.net/sfu/windows-__dev2dev > <http://p.sf.net/sfu/windows-dev2dev> > >> _________________________________________________ > >> avr-llvm-devel mailing list > >> avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>> > > >> > https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel > <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> > >> > > > > > > > > > > ------------------------------__------------------------------__------------------ > > This SF.net email is sponsored by Windows: > > > > Build for Windows Store. > > > > http://p.sf.net/sfu/windows-__dev2dev > <http://p.sf.net/sfu/windows-dev2dev> > > > > > > > > _________________________________________________ > > avr-llvm-devel mailing list > > avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>> > > > > https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel > <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> > > > > > > ------------------------------__------------------------------__------------------ > This SF.net email is sponsored by Windows: > > Build for Windows Store. > > http://p.sf.net/sfu/windows-__dev2dev > <http://p.sf.net/sfu/windows-dev2dev> > _________________________________________________ > avr-llvm-devel mailing list > avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...> > <mailto:avr-llvm-devel@lists.__sourceforge.net > <mailto:avr...@li...>> > https://lists.sourceforge.net/__lists/listinfo/avr-llvm-devel > <https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> > > > > > |
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From: Stepan D. <stp...@na...> - 2013-06-14 11:23:51
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Configure and cmake .diff files. -Stepan Rick Mann wrote: > Fantastic work! > > On Jun 13, 2013, at 19:01 , Borja Ferrer <bor...@gm...> wrote: > >> We're back up to date with llvm ToT, all tests passed again, if there are any further issues let me know. Clang updated patches will follow tomorrow. >> >> >> 2013/6/14 Borja Ferrer <bor...@gm...> >> Oops no, committed thanks! >> I've updated all patches except the configure ones because you usually regenerate them so I'll leave that to you. >> >> >> 2013/6/14 John Myers <ato...@gm...> >> Did you check it out with you user name? >> US...@sv.../p/avr-llvm/code/ avr-llvm-code >> >> >> On Thu, Jun 13, 2013 at 3:21 PM, Borja Ferrer <bor...@gm...> wrote: >> Ahh I see, I will take a look. >> >> John can you check if i have commit access in the new svn repo, I've checked it out from here: http://svn.code.sf.net/p/avr-llvm/code/ but I get an error when i try to commit something. >> >> >> 2013/6/13 Stepan Dyatkovskiy <stp...@na...> >> Hi Borja, >> >> Sorry, I didn't write out assertion message. But all AVR tests were failed. >> >> IMHO, I did wrong fix in AVRISelLowering.cpp, line 243 (lookup comment "// TODO: Need test-case.."), some stuff with live-out regs. >> >> And in AVRRegisterInfo.td, I had replaced SubRegIndex with SubRegIndex<8, 8>, while I didn't learn enough how it should be replaced properly. >> >> All other changes seems to be trivial. >> >> -Stepan. >> >> Borja Ferrer wrote: >> Thanks Stepan! Why is this patch not working though? >> >> >> 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto:stp...@na...>> >> >> >> Borja Ferrer wrote: >> > Tonight i will try to make our code compat again with LLVM ToT. >> >> Do you need my old sync patch for reference? It doesn't works, but >> in general, you can see what had been changed... >> Just in case, I've reattached it. >> >> -Stepan >> >> >> >> >> >> >> >> ------------------------------------------------------------------------------ >> This SF.net email is sponsored by Windows: >> >> Build for Windows Store. >> >> http://p.sf.net/sfu/windows-dev2dev_______________________________________________ >> avr-llvm-devel mailing list >> avr...@li... >> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel > > |
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From: Rick M. <rm...@la...> - 2013-06-14 02:23:38
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Fantastic work! On Jun 13, 2013, at 19:01 , Borja Ferrer <bor...@gm...> wrote: > We're back up to date with llvm ToT, all tests passed again, if there are any further issues let me know. Clang updated patches will follow tomorrow. > > > 2013/6/14 Borja Ferrer <bor...@gm...> > Oops no, committed thanks! > I've updated all patches except the configure ones because you usually regenerate them so I'll leave that to you. > > > 2013/6/14 John Myers <ato...@gm...> > Did you check it out with you user name? > US...@sv.../p/avr-llvm/code/ avr-llvm-code > > > On Thu, Jun 13, 2013 at 3:21 PM, Borja Ferrer <bor...@gm...> wrote: > Ahh I see, I will take a look. > > John can you check if i have commit access in the new svn repo, I've checked it out from here: http://svn.code.sf.net/p/avr-llvm/code/ but I get an error when i try to commit something. > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na...> > Hi Borja, > > Sorry, I didn't write out assertion message. But all AVR tests were failed. > > IMHO, I did wrong fix in AVRISelLowering.cpp, line 243 (lookup comment "// TODO: Need test-case.."), some stuff with live-out regs. > > And in AVRRegisterInfo.td, I had replaced SubRegIndex with SubRegIndex<8, 8>, while I didn't learn enough how it should be replaced properly. > > All other changes seems to be trivial. > > -Stepan. > > Borja Ferrer wrote: > Thanks Stepan! Why is this patch not working though? > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto:stp...@na...>> > > > Borja Ferrer wrote: > > Tonight i will try to make our code compat again with LLVM ToT. > > Do you need my old sync patch for reference? It doesn't works, but > in general, you can see what had been changed... > Just in case, I've reattached it. > > -Stepan > > > > > > > > ------------------------------------------------------------------------------ > This SF.net email is sponsored by Windows: > > Build for Windows Store. > > http://p.sf.net/sfu/windows-dev2dev_______________________________________________ > avr-llvm-devel mailing list > avr...@li... > https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel -- Rick |
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From: Borja F. <bor...@gm...> - 2013-06-14 02:01:41
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We're back up to date with llvm ToT, all tests passed again, if there are any further issues let me know. Clang updated patches will follow tomorrow. 2013/6/14 Borja Ferrer <bor...@gm...> > Oops no, committed thanks! > I've updated all patches except the configure ones because you usually > regenerate them so I'll leave that to you. > > > 2013/6/14 John Myers <ato...@gm...> > >> Did you check it out with you user name? >> US...@sv.../p/avr-llvm/code/ avr-llvm-code >> >> >> On Thu, Jun 13, 2013 at 3:21 PM, Borja Ferrer <bor...@gm...>wrote: >> >>> Ahh I see, I will take a look. >>> >>> John can you check if i have commit access in the new svn repo, I've >>> checked it out from here: http://svn.code.sf.net/p/avr-llvm/code/ but >>> I get an error when i try to commit something. >>> >>> >>> 2013/6/13 Stepan Dyatkovskiy <stp...@na...> >>> >>>> Hi Borja, >>>> >>>> Sorry, I didn't write out assertion message. But all AVR tests were >>>> failed. >>>> >>>> IMHO, I did wrong fix in AVRISelLowering.cpp, line 243 (lookup comment >>>> "// TODO: Need test-case.."), some stuff with live-out regs. >>>> >>>> And in AVRRegisterInfo.td, I had replaced SubRegIndex with >>>> SubRegIndex<8, 8>, while I didn't learn enough how it should be replaced >>>> properly. >>>> >>>> All other changes seems to be trivial. >>>> >>>> -Stepan. >>>> >>>> Borja Ferrer wrote: >>>> >>>>> Thanks Stepan! Why is this patch not working though? >>>>> >>>>> >>>>> 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto: >>>>> stp...@na...>> >>>>> >>>>> >>>>> Borja Ferrer wrote: >>>>> > Tonight i will try to make our code compat again with LLVM ToT. >>>>> >>>>> Do you need my old sync patch for reference? It doesn't works, but >>>>> in general, you can see what had been changed... >>>>> Just in case, I've reattached it. >>>>> >>>>> -Stepan >>>>> >>>>> >>>>> >>>> >>> >> > |
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From: Borja F. <bor...@gm...> - 2013-06-13 23:00:13
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Oops no, committed thanks! I've updated all patches except the configure ones because you usually regenerate them so I'll leave that to you. 2013/6/14 John Myers <ato...@gm...> > Did you check it out with you user name? > US...@sv.../p/avr-llvm/code/ avr-llvm-code > > > On Thu, Jun 13, 2013 at 3:21 PM, Borja Ferrer <bor...@gm...>wrote: > >> Ahh I see, I will take a look. >> >> John can you check if i have commit access in the new svn repo, I've >> checked it out from here: http://svn.code.sf.net/p/avr-llvm/code/ but I >> get an error when i try to commit something. >> >> >> 2013/6/13 Stepan Dyatkovskiy <stp...@na...> >> >>> Hi Borja, >>> >>> Sorry, I didn't write out assertion message. But all AVR tests were >>> failed. >>> >>> IMHO, I did wrong fix in AVRISelLowering.cpp, line 243 (lookup comment >>> "// TODO: Need test-case.."), some stuff with live-out regs. >>> >>> And in AVRRegisterInfo.td, I had replaced SubRegIndex with >>> SubRegIndex<8, 8>, while I didn't learn enough how it should be replaced >>> properly. >>> >>> All other changes seems to be trivial. >>> >>> -Stepan. >>> >>> Borja Ferrer wrote: >>> >>>> Thanks Stepan! Why is this patch not working though? >>>> >>>> >>>> 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto: >>>> stp...@na...>> >>>> >>>> >>>> Borja Ferrer wrote: >>>> > Tonight i will try to make our code compat again with LLVM ToT. >>>> >>>> Do you need my old sync patch for reference? It doesn't works, but >>>> in general, you can see what had been changed... >>>> Just in case, I've reattached it. >>>> >>>> -Stepan >>>> >>>> >>>> >>> >> > |
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From: John M. <ato...@gm...> - 2013-06-13 22:34:34
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Did you check it out with you user name? US...@sv.../p/avr-llvm/code/ avr-llvm-code On Thu, Jun 13, 2013 at 3:21 PM, Borja Ferrer <bor...@gm...> wrote: > Ahh I see, I will take a look. > > John can you check if i have commit access in the new svn repo, I've > checked it out from here: http://svn.code.sf.net/p/avr-llvm/code/ but I > get an error when i try to commit something. > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na...> > >> Hi Borja, >> >> Sorry, I didn't write out assertion message. But all AVR tests were >> failed. >> >> IMHO, I did wrong fix in AVRISelLowering.cpp, line 243 (lookup comment >> "// TODO: Need test-case.."), some stuff with live-out regs. >> >> And in AVRRegisterInfo.td, I had replaced SubRegIndex with SubRegIndex<8, >> 8>, while I didn't learn enough how it should be replaced properly. >> >> All other changes seems to be trivial. >> >> -Stepan. >> >> Borja Ferrer wrote: >> >>> Thanks Stepan! Why is this patch not working though? >>> >>> >>> 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto: >>> stp...@na...>> >>> >>> >>> Borja Ferrer wrote: >>> > Tonight i will try to make our code compat again with LLVM ToT. >>> >>> Do you need my old sync patch for reference? It doesn't works, but >>> in general, you can see what had been changed... >>> Just in case, I've reattached it. >>> >>> -Stepan >>> >>> >>> >> > |
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From: Borja F. <bor...@gm...> - 2013-06-13 22:21:24
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Ahh I see, I will take a look. John can you check if i have commit access in the new svn repo, I've checked it out from here: http://svn.code.sf.net/p/avr-llvm/code/ but I get an error when i try to commit something. 2013/6/13 Stepan Dyatkovskiy <stp...@na...> > Hi Borja, > > Sorry, I didn't write out assertion message. But all AVR tests were failed. > > IMHO, I did wrong fix in AVRISelLowering.cpp, line 243 (lookup comment "// > TODO: Need test-case.."), some stuff with live-out regs. > > And in AVRRegisterInfo.td, I had replaced SubRegIndex with SubRegIndex<8, > 8>, while I didn't learn enough how it should be replaced properly. > > All other changes seems to be trivial. > > -Stepan. > > Borja Ferrer wrote: > >> Thanks Stepan! Why is this patch not working though? >> >> >> 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto:stp...@na... >> >> >> >> >> Borja Ferrer wrote: >> > Tonight i will try to make our code compat again with LLVM ToT. >> >> Do you need my old sync patch for reference? It doesn't works, but >> in general, you can see what had been changed... >> Just in case, I've reattached it. >> >> -Stepan >> >> >> > |
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From: Stepan D. <stp...@na...> - 2013-06-13 18:47:41
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Hi Borja, Sorry, I didn't write out assertion message. But all AVR tests were failed. IMHO, I did wrong fix in AVRISelLowering.cpp, line 243 (lookup comment "// TODO: Need test-case.."), some stuff with live-out regs. And in AVRRegisterInfo.td, I had replaced SubRegIndex with SubRegIndex<8, 8>, while I didn't learn enough how it should be replaced properly. All other changes seems to be trivial. -Stepan. Borja Ferrer wrote: > Thanks Stepan! Why is this patch not working though? > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na... <mailto:stp...@na...>> > > Borja Ferrer wrote: > > Tonight i will try to make our code compat again with LLVM ToT. > > Do you need my old sync patch for reference? It doesn't works, but > in general, you can see what had been changed... > Just in case, I've reattached it. > > -Stepan > > |
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From: Borja F. <bor...@gm...> - 2013-06-13 18:29:45
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Thanks Stepan! Why is this patch not working though? 2013/6/13 Stepan Dyatkovskiy <stp...@na...> > Borja Ferrer wrote: > > Tonight i will try to make our code compat again with LLVM ToT. > > Do you need my old sync patch for reference? It doesn't works, but in > general, you can see what had been changed... > Just in case, I've reattached it. > > -Stepan > > |
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From: Stepan D. <stp...@na...> - 2013-06-13 17:44:26
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Borja Ferrer wrote: > Tonight i will try to make our code compat again with LLVM ToT. Do you need my old sync patch for reference? It doesn't works, but in general, you can see what had been changed... Just in case, I've reattached it. -Stepan |
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From: Borja F. <bor...@gm...> - 2013-06-13 16:09:57
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Haha that's fine Eric, indeed. I don't have very much experience with inline asm, but if there are ways to make it better than GCC we will add them, you probably know improvements since you worked for the c lib. One important thing for this specific topic is that we will able to easily compile avr-libc since it has a lot of inline asm present. On the other side for example one thing that avr-llvm is not going to support is the PROGMEM horrible hack, we support prog data through the named address space extension which is the correct way of doing it. Ok we're breaking gcc compat because users will have to adopt the new way but adding support for this would be a huge step back. So yes it's all a matter of balence. Nice to see that atmel spaces is gaining popularity :) Tonight i will try to make our code compat again with LLVM ToT. 2013/6/13 Weddington, Eric <Eri...@at...> > > -----Original Message----- > > From: Borja Ferrer [mailto:bor...@gm...] > > Sent: Thursday, June 13, 2013 9:48 AM > > To: Stepan Dyatkovskiy > > Cc: avr-llvm > > Subject: Re: [avr-llvm-devel] Inline assembly. Mostly just a stub. > > > > Heh Eric, that's ok, for inline asm there's no room for optimizations > > but for other compiler features sure :) > > > > I guess what I'm trying to say is this: > - We don't need to be a slave to what GCC does, if you think there is a > better way to do something > - However, I can tell you that GCC compatibility will also be a fast road > to adoption. > > It's a balance between the two. I would like to see a fast adoption of AVR > LLVM. But I would also like to see AVR LLVM be better than what can be done > with AVR GCC too, even if takes time to do that. ;-) > > If the easy path right now is to implement inline assembly like what GCC > does, then let me just get out of the way. :-) > > Eric > |
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From: Borja F. <bor...@gm...> - 2013-06-13 15:48:11
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Ok, there are some small style issues but i will fix them after you can commit (braces in AVRAsmPrinter::PrintAsmOperand), afterwards you may check them for future reference. About the GPR8 replacement, I'm not sure now, but will it change the register allocation order using the "sequence" set instruction? This was changed some time ago so I dont remember what was the new behaviour. In the test cases please add a CHECK line for the function name, check the other test cases in the folder to see what i mean. You may need to add inline asm support in clang aswell, there are some methods that need to be implemented there inside the AVR classes, probably for error reporting stuff. 1) I dont know of any compatible projects, sorry. I've tested big C programs like a floating point emulation library. 2) for now only the tests there. 3) John please give Stepan commit access to SVN. Heh Eric, that's ok, for inline asm there's no room for optimizations but for other compiler features sure :) 2013/6/13 Stepan Dyatkovskiy <stp...@na...> > Hi Borja, > This is today patch. > 1. Added and tested support for register constraints > (a,b,d,e,q,r,t,w,x,y,z,l). > 2. Refactored GPR8 registers class, added new registers classes: lGPR8, > hGPR8, simplehGPR8 and specialUpperGPR8. > 3. Fixed code-style. > > P.S.: In case you decided to give me commit access: > 1. Do you have some AVR projects that are compilable with avr-llvm? I mean > kind of llvm's test-suite replacement. > 2. What ought to be tested before commit, except the "test/CodeGen/AVR" > tests? > 3. My SourceForge account name is: "kaomoneus". > > -Stepan. > > Borja Ferrer wrote: > >> The patch looks good, some comments about coding style. We use a >> different standard compared to llvm's, most important things are: >> 1) braces go into new lines. >> 2) always place braces even if they're for a 1 line statement >> >> this: >> + std::pair<unsigned, const TargetRegisterClass*> >> + getRegForInlineAsmConstraint(**const std::string >> &Constraint, >> + EVT VT) const; >> + >> should be: >> std::pair<unsigned, const TargetRegisterClass *> << space between >> name and * >> getRegForInlineAsmConstraint(**const std::string &Constraint, EVT VT) >> const; >> >> this: >> + ConstraintWeight getSingleConstraintMatchWeight**( >> + AsmOperandInfo &info, const char *constraint) const; >> should be: >> ConstraintWeight >> getSingleConstraintMatchWeight**(AsmOperandInfo &info, >> const char *constraint) >> const; >> >> >> if there are any other small details i can fix them post commit. >> >> >> >> 2013/6/13 Borja Ferrer <bor...@gm... >> <mailto:bor...@gm...>**> >> >> >> Nice Stepan, I will review your patch later on. You should be given >> commit access to this svn repo until we finally decide where to move >> on all of the code. >> >> >> 2013/6/13 Stepan Dyatkovskiy <stp...@na... >> <mailto:stp...@na...>> >> >> >> Hi all, >> I'll use this reference for implementation, right? >> http://savannah.nongnu.org/**download/avr-libc/avr-libc-** >> user-manual-1.8.0.pdf.bz2<http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2> >> >> -Stepan. >> >> Stepan Dyatkovskiy wrote: >> > Ops. Forget to apply patch itself... >> > >> > -Stepan. >> > >> > Stepan Dyatkovskiy wrote: >> >> Hi all. That's a Thursday patch with inline asm. Currently >> the only >> >> constraint is supported: register ('r'). >> >> >> >> -Stepan. >> >> >> >> >> ------------------------------**------------------------------** >> ------------------ >> >> >> >> This SF.net email is sponsored by Windows: >> >> >> >> Build for Windows Store. >> >> >> >> http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >> >> ______________________________**_________________ >> >> avr-llvm-devel mailing list >> >> avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> > >> >> >> https://lists.sourceforge.net/**lists/listinfo/avr-llvm-devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >> >> >> > >> > >> > >> > >> ------------------------------**------------------------------** >> ------------------ >> > This SF.net email is sponsored by Windows: >> > >> > Build for Windows Store. >> > >> > http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >> > >> > >> > >> > ______________________________**_________________ >> > avr-llvm-devel mailing list >> > avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> > >> >> > https://lists.sourceforge.net/**lists/listinfo/avr-llvm-devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >> > >> >> >> ------------------------------**------------------------------** >> ------------------ >> This SF.net email is sponsored by Windows: >> >> Build for Windows Store. >> >> http://p.sf.net/sfu/windows-**dev2dev<http://p.sf.net/sfu/windows-dev2dev> >> ______________________________**_________________ >> avr-llvm-devel mailing list >> avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> <mailto:avr-llvm-devel@lists.**sourceforge.net<avr...@li...> >> > >> https://lists.sourceforge.net/**lists/listinfo/avr-llvm-devel<https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel> >> >> >> >> > |
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From: Stepan D. <stp...@na...> - 2013-06-13 15:12:53
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Hi Borja, This is today patch. 1. Added and tested support for register constraints (a,b,d,e,q,r,t,w,x,y,z,l). 2. Refactored GPR8 registers class, added new registers classes: lGPR8, hGPR8, simplehGPR8 and specialUpperGPR8. 3. Fixed code-style. P.S.: In case you decided to give me commit access: 1. Do you have some AVR projects that are compilable with avr-llvm? I mean kind of llvm's test-suite replacement. 2. What ought to be tested before commit, except the "test/CodeGen/AVR" tests? 3. My SourceForge account name is: "kaomoneus". -Stepan. Borja Ferrer wrote: > The patch looks good, some comments about coding style. We use a > different standard compared to llvm's, most important things are: > 1) braces go into new lines. > 2) always place braces even if they're for a 1 line statement > > this: > + std::pair<unsigned, const TargetRegisterClass*> > + getRegForInlineAsmConstraint(const std::string &Constraint, > + EVT VT) const; > + > should be: > std::pair<unsigned, const TargetRegisterClass *> << space between > name and * > getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; > > this: > + ConstraintWeight getSingleConstraintMatchWeight( > + AsmOperandInfo &info, const char *constraint) const; > should be: > ConstraintWeight > getSingleConstraintMatchWeight(AsmOperandInfo &info, > const char *constraint) > const; > > > if there are any other small details i can fix them post commit. > > > > 2013/6/13 Borja Ferrer <bor...@gm... > <mailto:bor...@gm...>> > > Nice Stepan, I will review your patch later on. You should be given > commit access to this svn repo until we finally decide where to move > on all of the code. > > > 2013/6/13 Stepan Dyatkovskiy <stp...@na... > <mailto:stp...@na...>> > > Hi all, > I'll use this reference for implementation, right? > http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2 > > -Stepan. > > Stepan Dyatkovskiy wrote: > > Ops. Forget to apply patch itself... > > > > -Stepan. > > > > Stepan Dyatkovskiy wrote: > >> Hi all. That's a Thursday patch with inline asm. Currently > the only > >> constraint is supported: register ('r'). > >> > >> -Stepan. > >> > >> > ------------------------------------------------------------------------------ > >> > >> This SF.net email is sponsored by Windows: > >> > >> Build for Windows Store. > >> > >> http://p.sf.net/sfu/windows-dev2dev > >> _______________________________________________ > >> avr-llvm-devel mailing list > >> avr...@li... > <mailto:avr...@li...> > >> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel > >> > > > > > > > > > ------------------------------------------------------------------------------ > > This SF.net email is sponsored by Windows: > > > > Build for Windows Store. > > > > http://p.sf.net/sfu/windows-dev2dev > > > > > > > > _______________________________________________ > > avr-llvm-devel mailing list > > avr...@li... > <mailto:avr...@li...> > > https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel > > > > > ------------------------------------------------------------------------------ > This SF.net email is sponsored by Windows: > > Build for Windows Store. > > http://p.sf.net/sfu/windows-dev2dev > _______________________________________________ > avr-llvm-devel mailing list > avr...@li... > <mailto:avr...@li...> > https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel > > > |
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From: Weddington, E. <Eri...@at...> - 2013-06-13 14:17:46
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BTW, while I like the idea of being compatible with GCC, if there are definite ways to be better than GCC (better, in terms of space optimization) then I'm also very open to doing things different than GCC. :-) Eric > -----Original Message----- > From: Stepan Dyatkovskiy [mailto:stp...@na...] > Sent: Thursday, June 13, 2013 3:01 AM > To: avr-llvm > Subject: Re: [avr-llvm-devel] Inline assembly. Mostly just a stub. > > Hi all, > I'll use this reference for implementation, right? > http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual- > 1.8.0.pdf.bz2 > > -Stepan. > > Stepan Dyatkovskiy wrote: > > Ops. Forget to apply patch itself... > > > > -Stepan. > > > > Stepan Dyatkovskiy wrote: > >> Hi all. That's a Thursday patch with inline asm. Currently the only > >> constraint is supported: register ('r'). > >> > >> -Stepan. > >> > >> -------------------------------------------------------------------- > ---------- > >> > >> This SF.net email is sponsored by Windows: > >> > >> Build for Windows Store. > >> > >> http://p.sf.net/sfu/windows-dev2dev > >> _______________________________________________ > >> avr-llvm-devel mailing list > >> avr...@li... > >> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel > >> > > > > > > > > --------------------------------------------------------------------- > --------- > > This SF.net email is sponsored by Windows: > > > > Build for Windows Store. > > > > http://p.sf.net/sfu/windows-dev2dev > > > > > > > > _______________________________________________ > > avr-llvm-devel mailing list > > avr...@li... > > https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel > > > > > ----------------------------------------------------------------------- > ------- > This SF.net email is sponsored by Windows: > > Build for Windows Store. > > http://p.sf.net/sfu/windows-dev2dev > _______________________________________________ > avr-llvm-devel mailing list > avr...@li... > https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel |
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From: Borja F. <bor...@gm...> - 2013-06-13 12:46:55
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The patch looks good, some comments about coding style. We use a different
standard compared to llvm's, most important things are:
1) braces go into new lines.
2) always place braces even if they're for a 1 line statement
this:
+ std::pair<unsigned, const TargetRegisterClass*>
+ getRegForInlineAsmConstraint(const std::string &Constraint,
+ EVT VT) const;
+
should be:
std::pair<unsigned, const TargetRegisterClass *> << space between name
and *
getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
this:
+ ConstraintWeight getSingleConstraintMatchWeight(
+ AsmOperandInfo &info, const char *constraint) const;
should be:
ConstraintWeight
getSingleConstraintMatchWeight(AsmOperandInfo &info,
const char *constraint)
const;
if there are any other small details i can fix them post commit.
2013/6/13 Borja Ferrer <bor...@gm...>
> Nice Stepan, I will review your patch later on. You should be given commit
> access to this svn repo until we finally decide where to move on all of the
> code.
>
>
> 2013/6/13 Stepan Dyatkovskiy <stp...@na...>
>
>> Hi all,
>> I'll use this reference for implementation, right?
>>
>> http://savannah.nongnu.org/download/avr-libc/avr-libc-user-manual-1.8.0.pdf.bz2
>>
>> -Stepan.
>>
>> Stepan Dyatkovskiy wrote:
>> > Ops. Forget to apply patch itself...
>> >
>> > -Stepan.
>> >
>> > Stepan Dyatkovskiy wrote:
>> >> Hi all. That's a Thursday patch with inline asm. Currently the only
>> >> constraint is supported: register ('r').
>> >>
>> >> -Stepan.
>> >>
>> >>
>> ------------------------------------------------------------------------------
>> >>
>> >> This SF.net email is sponsored by Windows:
>> >>
>> >> Build for Windows Store.
>> >>
>> >> http://p.sf.net/sfu/windows-dev2dev
>> >> _______________________________________________
>> >> avr-llvm-devel mailing list
>> >> avr...@li...
>> >> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel
>> >>
>> >
>> >
>> >
>> >
>> ------------------------------------------------------------------------------
>> > This SF.net email is sponsored by Windows:
>> >
>> > Build for Windows Store.
>> >
>> > http://p.sf.net/sfu/windows-dev2dev
>> >
>> >
>> >
>> > _______________________________________________
>> > avr-llvm-devel mailing list
>> > avr...@li...
>> > https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel
>> >
>>
>>
>>
>> ------------------------------------------------------------------------------
>> This SF.net email is sponsored by Windows:
>>
>> Build for Windows Store.
>>
>> http://p.sf.net/sfu/windows-dev2dev
>> _______________________________________________
>> avr-llvm-devel mailing list
>> avr...@li...
>> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel
>>
>
>
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