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From: Borja F. <bor...@gm...> - 2012-05-22 22:51:08
|
Yes, that's something handled by llvm, not the backend so we can't do too much there, although it would be a nice optimization to do. 2012/5/23 Nicklas Bo Jensen <nbj...@gm...> > Thanks for the explanation. It's clear :) > > Out of curiosity, why are the pushes and pops in the example below? movw > leaves r17:r14 unchanged. Do we simply push and pop all registers to be on > the safe side and limited static analysis? > > llvm: > define i32 @return32_arg2(i32 %x, i32 %y, i32 %z) { > ret i32 %z > } > > asm: > return32_arg2: > push r14 > push r15 > push r16 > push r17 > movw r23:r22, r15:r14 > movw r25:r24, r17:r16 > pop r17 > pop r16 > pop r15 > pop r14 > > On Tue, May 22, 2012 at 11:32 PM, Borja Ferrer <bor...@gm...>wrote: > >> Here you have a link that explains how registers are used: >> www.nongnu.org/avr-libc/user-manual/FAQ.html#faq_reg_usage >> Testing a calling convention without knowing how it actually works is >> going to be an insane task to do xD >> >> About your question, when you read that link all will become clear but >> basically here is what's going on. Arguments are passed from r25 down to >> r8, since in this case three 64bit args can't fit in those registers the >> last argument is passed through the stack, so you get: >> arg1 is in: r25-r18 >> arg2 is in: r17-r10 >> arg3 obviously doesn't fit in 2 register so it's all passed through the >> stack, thats why you get those loads. Notice that the lowest part of the >> argument is in Y+5 because in +4 and +3 is r29:r28 you just pushed and in >> +2 +1 is the the return address that was pushed into the stack after the >> call was performed. >> >> Another thing, you should add checks on the pushes and pops for the >> callee saved registers so we're sure that they're being saved. >> >> >> >> 2012/5/22 Nicklas Bo Jensen <nbj...@gm...> >> >>> Perfect :) >>> >>> I'm moving on to calling convention and have started with return values. >>> However I'm a bit unsure what the calling convention actually is. For >>> example with my last test, called "return64_arg2" in the attached .ll file >>> and the generated assembly in the .s file, is the correct thing happening >>> and how it should be tested? Couldn't we have passed the arguments in the >>> normal registers? I.e. r25:r2. >>> >>> If the arguments don't fit in the registers, do we always store the >>> result in the same place in ram? >>> >>> >>> On Mon, May 21, 2012 at 11:38 PM, Borja Ferrer <bor...@gm...>wrote: >>> >>>> Nice, so now you have the same test failures as me, they are caused >>>> because we're using custom address space stuff in clang, dont worry about >>>> those. Basically they fail because these tests are writing into address >>>> space 1 which is flash data and that is forbidden in our target (remember >>>> flash memory is readonly). >>>> >>>> The test cases you just commited look great :) To which ones are you >>>> going to move on next? >>>> >>>> Yes, that code looks correct, where is the problem? >>>> >>>> >>>> 2012/5/21 Nicklas Bo Jensen <nbj...@gm...> >>>> >>>>> Is the following generated code correct: >>>>> >>>>> LLVM: >>>>> >>>>> define i8 @return8_arg(i8 %x) { >>>>> ret i8 %x >>>>> } >>>>> >>>>> Generated: >>>>> >>>>> return8_arg: >>>>> ret >>>>> >>>>> >>>>> Something similar in .c compiling with avr-gcc gives a few pushes, >>>>> loads and pops. >>>>> >>>>> On Mon, May 21, 2012 at 10:48 PM, Nicklas Bo Jensen < >>>>> nbj...@gm...> wrote: >>>>> >>>>>> When adding those targets I only have 10 unexpected failures: >>>>>> >>>>>> Clang :: CodeGen/address-space-compound-literal.c >>>>>> Clang :: CodeGen/address-space-field1.c >>>>>> Clang :: CodeGen/address-space.c >>>>>> Clang :: CodeGenCXX/mangle-address-space.cpp >>>>>> Clang :: PCH/types.c >>>>>> Clang :: Sema/address_spaces.c >>>>>> Clang :: SemaCXX/address-space-conversion.cpp >>>>>> Clang :: SemaCXX/address-space-newdelete.cpp >>>>>> Clang :: SemaCXX/address-space-references.cpp >>>>>> Clang :: SemaTemplate/address-spaces.cpp >>>>>> >>>>>> I will try to run each test separately and try to figure out why they >>>>>> are failing. I have also attached the test output. >>>>>> >>>>>> I'm also committing tests for and, or and xor in a minute. They are >>>>>> really simple and similar to the add and sub tests. Please review these :) >>>>>> >>>>>> >>>>>> On Mon, May 14, 2012 at 11:32 PM, Borja Ferrer <bor...@gm... >>>>>> > wrote: >>>>>> >>>>>>> Did you try adding the x86 and x64 targets with the avr one? It's >>>>>>> something related with an unsopported target. >>>>>>> >>>>>>> Good question, I think there's no need to do reg+imm for xor. >>>>>>> >>>>>>> Btw remember to add the SF mailing list so we can have a record ;) >>>>>>> >>>>>>> >>>>>>> 2012/5/14 Nicklas Bo Jensen <nbj...@gm...> >>>>>>> >>>>>>>> Sorry, that is the llvm+clang trunk gives me 13 unsupported tests, >>>>>>>> i.e. no failures versus the avr-llvm giving me 280 unexpected failures. >>>>>>>> >>>>>>>> >>>>>>>> On Mon, May 14, 2012 at 9:08 PM, Nicklas Bo Jensen < >>>>>>>> nbj...@gm...> wrote: >>>>>>>> >>>>>>>>> Hi, >>>>>>>>> >>>>>>>>> BTW, the newest llvm and clang trunk only gives me 13 unexpected >>>>>>>>> failures compared to the the newest trunk with avr-llvm where i get 280 >>>>>>>>> unexpected failures. >>>>>>>>> >>>>>>>>> Considering the regression tests for xor, does it make sense to >>>>>>>>> test reg+imm, as the avr assembler does not have xor for immediate? >>>>>>>>> >>>>>>>>> >>>>>>>>> On Thu, May 10, 2012 at 9:12 PM, Borja Ferrer < >>>>>>>>> bor...@gm...> wrote: >>>>>>>>> >>>>>>>>>> I don't think so, but I configured llvm to support both x86 and >>>>>>>>>> x64, so maybe that could help, in fact I can't build clang if I don't add >>>>>>>>>> support for x86. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> 2012/5/10 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>> >>>>>>>>>>> Target: x86_64-unknown-linux-gnu >>>>>>>>>>> >>>>>>>>>>> But I only configured for avr... Did I do something wrong? >>>>>>>>>>> >>>>>>>>>>> On Thu, May 10, 2012 at 5:32 PM, Borja Ferrer < >>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>> >>>>>>>>>>>> This is what I'm getting: >>>>>>>>>>>> >>>>>>>>>>>> Expected Passes : 9914 >>>>>>>>>>>> Expected Failures : 66 >>>>>>>>>>>> Unsupported Tests : 569 >>>>>>>>>>>> Unexpected Failures: 11 >>>>>>>>>>>> >>>>>>>>>>>> I've seen in that file you attached that you're getting errors >>>>>>>>>>>> because of the target triple, errors like: >>>>>>>>>>>> >>>>>>>>>>>> error: unable to create target: 'No available targets are compatible with this triple, see -version for the available targets.' >>>>>>>>>>>> >>>>>>>>>>>> or >>>>>>>>>>>> >>>>>>>>>>>> error auto-selecting target for module 'No available targets are compatible with this triple, see -version for the available targets >>>>>>>>>>>> >>>>>>>>>>>> so I guess that's the reason, so what is your target triple? do >>>>>>>>>>>> clang -v to get it, mine is i386-pc-linux-gnu >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> 2012/5/10 Borja Ferrer <bor...@gm...> >>>>>>>>>>>> >>>>>>>>>>>>> Interesting, I'll check it out tomorrow to see if I can find >>>>>>>>>>>>> some reason behind this, because we're getting very different results here. >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> 2012/5/9 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>> >>>>>>>>>>>>>> Sorry for my slow response.Got i working again now, thanks. >>>>>>>>>>>>>> >>>>>>>>>>>>>> Building with optimization disabled and assertions turned on >>>>>>>>>>>>>> i get: >>>>>>>>>>>>>> >>>>>>>>>>>>>> Avr llvm+clang: >>>>>>>>>>>>>> Expected Passes : 6978 >>>>>>>>>>>>>> Expected Failures : 39 >>>>>>>>>>>>>> Unsupported Tests : 3281 >>>>>>>>>>>>>> Unexpected Failures: 279 >>>>>>>>>>>>>> >>>>>>>>>>>>>> In the 279 unexpected failures for example 143 of them are >>>>>>>>>>>>>> test/CodeGen/Generic. I'm not really sure how these tests are supposed to >>>>>>>>>>>>>> work? None of them seems to be using FileCheck. >>>>>>>>>>>>>> >>>>>>>>>>>>>> However building for msp430 seems to be giving me similar >>>>>>>>>>>>>> results, indicating that it is not a avr-llvm specific problem. Please see >>>>>>>>>>>>>> the attached output "make check-all" from avr-llvm. >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> On Fri, May 4, 2012 at 11:30 PM, Borja Ferrer < >>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> I'm asking because last week you said that you were getting >>>>>>>>>>>>>>> +200 fails, and since I'm getting 11 I wanted to know what's going on. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> faluco is me btw, I updated a patch today because I got a >>>>>>>>>>>>>>> conflict when updating my clang repo. These variables are defined in >>>>>>>>>>>>>>> DiagnosticSemaKinds.td so check that you have them, they come from the >>>>>>>>>>>>>>> flash.diff patch. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> The new tests should pass. I cannot check other tests now, >>>>>>>>>>>>>>>> I'm having some issues after applying the newest patches that came in today >>>>>>>>>>>>>>>> by faluco: >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: >>>>>>>>>>>>>>>> error: >>>>>>>>>>>>>>>> no member named 'err_flash_variable_requires_const' >>>>>>>>>>>>>>>> in namespace >>>>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>>>>>> diag::err_flash_variable_requires_const); >>>>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: >>>>>>>>>>>>>>>> error: >>>>>>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>>>>>> namespace >>>>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>>>>>> diag::err_flash_pointer_requires_const); >>>>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: >>>>>>>>>>>>>>>> error: >>>>>>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>>>>>> namespace >>>>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>>>> Diag(NameLoc, diag::err_flash_pointer_requires_const); >>>>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>>>> Have i done something wrong? >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer < >>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> How many tests failures are you getting now? >>>>>>>>>>>>>>>>> I'm getting 11, 10 from clang due to address space stuff >>>>>>>>>>>>>>>>> (you'll need to patch clang to get those) and 1 from llvm. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> Ah, perfect. >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> I would actually guess that you need to run "make >>>>>>>>>>>>>>>>>> check-all" before being able to test new tests individually. Sorry :) >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer < >>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> Nevermind, got it. >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> Thanks! >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> One thing, i dont have llvm-lit in that dir, am I >>>>>>>>>>>>>>>>>>>> supposed to build llvm with an addtional param or something in order to get >>>>>>>>>>>>>>>>>>>> it? >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> Ok, I've committed now. To only run the AVR specific >>>>>>>>>>>>>>>>>>>>> tests run something like: >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> ./build/Debug+Asserts/bin/llvm-lit >>>>>>>>>>>>>>>>>>>>> llvm/test/CodeGen/AVR/ >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer < >>>>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Oh a small one I've just noticed, leave only 1 >>>>>>>>>>>>>>>>>>>>>> newline between tests not 2. >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> Ok they look great now, I don't have any other >>>>>>>>>>>>>>>>>>>>>>> objections. Please commit this test to SVN, post your SF username here so >>>>>>>>>>>>>>>>>>>>>>> that Eric or John can give you commit permissions. Once it gets commited >>>>>>>>>>>>>>>>>>>>>>> I'll check if I need to add any pattern specific tests to it, these tests >>>>>>>>>>>>>>>>>>>>>>> are corner cases of some instructions. >>>>>>>>>>>>>>>>>>>>>>> Before commiting it, remove the testcases dir with >>>>>>>>>>>>>>>>>>>>>>> all the files there, and create a new one called test/CodeGen/AVR, and >>>>>>>>>>>>>>>>>>>>>>> place your file there, just to keep the same structure like in llvm's repo. >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> About the rest of tests to do, from that list remove >>>>>>>>>>>>>>>>>>>>>>> mul and division for now, mul isn't yet implemented and division can come >>>>>>>>>>>>>>>>>>>>>>> later. Sub tests should be very similar to add, then add binary ops (or, >>>>>>>>>>>>>>>>>>>>>>> and, xor). Add calling convention tests (argument passing through regs and >>>>>>>>>>>>>>>>>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> There are quite a few tests to add, but for now do >>>>>>>>>>>>>>>>>>>>>>> the sub and binary op tests and we'll discuss the others by then. >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> 1) Sure >>>>>>>>>>>>>>>>>>>>>>>> 2) Yes, I've followed the msp430 backend that does >>>>>>>>>>>>>>>>>>>>>>>> include it. I've removed it now. >>>>>>>>>>>>>>>>>>>>>>>> 3) Again, I've moved the CHECK lines, but it >>>>>>>>>>>>>>>>>>>>>>>> differs from backend to backend. >>>>>>>>>>>>>>>>>>>>>>>> 4) Done >>>>>>>>>>>>>>>>>>>>>>>> 5) Done >>>>>>>>>>>>>>>>>>>>>>>> 6) Done >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> I will continue working other tests, which do we >>>>>>>>>>>>>>>>>>>>>>>> need? Something like(and please add/comment): >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> -Sub >>>>>>>>>>>>>>>>>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>>>>>>>>>>>>>>>>> -mult >>>>>>>>>>>>>>>>>>>>>>>> -Return argument(In a few variants) >>>>>>>>>>>>>>>>>>>>>>>> -and >>>>>>>>>>>>>>>>>>>>>>>> -or >>>>>>>>>>>>>>>>>>>>>>>> -xor >>>>>>>>>>>>>>>>>>>>>>>> -increment >>>>>>>>>>>>>>>>>>>>>>>> -branching? >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> Any ideas? >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> Obviously in the last line I meant adiw or >>>>>>>>>>>>>>>>>>>>>>>>> subi/sbci pair, add for immediates doesn't exist for imms greater than 63 >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> They look good, very nice :) >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> 1) I think it's not necessary to add the >>>>>>>>>>>>>>>>>>>>>>>>>> reg_reg_imm variant because you covered it with the other two tests. >>>>>>>>>>>>>>>>>>>>>>>>>> 2) Do the tests work if you remove the target >>>>>>>>>>>>>>>>>>>>>>>>>> triple line? I've seen other backends don't include it. >>>>>>>>>>>>>>>>>>>>>>>>>> 3) Move the CHECK lines after the function >>>>>>>>>>>>>>>>>>>>>>>>>> prototype like other backends do. >>>>>>>>>>>>>>>>>>>>>>>>>> 4) In every CHECK line, can you remove the tabs >>>>>>>>>>>>>>>>>>>>>>>>>> between the instr mnemonic and the first operand and add a single space? >>>>>>>>>>>>>>>>>>>>>>>>>> (I'm unsure about this because i dont know if CHECK eats spaces). Also for >>>>>>>>>>>>>>>>>>>>>>>>>> the future, the llvm coding standards says to config your editor to replace >>>>>>>>>>>>>>>>>>>>>>>>>> tabs with spaces, so it's a good moment time to do it. >>>>>>>>>>>>>>>>>>>>>>>>>> 5) Oh and the most important one, please add this >>>>>>>>>>>>>>>>>>>>>>>>>> in only one file, add.ll or something like that, so we can keep this >>>>>>>>>>>>>>>>>>>>>>>>>> convention in the future, otherwise we'll end having too many test files. >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> Something that should be covered is, when doing >>>>>>>>>>>>>>>>>>>>>>>>>> 16 bit additions we can use adiw or add depending on the imm value, can you >>>>>>>>>>>>>>>>>>>>>>>>>> cover this aswell? >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo >>>>>>>>>>>>>>>>>>>>>>>>>>> Jensen <nbj...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>>> I have successfully been able to compile your >>>>>>>>>>>>>>>>>>>>>>>>>>>> testcases (/avr-llvm/testcases/*.ll) to something looking like valid avr >>>>>>>>>>>>>>>>>>>>>>>>>>>> assembler. >>>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>>> How should I test/simulate the assembler? I get >>>>>>>>>>>>>>>>>>>>>>>>>>>> errors when trying to simulate the generated assembler in AVRStudio. >>>>>>>>>>>>>>>>>>>>>>>>>>>> Perhaps they use a different assembler? >>>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which >>>>>>>>>>>>>>>>>>>>>>>>>>> is different then the Atmel assembler syntax. >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> Eventually we could support multiple asm >>>>>>>>>>>>>>>>>>>>>>>>>>> syntax's like the X86 target does. >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-05-22 22:01:46
|
Thanks for the explanation. It's clear :) Out of curiosity, why are the pushes and pops in the example below? movw leaves r17:r14 unchanged. Do we simply push and pop all registers to be on the safe side and limited static analysis? llvm: define i32 @return32_arg2(i32 %x, i32 %y, i32 %z) { ret i32 %z } asm: return32_arg2: push r14 push r15 push r16 push r17 movw r23:r22, r15:r14 movw r25:r24, r17:r16 pop r17 pop r16 pop r15 pop r14 On Tue, May 22, 2012 at 11:32 PM, Borja Ferrer <bor...@gm...>wrote: > Here you have a link that explains how registers are used: > www.nongnu.org/avr-libc/user-manual/FAQ.html#faq_reg_usage > Testing a calling convention without knowing how it actually works is > going to be an insane task to do xD > > About your question, when you read that link all will become clear but > basically here is what's going on. Arguments are passed from r25 down to > r8, since in this case three 64bit args can't fit in those registers the > last argument is passed through the stack, so you get: > arg1 is in: r25-r18 > arg2 is in: r17-r10 > arg3 obviously doesn't fit in 2 register so it's all passed through the > stack, thats why you get those loads. Notice that the lowest part of the > argument is in Y+5 because in +4 and +3 is r29:r28 you just pushed and in > +2 +1 is the the return address that was pushed into the stack after the > call was performed. > > Another thing, you should add checks on the pushes and pops for the callee > saved registers so we're sure that they're being saved. > > > > 2012/5/22 Nicklas Bo Jensen <nbj...@gm...> > >> Perfect :) >> >> I'm moving on to calling convention and have started with return values. >> However I'm a bit unsure what the calling convention actually is. For >> example with my last test, called "return64_arg2" in the attached .ll file >> and the generated assembly in the .s file, is the correct thing happening >> and how it should be tested? Couldn't we have passed the arguments in the >> normal registers? I.e. r25:r2. >> >> If the arguments don't fit in the registers, do we always store the >> result in the same place in ram? >> >> >> On Mon, May 21, 2012 at 11:38 PM, Borja Ferrer <bor...@gm...>wrote: >> >>> Nice, so now you have the same test failures as me, they are caused >>> because we're using custom address space stuff in clang, dont worry about >>> those. Basically they fail because these tests are writing into address >>> space 1 which is flash data and that is forbidden in our target (remember >>> flash memory is readonly). >>> >>> The test cases you just commited look great :) To which ones are you >>> going to move on next? >>> >>> Yes, that code looks correct, where is the problem? >>> >>> >>> 2012/5/21 Nicklas Bo Jensen <nbj...@gm...> >>> >>>> Is the following generated code correct: >>>> >>>> LLVM: >>>> >>>> define i8 @return8_arg(i8 %x) { >>>> ret i8 %x >>>> } >>>> >>>> Generated: >>>> >>>> return8_arg: >>>> ret >>>> >>>> >>>> Something similar in .c compiling with avr-gcc gives a few pushes, >>>> loads and pops. >>>> >>>> On Mon, May 21, 2012 at 10:48 PM, Nicklas Bo Jensen <nbj...@gm... >>>> > wrote: >>>> >>>>> When adding those targets I only have 10 unexpected failures: >>>>> >>>>> Clang :: CodeGen/address-space-compound-literal.c >>>>> Clang :: CodeGen/address-space-field1.c >>>>> Clang :: CodeGen/address-space.c >>>>> Clang :: CodeGenCXX/mangle-address-space.cpp >>>>> Clang :: PCH/types.c >>>>> Clang :: Sema/address_spaces.c >>>>> Clang :: SemaCXX/address-space-conversion.cpp >>>>> Clang :: SemaCXX/address-space-newdelete.cpp >>>>> Clang :: SemaCXX/address-space-references.cpp >>>>> Clang :: SemaTemplate/address-spaces.cpp >>>>> >>>>> I will try to run each test separately and try to figure out why they >>>>> are failing. I have also attached the test output. >>>>> >>>>> I'm also committing tests for and, or and xor in a minute. They are >>>>> really simple and similar to the add and sub tests. Please review these :) >>>>> >>>>> >>>>> On Mon, May 14, 2012 at 11:32 PM, Borja Ferrer <bor...@gm...>wrote: >>>>> >>>>>> Did you try adding the x86 and x64 targets with the avr one? It's >>>>>> something related with an unsopported target. >>>>>> >>>>>> Good question, I think there's no need to do reg+imm for xor. >>>>>> >>>>>> Btw remember to add the SF mailing list so we can have a record ;) >>>>>> >>>>>> >>>>>> 2012/5/14 Nicklas Bo Jensen <nbj...@gm...> >>>>>> >>>>>>> Sorry, that is the llvm+clang trunk gives me 13 unsupported tests, >>>>>>> i.e. no failures versus the avr-llvm giving me 280 unexpected failures. >>>>>>> >>>>>>> >>>>>>> On Mon, May 14, 2012 at 9:08 PM, Nicklas Bo Jensen < >>>>>>> nbj...@gm...> wrote: >>>>>>> >>>>>>>> Hi, >>>>>>>> >>>>>>>> BTW, the newest llvm and clang trunk only gives me 13 unexpected >>>>>>>> failures compared to the the newest trunk with avr-llvm where i get 280 >>>>>>>> unexpected failures. >>>>>>>> >>>>>>>> Considering the regression tests for xor, does it make sense to >>>>>>>> test reg+imm, as the avr assembler does not have xor for immediate? >>>>>>>> >>>>>>>> >>>>>>>> On Thu, May 10, 2012 at 9:12 PM, Borja Ferrer < >>>>>>>> bor...@gm...> wrote: >>>>>>>> >>>>>>>>> I don't think so, but I configured llvm to support both x86 and >>>>>>>>> x64, so maybe that could help, in fact I can't build clang if I don't add >>>>>>>>> support for x86. >>>>>>>>> >>>>>>>>> >>>>>>>>> 2012/5/10 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>> >>>>>>>>>> Target: x86_64-unknown-linux-gnu >>>>>>>>>> >>>>>>>>>> But I only configured for avr... Did I do something wrong? >>>>>>>>>> >>>>>>>>>> On Thu, May 10, 2012 at 5:32 PM, Borja Ferrer < >>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>> >>>>>>>>>>> This is what I'm getting: >>>>>>>>>>> >>>>>>>>>>> Expected Passes : 9914 >>>>>>>>>>> Expected Failures : 66 >>>>>>>>>>> Unsupported Tests : 569 >>>>>>>>>>> Unexpected Failures: 11 >>>>>>>>>>> >>>>>>>>>>> I've seen in that file you attached that you're getting errors >>>>>>>>>>> because of the target triple, errors like: >>>>>>>>>>> >>>>>>>>>>> error: unable to create target: 'No available targets are compatible with this triple, see -version for the available targets.' >>>>>>>>>>> >>>>>>>>>>> or >>>>>>>>>>> >>>>>>>>>>> error auto-selecting target for module 'No available targets are compatible with this triple, see -version for the available targets >>>>>>>>>>> >>>>>>>>>>> so I guess that's the reason, so what is your target triple? do >>>>>>>>>>> clang -v to get it, mine is i386-pc-linux-gnu >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> 2012/5/10 Borja Ferrer <bor...@gm...> >>>>>>>>>>> >>>>>>>>>>>> Interesting, I'll check it out tomorrow to see if I can find >>>>>>>>>>>> some reason behind this, because we're getting very different results here. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> 2012/5/9 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>> >>>>>>>>>>>>> Sorry for my slow response.Got i working again now, thanks. >>>>>>>>>>>>> >>>>>>>>>>>>> Building with optimization disabled and assertions turned on i >>>>>>>>>>>>> get: >>>>>>>>>>>>> >>>>>>>>>>>>> Avr llvm+clang: >>>>>>>>>>>>> Expected Passes : 6978 >>>>>>>>>>>>> Expected Failures : 39 >>>>>>>>>>>>> Unsupported Tests : 3281 >>>>>>>>>>>>> Unexpected Failures: 279 >>>>>>>>>>>>> >>>>>>>>>>>>> In the 279 unexpected failures for example 143 of them are >>>>>>>>>>>>> test/CodeGen/Generic. I'm not really sure how these tests are supposed to >>>>>>>>>>>>> work? None of them seems to be using FileCheck. >>>>>>>>>>>>> >>>>>>>>>>>>> However building for msp430 seems to be giving me similar >>>>>>>>>>>>> results, indicating that it is not a avr-llvm specific problem. Please see >>>>>>>>>>>>> the attached output "make check-all" from avr-llvm. >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> On Fri, May 4, 2012 at 11:30 PM, Borja Ferrer < >>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>> >>>>>>>>>>>>>> I'm asking because last week you said that you were getting >>>>>>>>>>>>>> +200 fails, and since I'm getting 11 I wanted to know what's going on. >>>>>>>>>>>>>> >>>>>>>>>>>>>> faluco is me btw, I updated a patch today because I got a >>>>>>>>>>>>>> conflict when updating my clang repo. These variables are defined in >>>>>>>>>>>>>> DiagnosticSemaKinds.td so check that you have them, they come from the >>>>>>>>>>>>>> flash.diff patch. >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>> >>>>>>>>>>>>>>> The new tests should pass. I cannot check other tests now, >>>>>>>>>>>>>>> I'm having some issues after applying the newest patches that came in today >>>>>>>>>>>>>>> by faluco: >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: >>>>>>>>>>>>>>> error: >>>>>>>>>>>>>>> no member named 'err_flash_variable_requires_const' in >>>>>>>>>>>>>>> namespace >>>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>>>>> diag::err_flash_variable_requires_const); >>>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: >>>>>>>>>>>>>>> error: >>>>>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>>>>> namespace >>>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>>>>> diag::err_flash_pointer_requires_const); >>>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: >>>>>>>>>>>>>>> error: >>>>>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>>>>> namespace >>>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>>> Diag(NameLoc, diag::err_flash_pointer_requires_const); >>>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>>> Have i done something wrong? >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer < >>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> How many tests failures are you getting now? >>>>>>>>>>>>>>>> I'm getting 11, 10 from clang due to address space stuff >>>>>>>>>>>>>>>> (you'll need to patch clang to get those) and 1 from llvm. >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> Ah, perfect. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> I would actually guess that you need to run "make >>>>>>>>>>>>>>>>> check-all" before being able to test new tests individually. Sorry :) >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer < >>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> Nevermind, got it. >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> Thanks! >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> One thing, i dont have llvm-lit in that dir, am I >>>>>>>>>>>>>>>>>>> supposed to build llvm with an addtional param or something in order to get >>>>>>>>>>>>>>>>>>> it? >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> Ok, I've committed now. To only run the AVR specific >>>>>>>>>>>>>>>>>>>> tests run something like: >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> ./build/Debug+Asserts/bin/llvm-lit >>>>>>>>>>>>>>>>>>>> llvm/test/CodeGen/AVR/ >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer < >>>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> Oh a small one I've just noticed, leave only 1 newline >>>>>>>>>>>>>>>>>>>>> between tests not 2. >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Ok they look great now, I don't have any other >>>>>>>>>>>>>>>>>>>>>> objections. Please commit this test to SVN, post your SF username here so >>>>>>>>>>>>>>>>>>>>>> that Eric or John can give you commit permissions. Once it gets commited >>>>>>>>>>>>>>>>>>>>>> I'll check if I need to add any pattern specific tests to it, these tests >>>>>>>>>>>>>>>>>>>>>> are corner cases of some instructions. >>>>>>>>>>>>>>>>>>>>>> Before commiting it, remove the testcases dir with >>>>>>>>>>>>>>>>>>>>>> all the files there, and create a new one called test/CodeGen/AVR, and >>>>>>>>>>>>>>>>>>>>>> place your file there, just to keep the same structure like in llvm's repo. >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> About the rest of tests to do, from that list remove >>>>>>>>>>>>>>>>>>>>>> mul and division for now, mul isn't yet implemented and division can come >>>>>>>>>>>>>>>>>>>>>> later. Sub tests should be very similar to add, then add binary ops (or, >>>>>>>>>>>>>>>>>>>>>> and, xor). Add calling convention tests (argument passing through regs and >>>>>>>>>>>>>>>>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> There are quite a few tests to add, but for now do >>>>>>>>>>>>>>>>>>>>>> the sub and binary op tests and we'll discuss the others by then. >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> 1) Sure >>>>>>>>>>>>>>>>>>>>>>> 2) Yes, I've followed the msp430 backend that does >>>>>>>>>>>>>>>>>>>>>>> include it. I've removed it now. >>>>>>>>>>>>>>>>>>>>>>> 3) Again, I've moved the CHECK lines, but it differs >>>>>>>>>>>>>>>>>>>>>>> from backend to backend. >>>>>>>>>>>>>>>>>>>>>>> 4) Done >>>>>>>>>>>>>>>>>>>>>>> 5) Done >>>>>>>>>>>>>>>>>>>>>>> 6) Done >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> I will continue working other tests, which do we >>>>>>>>>>>>>>>>>>>>>>> need? Something like(and please add/comment): >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> -Sub >>>>>>>>>>>>>>>>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>>>>>>>>>>>>>>>> -mult >>>>>>>>>>>>>>>>>>>>>>> -Return argument(In a few variants) >>>>>>>>>>>>>>>>>>>>>>> -and >>>>>>>>>>>>>>>>>>>>>>> -or >>>>>>>>>>>>>>>>>>>>>>> -xor >>>>>>>>>>>>>>>>>>>>>>> -increment >>>>>>>>>>>>>>>>>>>>>>> -branching? >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> Any ideas? >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> Obviously in the last line I meant adiw or >>>>>>>>>>>>>>>>>>>>>>>> subi/sbci pair, add for immediates doesn't exist for imms greater than 63 >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> They look good, very nice :) >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> 1) I think it's not necessary to add the >>>>>>>>>>>>>>>>>>>>>>>>> reg_reg_imm variant because you covered it with the other two tests. >>>>>>>>>>>>>>>>>>>>>>>>> 2) Do the tests work if you remove the target >>>>>>>>>>>>>>>>>>>>>>>>> triple line? I've seen other backends don't include it. >>>>>>>>>>>>>>>>>>>>>>>>> 3) Move the CHECK lines after the function >>>>>>>>>>>>>>>>>>>>>>>>> prototype like other backends do. >>>>>>>>>>>>>>>>>>>>>>>>> 4) In every CHECK line, can you remove the tabs >>>>>>>>>>>>>>>>>>>>>>>>> between the instr mnemonic and the first operand and add a single space? >>>>>>>>>>>>>>>>>>>>>>>>> (I'm unsure about this because i dont know if CHECK eats spaces). Also for >>>>>>>>>>>>>>>>>>>>>>>>> the future, the llvm coding standards says to config your editor to replace >>>>>>>>>>>>>>>>>>>>>>>>> tabs with spaces, so it's a good moment time to do it. >>>>>>>>>>>>>>>>>>>>>>>>> 5) Oh and the most important one, please add this >>>>>>>>>>>>>>>>>>>>>>>>> in only one file, add.ll or something like that, so we can keep this >>>>>>>>>>>>>>>>>>>>>>>>> convention in the future, otherwise we'll end having too many test files. >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> Something that should be covered is, when doing 16 >>>>>>>>>>>>>>>>>>>>>>>>> bit additions we can use adiw or add depending on the imm value, can you >>>>>>>>>>>>>>>>>>>>>>>>> cover this aswell? >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo >>>>>>>>>>>>>>>>>>>>>>>>>> Jensen <nbj...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> I have successfully been able to compile your >>>>>>>>>>>>>>>>>>>>>>>>>>> testcases (/avr-llvm/testcases/*.ll) to something looking like valid avr >>>>>>>>>>>>>>>>>>>>>>>>>>> assembler. >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> How should I test/simulate the assembler? I get >>>>>>>>>>>>>>>>>>>>>>>>>>> errors when trying to simulate the generated assembler in AVRStudio. >>>>>>>>>>>>>>>>>>>>>>>>>>> Perhaps they use a different assembler? >>>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is >>>>>>>>>>>>>>>>>>>>>>>>>> different then the Atmel assembler syntax. >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> Eventually we could support multiple asm syntax's >>>>>>>>>>>>>>>>>>>>>>>>>> like the X86 target does. >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-22 21:32:47
|
Here you have a link that explains how registers are used: www.nongnu.org/avr-libc/user-manual/FAQ.html#faq_reg_usage Testing a calling convention without knowing how it actually works is going to be an insane task to do xD About your question, when you read that link all will become clear but basically here is what's going on. Arguments are passed from r25 down to r8, since in this case three 64bit args can't fit in those registers the last argument is passed through the stack, so you get: arg1 is in: r25-r18 arg2 is in: r17-r10 arg3 obviously doesn't fit in 2 register so it's all passed through the stack, thats why you get those loads. Notice that the lowest part of the argument is in Y+5 because in +4 and +3 is r29:r28 you just pushed and in +2 +1 is the the return address that was pushed into the stack after the call was performed. Another thing, you should add checks on the pushes and pops for the callee saved registers so we're sure that they're being saved. 2012/5/22 Nicklas Bo Jensen <nbj...@gm...> > Perfect :) > > I'm moving on to calling convention and have started with return values. > However I'm a bit unsure what the calling convention actually is. For > example with my last test, called "return64_arg2" in the attached .ll file > and the generated assembly in the .s file, is the correct thing happening > and how it should be tested? Couldn't we have passed the arguments in the > normal registers? I.e. r25:r2. > > If the arguments don't fit in the registers, do we always store the result > in the same place in ram? > > > On Mon, May 21, 2012 at 11:38 PM, Borja Ferrer <bor...@gm...>wrote: > >> Nice, so now you have the same test failures as me, they are caused >> because we're using custom address space stuff in clang, dont worry about >> those. Basically they fail because these tests are writing into address >> space 1 which is flash data and that is forbidden in our target (remember >> flash memory is readonly). >> >> The test cases you just commited look great :) To which ones are you >> going to move on next? >> >> Yes, that code looks correct, where is the problem? >> >> >> 2012/5/21 Nicklas Bo Jensen <nbj...@gm...> >> >>> Is the following generated code correct: >>> >>> LLVM: >>> >>> define i8 @return8_arg(i8 %x) { >>> ret i8 %x >>> } >>> >>> Generated: >>> >>> return8_arg: >>> ret >>> >>> >>> Something similar in .c compiling with avr-gcc gives a few pushes, loads >>> and pops. >>> >>> On Mon, May 21, 2012 at 10:48 PM, Nicklas Bo Jensen <nbj...@gm...>wrote: >>> >>>> When adding those targets I only have 10 unexpected failures: >>>> >>>> Clang :: CodeGen/address-space-compound-literal.c >>>> Clang :: CodeGen/address-space-field1.c >>>> Clang :: CodeGen/address-space.c >>>> Clang :: CodeGenCXX/mangle-address-space.cpp >>>> Clang :: PCH/types.c >>>> Clang :: Sema/address_spaces.c >>>> Clang :: SemaCXX/address-space-conversion.cpp >>>> Clang :: SemaCXX/address-space-newdelete.cpp >>>> Clang :: SemaCXX/address-space-references.cpp >>>> Clang :: SemaTemplate/address-spaces.cpp >>>> >>>> I will try to run each test separately and try to figure out why they >>>> are failing. I have also attached the test output. >>>> >>>> I'm also committing tests for and, or and xor in a minute. They are >>>> really simple and similar to the add and sub tests. Please review these :) >>>> >>>> >>>> On Mon, May 14, 2012 at 11:32 PM, Borja Ferrer <bor...@gm...>wrote: >>>> >>>>> Did you try adding the x86 and x64 targets with the avr one? It's >>>>> something related with an unsopported target. >>>>> >>>>> Good question, I think there's no need to do reg+imm for xor. >>>>> >>>>> Btw remember to add the SF mailing list so we can have a record ;) >>>>> >>>>> >>>>> 2012/5/14 Nicklas Bo Jensen <nbj...@gm...> >>>>> >>>>>> Sorry, that is the llvm+clang trunk gives me 13 unsupported tests, >>>>>> i.e. no failures versus the avr-llvm giving me 280 unexpected failures. >>>>>> >>>>>> >>>>>> On Mon, May 14, 2012 at 9:08 PM, Nicklas Bo Jensen < >>>>>> nbj...@gm...> wrote: >>>>>> >>>>>>> Hi, >>>>>>> >>>>>>> BTW, the newest llvm and clang trunk only gives me 13 unexpected >>>>>>> failures compared to the the newest trunk with avr-llvm where i get 280 >>>>>>> unexpected failures. >>>>>>> >>>>>>> Considering the regression tests for xor, does it make sense to test >>>>>>> reg+imm, as the avr assembler does not have xor for immediate? >>>>>>> >>>>>>> >>>>>>> On Thu, May 10, 2012 at 9:12 PM, Borja Ferrer <bor...@gm... >>>>>>> > wrote: >>>>>>> >>>>>>>> I don't think so, but I configured llvm to support both x86 and >>>>>>>> x64, so maybe that could help, in fact I can't build clang if I don't add >>>>>>>> support for x86. >>>>>>>> >>>>>>>> >>>>>>>> 2012/5/10 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>> >>>>>>>>> Target: x86_64-unknown-linux-gnu >>>>>>>>> >>>>>>>>> But I only configured for avr... Did I do something wrong? >>>>>>>>> >>>>>>>>> On Thu, May 10, 2012 at 5:32 PM, Borja Ferrer < >>>>>>>>> bor...@gm...> wrote: >>>>>>>>> >>>>>>>>>> This is what I'm getting: >>>>>>>>>> >>>>>>>>>> Expected Passes : 9914 >>>>>>>>>> Expected Failures : 66 >>>>>>>>>> Unsupported Tests : 569 >>>>>>>>>> Unexpected Failures: 11 >>>>>>>>>> >>>>>>>>>> I've seen in that file you attached that you're getting errors >>>>>>>>>> because of the target triple, errors like: >>>>>>>>>> >>>>>>>>>> error: unable to create target: 'No available targets are compatible with this triple, see -version for the available targets.' >>>>>>>>>> >>>>>>>>>> or >>>>>>>>>> >>>>>>>>>> error auto-selecting target for module 'No available targets are compatible with this triple, see -version for the available targets >>>>>>>>>> >>>>>>>>>> so I guess that's the reason, so what is your target triple? do >>>>>>>>>> clang -v to get it, mine is i386-pc-linux-gnu >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> 2012/5/10 Borja Ferrer <bor...@gm...> >>>>>>>>>> >>>>>>>>>>> Interesting, I'll check it out tomorrow to see if I can find >>>>>>>>>>> some reason behind this, because we're getting very different results here. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> 2012/5/9 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>> >>>>>>>>>>>> Sorry for my slow response.Got i working again now, thanks. >>>>>>>>>>>> >>>>>>>>>>>> Building with optimization disabled and assertions turned on i >>>>>>>>>>>> get: >>>>>>>>>>>> >>>>>>>>>>>> Avr llvm+clang: >>>>>>>>>>>> Expected Passes : 6978 >>>>>>>>>>>> Expected Failures : 39 >>>>>>>>>>>> Unsupported Tests : 3281 >>>>>>>>>>>> Unexpected Failures: 279 >>>>>>>>>>>> >>>>>>>>>>>> In the 279 unexpected failures for example 143 of them are >>>>>>>>>>>> test/CodeGen/Generic. I'm not really sure how these tests are supposed to >>>>>>>>>>>> work? None of them seems to be using FileCheck. >>>>>>>>>>>> >>>>>>>>>>>> However building for msp430 seems to be giving me similar >>>>>>>>>>>> results, indicating that it is not a avr-llvm specific problem. Please see >>>>>>>>>>>> the attached output "make check-all" from avr-llvm. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> On Fri, May 4, 2012 at 11:30 PM, Borja Ferrer < >>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> I'm asking because last week you said that you were getting >>>>>>>>>>>>> +200 fails, and since I'm getting 11 I wanted to know what's going on. >>>>>>>>>>>>> >>>>>>>>>>>>> faluco is me btw, I updated a patch today because I got a >>>>>>>>>>>>> conflict when updating my clang repo. These variables are defined in >>>>>>>>>>>>> DiagnosticSemaKinds.td so check that you have them, they come from the >>>>>>>>>>>>> flash.diff patch. >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>> >>>>>>>>>>>>>> The new tests should pass. I cannot check other tests now, >>>>>>>>>>>>>> I'm having some issues after applying the newest patches that came in today >>>>>>>>>>>>>> by faluco: >>>>>>>>>>>>>> >>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: >>>>>>>>>>>>>> error: >>>>>>>>>>>>>> no member named 'err_flash_variable_requires_const' in >>>>>>>>>>>>>> namespace >>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>>>> diag::err_flash_variable_requires_const); >>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: >>>>>>>>>>>>>> error: >>>>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>>>> namespace >>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>>>> diag::err_flash_pointer_requires_const); >>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: >>>>>>>>>>>>>> error: >>>>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>>>> namespace >>>>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>>>> Diag(NameLoc, diag::err_flash_pointer_requires_const); >>>>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>>>> Have i done something wrong? >>>>>>>>>>>>>> >>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>> >>>>>>>>>>>>>> On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer < >>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> How many tests failures are you getting now? >>>>>>>>>>>>>>> I'm getting 11, 10 from clang due to address space stuff >>>>>>>>>>>>>>> (you'll need to patch clang to get those) and 1 from llvm. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Ah, perfect. >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> I would actually guess that you need to run "make >>>>>>>>>>>>>>>> check-all" before being able to test new tests individually. Sorry :) >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer < >>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> Nevermind, got it. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> Thanks! >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> One thing, i dont have llvm-lit in that dir, am I >>>>>>>>>>>>>>>>>> supposed to build llvm with an addtional param or something in order to get >>>>>>>>>>>>>>>>>> it? >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> Ok, I've committed now. To only run the AVR specific >>>>>>>>>>>>>>>>>>> tests run something like: >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer < >>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> Oh a small one I've just noticed, leave only 1 newline >>>>>>>>>>>>>>>>>>>> between tests not 2. >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> Ok they look great now, I don't have any other >>>>>>>>>>>>>>>>>>>>> objections. Please commit this test to SVN, post your SF username here so >>>>>>>>>>>>>>>>>>>>> that Eric or John can give you commit permissions. Once it gets commited >>>>>>>>>>>>>>>>>>>>> I'll check if I need to add any pattern specific tests to it, these tests >>>>>>>>>>>>>>>>>>>>> are corner cases of some instructions. >>>>>>>>>>>>>>>>>>>>> Before commiting it, remove the testcases dir with all >>>>>>>>>>>>>>>>>>>>> the files there, and create a new one called test/CodeGen/AVR, and place >>>>>>>>>>>>>>>>>>>>> your file there, just to keep the same structure like in llvm's repo. >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> About the rest of tests to do, from that list remove >>>>>>>>>>>>>>>>>>>>> mul and division for now, mul isn't yet implemented and division can come >>>>>>>>>>>>>>>>>>>>> later. Sub tests should be very similar to add, then add binary ops (or, >>>>>>>>>>>>>>>>>>>>> and, xor). Add calling convention tests (argument passing through regs and >>>>>>>>>>>>>>>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> There are quite a few tests to add, but for now do the >>>>>>>>>>>>>>>>>>>>> sub and binary op tests and we'll discuss the others by then. >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> 1) Sure >>>>>>>>>>>>>>>>>>>>>> 2) Yes, I've followed the msp430 backend that does >>>>>>>>>>>>>>>>>>>>>> include it. I've removed it now. >>>>>>>>>>>>>>>>>>>>>> 3) Again, I've moved the CHECK lines, but it differs >>>>>>>>>>>>>>>>>>>>>> from backend to backend. >>>>>>>>>>>>>>>>>>>>>> 4) Done >>>>>>>>>>>>>>>>>>>>>> 5) Done >>>>>>>>>>>>>>>>>>>>>> 6) Done >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> I will continue working other tests, which do we >>>>>>>>>>>>>>>>>>>>>> need? Something like(and please add/comment): >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> -Sub >>>>>>>>>>>>>>>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>>>>>>>>>>>>>>> -mult >>>>>>>>>>>>>>>>>>>>>> -Return argument(In a few variants) >>>>>>>>>>>>>>>>>>>>>> -and >>>>>>>>>>>>>>>>>>>>>> -or >>>>>>>>>>>>>>>>>>>>>> -xor >>>>>>>>>>>>>>>>>>>>>> -increment >>>>>>>>>>>>>>>>>>>>>> -branching? >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Any ideas? >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> Obviously in the last line I meant adiw or subi/sbci >>>>>>>>>>>>>>>>>>>>>>> pair, add for immediates doesn't exist for imms greater than 63 >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> They look good, very nice :) >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> 1) I think it's not necessary to add the >>>>>>>>>>>>>>>>>>>>>>>> reg_reg_imm variant because you covered it with the other two tests. >>>>>>>>>>>>>>>>>>>>>>>> 2) Do the tests work if you remove the target >>>>>>>>>>>>>>>>>>>>>>>> triple line? I've seen other backends don't include it. >>>>>>>>>>>>>>>>>>>>>>>> 3) Move the CHECK lines after the function >>>>>>>>>>>>>>>>>>>>>>>> prototype like other backends do. >>>>>>>>>>>>>>>>>>>>>>>> 4) In every CHECK line, can you remove the tabs >>>>>>>>>>>>>>>>>>>>>>>> between the instr mnemonic and the first operand and add a single space? >>>>>>>>>>>>>>>>>>>>>>>> (I'm unsure about this because i dont know if CHECK eats spaces). Also for >>>>>>>>>>>>>>>>>>>>>>>> the future, the llvm coding standards says to config your editor to replace >>>>>>>>>>>>>>>>>>>>>>>> tabs with spaces, so it's a good moment time to do it. >>>>>>>>>>>>>>>>>>>>>>>> 5) Oh and the most important one, please add this >>>>>>>>>>>>>>>>>>>>>>>> in only one file, add.ll or something like that, so we can keep this >>>>>>>>>>>>>>>>>>>>>>>> convention in the future, otherwise we'll end having too many test files. >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> Something that should be covered is, when doing 16 >>>>>>>>>>>>>>>>>>>>>>>> bit additions we can use adiw or add depending on the imm value, can you >>>>>>>>>>>>>>>>>>>>>>>> cover this aswell? >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo >>>>>>>>>>>>>>>>>>>>>>>>> Jensen <nbj...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> I have successfully been able to compile your >>>>>>>>>>>>>>>>>>>>>>>>>> testcases (/avr-llvm/testcases/*.ll) to something looking like valid avr >>>>>>>>>>>>>>>>>>>>>>>>>> assembler. >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> How should I test/simulate the assembler? I get >>>>>>>>>>>>>>>>>>>>>>>>>> errors when trying to simulate the generated assembler in AVRStudio. >>>>>>>>>>>>>>>>>>>>>>>>>> Perhaps they use a different assembler? >>>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is >>>>>>>>>>>>>>>>>>>>>>>>> different then the Atmel assembler syntax. >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>>> Eventually we could support multiple asm syntax's >>>>>>>>>>>>>>>>>>>>>>>>> like the X86 target does. >>>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-05-22 20:42:18
|
Thanks for the link, very nice overview. Are the following tests obsolete? - Returning void? - Returning the first parameter, which is already in the correct place? Do we need additional tests for returning, besides returning immediate and argument, like returning a value from register or is it already covered in returning a argument? On Tue, May 22, 2012 at 9:01 PM, John Myers <ato...@gm...> wrote: > > > On Tue, May 22, 2012 at 11:34 AM, Nicklas Bo Jensen <nbj...@gm...>wrote: > >> Perfect :) >> >> I'm moving on to calling convention and have started with return values. >> However I'm a bit unsure what the calling convention actually is. For >> example with my last test, called "return64_arg2" in the attached .ll file >> and the generated assembly in the .s file, is the correct thing happening >> and how it should be tested? Couldn't we have passed the arguments in the >> normal registers? I.e. r25:r2. >> >> If the arguments don't fit in the registers, do we always store the >> result in the same place in ram? >> > > It should be placed on the stack so the exact place in ram will vary. > > Calling Convention / ABI: > http://www.nongnu.org/avr-libc/user-manual/FAQ.html#faq_reg_usage > |
From: John M. <ato...@gm...> - 2012-05-22 19:01:43
|
On Tue, May 22, 2012 at 11:34 AM, Nicklas Bo Jensen <nbj...@gm...>wrote: > Perfect :) > > I'm moving on to calling convention and have started with return values. > However I'm a bit unsure what the calling convention actually is. For > example with my last test, called "return64_arg2" in the attached .ll file > and the generated assembly in the .s file, is the correct thing happening > and how it should be tested? Couldn't we have passed the arguments in the > normal registers? I.e. r25:r2. > > If the arguments don't fit in the registers, do we always store the result > in the same place in ram? > It should be placed on the stack so the exact place in ram will vary. Calling Convention / ABI: http://www.nongnu.org/avr-libc/user-manual/FAQ.html#faq_reg_usage |
From: Borja F. <bor...@gm...> - 2012-05-21 21:38:55
|
Nice, so now you have the same test failures as me, they are caused because we're using custom address space stuff in clang, dont worry about those. Basically they fail because these tests are writing into address space 1 which is flash data and that is forbidden in our target (remember flash memory is readonly). The test cases you just commited look great :) To which ones are you going to move on next? Yes, that code looks correct, where is the problem? 2012/5/21 Nicklas Bo Jensen <nbj...@gm...> > Is the following generated code correct: > > LLVM: > > define i8 @return8_arg(i8 %x) { > ret i8 %x > } > > Generated: > > return8_arg: > ret > > > Something similar in .c compiling with avr-gcc gives a few pushes, loads > and pops. > > On Mon, May 21, 2012 at 10:48 PM, Nicklas Bo Jensen <nbj...@gm...>wrote: > >> When adding those targets I only have 10 unexpected failures: >> >> Clang :: CodeGen/address-space-compound-literal.c >> Clang :: CodeGen/address-space-field1.c >> Clang :: CodeGen/address-space.c >> Clang :: CodeGenCXX/mangle-address-space.cpp >> Clang :: PCH/types.c >> Clang :: Sema/address_spaces.c >> Clang :: SemaCXX/address-space-conversion.cpp >> Clang :: SemaCXX/address-space-newdelete.cpp >> Clang :: SemaCXX/address-space-references.cpp >> Clang :: SemaTemplate/address-spaces.cpp >> >> I will try to run each test separately and try to figure out why they are >> failing. I have also attached the test output. >> >> I'm also committing tests for and, or and xor in a minute. They are >> really simple and similar to the add and sub tests. Please review these :) >> >> >> On Mon, May 14, 2012 at 11:32 PM, Borja Ferrer <bor...@gm...>wrote: >> >>> Did you try adding the x86 and x64 targets with the avr one? It's >>> something related with an unsopported target. >>> >>> Good question, I think there's no need to do reg+imm for xor. >>> >>> Btw remember to add the SF mailing list so we can have a record ;) >>> >>> >>> 2012/5/14 Nicklas Bo Jensen <nbj...@gm...> >>> >>>> Sorry, that is the llvm+clang trunk gives me 13 unsupported tests, i.e. >>>> no failures versus the avr-llvm giving me 280 unexpected failures. >>>> >>>> >>>> On Mon, May 14, 2012 at 9:08 PM, Nicklas Bo Jensen <nbj...@gm...>wrote: >>>> >>>>> Hi, >>>>> >>>>> BTW, the newest llvm and clang trunk only gives me 13 unexpected >>>>> failures compared to the the newest trunk with avr-llvm where i get 280 >>>>> unexpected failures. >>>>> >>>>> Considering the regression tests for xor, does it make sense to test >>>>> reg+imm, as the avr assembler does not have xor for immediate? >>>>> >>>>> >>>>> On Thu, May 10, 2012 at 9:12 PM, Borja Ferrer <bor...@gm...>wrote: >>>>> >>>>>> I don't think so, but I configured llvm to support both x86 and x64, >>>>>> so maybe that could help, in fact I can't build clang if I don't add >>>>>> support for x86. >>>>>> >>>>>> >>>>>> 2012/5/10 Nicklas Bo Jensen <nbj...@gm...> >>>>>> >>>>>>> Target: x86_64-unknown-linux-gnu >>>>>>> >>>>>>> But I only configured for avr... Did I do something wrong? >>>>>>> >>>>>>> On Thu, May 10, 2012 at 5:32 PM, Borja Ferrer <bor...@gm... >>>>>>> > wrote: >>>>>>> >>>>>>>> This is what I'm getting: >>>>>>>> >>>>>>>> Expected Passes : 9914 >>>>>>>> Expected Failures : 66 >>>>>>>> Unsupported Tests : 569 >>>>>>>> Unexpected Failures: 11 >>>>>>>> >>>>>>>> I've seen in that file you attached that you're getting errors >>>>>>>> because of the target triple, errors like: >>>>>>>> >>>>>>>> error: unable to create target: 'No available targets are compatible with this triple, see -version for the available targets.' >>>>>>>> >>>>>>>> or >>>>>>>> >>>>>>>> error auto-selecting target for module 'No available targets are compatible with this triple, see -version for the available targets >>>>>>>> >>>>>>>> so I guess that's the reason, so what is your target triple? do >>>>>>>> clang -v to get it, mine is i386-pc-linux-gnu >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> 2012/5/10 Borja Ferrer <bor...@gm...> >>>>>>>> >>>>>>>>> Interesting, I'll check it out tomorrow to see if I can find some >>>>>>>>> reason behind this, because we're getting very different results here. >>>>>>>>> >>>>>>>>> >>>>>>>>> 2012/5/9 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>> >>>>>>>>>> Sorry for my slow response.Got i working again now, thanks. >>>>>>>>>> >>>>>>>>>> Building with optimization disabled and assertions turned on i >>>>>>>>>> get: >>>>>>>>>> >>>>>>>>>> Avr llvm+clang: >>>>>>>>>> Expected Passes : 6978 >>>>>>>>>> Expected Failures : 39 >>>>>>>>>> Unsupported Tests : 3281 >>>>>>>>>> Unexpected Failures: 279 >>>>>>>>>> >>>>>>>>>> In the 279 unexpected failures for example 143 of them are >>>>>>>>>> test/CodeGen/Generic. I'm not really sure how these tests are supposed to >>>>>>>>>> work? None of them seems to be using FileCheck. >>>>>>>>>> >>>>>>>>>> However building for msp430 seems to be giving me similar >>>>>>>>>> results, indicating that it is not a avr-llvm specific problem. Please see >>>>>>>>>> the attached output "make check-all" from avr-llvm. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> On Fri, May 4, 2012 at 11:30 PM, Borja Ferrer < >>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>> >>>>>>>>>>> I'm asking because last week you said that you were getting +200 >>>>>>>>>>> fails, and since I'm getting 11 I wanted to know what's going on. >>>>>>>>>>> >>>>>>>>>>> faluco is me btw, I updated a patch today because I got a >>>>>>>>>>> conflict when updating my clang repo. These variables are defined in >>>>>>>>>>> DiagnosticSemaKinds.td so check that you have them, they come from the >>>>>>>>>>> flash.diff patch. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>> >>>>>>>>>>>> The new tests should pass. I cannot check other tests now, I'm >>>>>>>>>>>> having some issues after applying the newest patches that came in today by >>>>>>>>>>>> faluco: >>>>>>>>>>>> >>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: >>>>>>>>>>>> error: >>>>>>>>>>>> no member named 'err_flash_variable_requires_const' in >>>>>>>>>>>> namespace >>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>> diag::err_flash_variable_requires_const); >>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: >>>>>>>>>>>> error: >>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>> namespace >>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>>> diag::err_flash_pointer_requires_const); >>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: >>>>>>>>>>>> error: >>>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>>> namespace >>>>>>>>>>>> 'clang::diag' >>>>>>>>>>>> Diag(NameLoc, diag::err_flash_pointer_requires_const); >>>>>>>>>>>> ~~~~~~^ >>>>>>>>>>>> Have i done something wrong? >>>>>>>>>>>> >>>>>>>>>>>> Thanks, >>>>>>>>>>>> Nicklas >>>>>>>>>>>> >>>>>>>>>>>> On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer < >>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> How many tests failures are you getting now? >>>>>>>>>>>>> I'm getting 11, 10 from clang due to address space stuff >>>>>>>>>>>>> (you'll need to patch clang to get those) and 1 from llvm. >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>> >>>>>>>>>>>>>> Ah, perfect. >>>>>>>>>>>>>> >>>>>>>>>>>>>> I would actually guess that you need to run "make check-all" >>>>>>>>>>>>>> before being able to test new tests individually. Sorry :) >>>>>>>>>>>>>> >>>>>>>>>>>>>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer < >>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Nevermind, got it. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Thanks! >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> One thing, i dont have llvm-lit in that dir, am I supposed >>>>>>>>>>>>>>>> to build llvm with an addtional param or something in order to get it? >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> Ok, I've committed now. To only run the AVR specific tests >>>>>>>>>>>>>>>>> run something like: >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer < >>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> Oh a small one I've just noticed, leave only 1 newline >>>>>>>>>>>>>>>>>> between tests not 2. >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> Ok they look great now, I don't have any other >>>>>>>>>>>>>>>>>>> objections. Please commit this test to SVN, post your SF username here so >>>>>>>>>>>>>>>>>>> that Eric or John can give you commit permissions. Once it gets commited >>>>>>>>>>>>>>>>>>> I'll check if I need to add any pattern specific tests to it, these tests >>>>>>>>>>>>>>>>>>> are corner cases of some instructions. >>>>>>>>>>>>>>>>>>> Before commiting it, remove the testcases dir with all >>>>>>>>>>>>>>>>>>> the files there, and create a new one called test/CodeGen/AVR, and place >>>>>>>>>>>>>>>>>>> your file there, just to keep the same structure like in llvm's repo. >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> About the rest of tests to do, from that list remove mul >>>>>>>>>>>>>>>>>>> and division for now, mul isn't yet implemented and division can come >>>>>>>>>>>>>>>>>>> later. Sub tests should be very similar to add, then add binary ops (or, >>>>>>>>>>>>>>>>>>> and, xor). Add calling convention tests (argument passing through regs and >>>>>>>>>>>>>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> There are quite a few tests to add, but for now do the >>>>>>>>>>>>>>>>>>> sub and binary op tests and we'll discuss the others by then. >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> 1) Sure >>>>>>>>>>>>>>>>>>>> 2) Yes, I've followed the msp430 backend that does >>>>>>>>>>>>>>>>>>>> include it. I've removed it now. >>>>>>>>>>>>>>>>>>>> 3) Again, I've moved the CHECK lines, but it differs >>>>>>>>>>>>>>>>>>>> from backend to backend. >>>>>>>>>>>>>>>>>>>> 4) Done >>>>>>>>>>>>>>>>>>>> 5) Done >>>>>>>>>>>>>>>>>>>> 6) Done >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> I will continue working other tests, which do we need? >>>>>>>>>>>>>>>>>>>> Something like(and please add/comment): >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> -Sub >>>>>>>>>>>>>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>>>>>>>>>>>>> -mult >>>>>>>>>>>>>>>>>>>> -Return argument(In a few variants) >>>>>>>>>>>>>>>>>>>> -and >>>>>>>>>>>>>>>>>>>> -or >>>>>>>>>>>>>>>>>>>> -xor >>>>>>>>>>>>>>>>>>>> -increment >>>>>>>>>>>>>>>>>>>> -branching? >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> Any ideas? >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> Obviously in the last line I meant adiw or subi/sbci >>>>>>>>>>>>>>>>>>>>> pair, add for immediates doesn't exist for imms greater than 63 >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> They look good, very nice :) >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> 1) I think it's not necessary to add the reg_reg_imm >>>>>>>>>>>>>>>>>>>>>> variant because you covered it with the other two tests. >>>>>>>>>>>>>>>>>>>>>> 2) Do the tests work if you remove the target triple >>>>>>>>>>>>>>>>>>>>>> line? I've seen other backends don't include it. >>>>>>>>>>>>>>>>>>>>>> 3) Move the CHECK lines after the function prototype >>>>>>>>>>>>>>>>>>>>>> like other backends do. >>>>>>>>>>>>>>>>>>>>>> 4) In every CHECK line, can you remove the tabs >>>>>>>>>>>>>>>>>>>>>> between the instr mnemonic and the first operand and add a single space? >>>>>>>>>>>>>>>>>>>>>> (I'm unsure about this because i dont know if CHECK eats spaces). Also for >>>>>>>>>>>>>>>>>>>>>> the future, the llvm coding standards says to config your editor to replace >>>>>>>>>>>>>>>>>>>>>> tabs with spaces, so it's a good moment time to do it. >>>>>>>>>>>>>>>>>>>>>> 5) Oh and the most important one, please add this in >>>>>>>>>>>>>>>>>>>>>> only one file, add.ll or something like that, so we can keep this >>>>>>>>>>>>>>>>>>>>>> convention in the future, otherwise we'll end having too many test files. >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Something that should be covered is, when doing 16 >>>>>>>>>>>>>>>>>>>>>> bit additions we can use adiw or add depending on the imm value, can you >>>>>>>>>>>>>>>>>>>>>> cover this aswell? >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen >>>>>>>>>>>>>>>>>>>>>>> <nbj...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> I have successfully been able to compile your >>>>>>>>>>>>>>>>>>>>>>>> testcases (/avr-llvm/testcases/*.ll) to something looking like valid avr >>>>>>>>>>>>>>>>>>>>>>>> assembler. >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> How should I test/simulate the assembler? I get >>>>>>>>>>>>>>>>>>>>>>>> errors when trying to simulate the generated assembler in AVRStudio. >>>>>>>>>>>>>>>>>>>>>>>> Perhaps they use a different assembler? >>>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is >>>>>>>>>>>>>>>>>>>>>>> different then the Atmel assembler syntax. >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> Eventually we could support multiple asm syntax's >>>>>>>>>>>>>>>>>>>>>>> like the X86 target does. >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-05-21 21:09:00
|
Is the following generated code correct: LLVM: define i8 @return8_arg(i8 %x) { ret i8 %x } Generated: return8_arg: ret Something similar in .c compiling with avr-gcc gives a few pushes, loads and pops. On Mon, May 21, 2012 at 10:48 PM, Nicklas Bo Jensen <nbj...@gm...>wrote: > When adding those targets I only have 10 unexpected failures: > > Clang :: CodeGen/address-space-compound-literal.c > Clang :: CodeGen/address-space-field1.c > Clang :: CodeGen/address-space.c > Clang :: CodeGenCXX/mangle-address-space.cpp > Clang :: PCH/types.c > Clang :: Sema/address_spaces.c > Clang :: SemaCXX/address-space-conversion.cpp > Clang :: SemaCXX/address-space-newdelete.cpp > Clang :: SemaCXX/address-space-references.cpp > Clang :: SemaTemplate/address-spaces.cpp > > I will try to run each test separately and try to figure out why they are > failing. I have also attached the test output. > > I'm also committing tests for and, or and xor in a minute. They are really > simple and similar to the add and sub tests. Please review these :) > > > On Mon, May 14, 2012 at 11:32 PM, Borja Ferrer <bor...@gm...>wrote: > >> Did you try adding the x86 and x64 targets with the avr one? It's >> something related with an unsopported target. >> >> Good question, I think there's no need to do reg+imm for xor. >> >> Btw remember to add the SF mailing list so we can have a record ;) >> >> >> 2012/5/14 Nicklas Bo Jensen <nbj...@gm...> >> >>> Sorry, that is the llvm+clang trunk gives me 13 unsupported tests, i.e. >>> no failures versus the avr-llvm giving me 280 unexpected failures. >>> >>> >>> On Mon, May 14, 2012 at 9:08 PM, Nicklas Bo Jensen <nbj...@gm...>wrote: >>> >>>> Hi, >>>> >>>> BTW, the newest llvm and clang trunk only gives me 13 unexpected >>>> failures compared to the the newest trunk with avr-llvm where i get 280 >>>> unexpected failures. >>>> >>>> Considering the regression tests for xor, does it make sense to test >>>> reg+imm, as the avr assembler does not have xor for immediate? >>>> >>>> >>>> On Thu, May 10, 2012 at 9:12 PM, Borja Ferrer <bor...@gm...>wrote: >>>> >>>>> I don't think so, but I configured llvm to support both x86 and x64, >>>>> so maybe that could help, in fact I can't build clang if I don't add >>>>> support for x86. >>>>> >>>>> >>>>> 2012/5/10 Nicklas Bo Jensen <nbj...@gm...> >>>>> >>>>>> Target: x86_64-unknown-linux-gnu >>>>>> >>>>>> But I only configured for avr... Did I do something wrong? >>>>>> >>>>>> On Thu, May 10, 2012 at 5:32 PM, Borja Ferrer <bor...@gm...>wrote: >>>>>> >>>>>>> This is what I'm getting: >>>>>>> >>>>>>> Expected Passes : 9914 >>>>>>> Expected Failures : 66 >>>>>>> Unsupported Tests : 569 >>>>>>> Unexpected Failures: 11 >>>>>>> >>>>>>> I've seen in that file you attached that you're getting errors >>>>>>> because of the target triple, errors like: >>>>>>> >>>>>>> error: unable to create target: 'No available targets are compatible with this triple, see -version for the available targets.' >>>>>>> >>>>>>> or >>>>>>> >>>>>>> error auto-selecting target for module 'No available targets are compatible with this triple, see -version for the available targets >>>>>>> >>>>>>> so I guess that's the reason, so what is your target triple? do >>>>>>> clang -v to get it, mine is i386-pc-linux-gnu >>>>>>> >>>>>>> >>>>>>> >>>>>>> 2012/5/10 Borja Ferrer <bor...@gm...> >>>>>>> >>>>>>>> Interesting, I'll check it out tomorrow to see if I can find some >>>>>>>> reason behind this, because we're getting very different results here. >>>>>>>> >>>>>>>> >>>>>>>> 2012/5/9 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>> >>>>>>>>> Sorry for my slow response.Got i working again now, thanks. >>>>>>>>> >>>>>>>>> Building with optimization disabled and assertions turned on i get: >>>>>>>>> >>>>>>>>> Avr llvm+clang: >>>>>>>>> Expected Passes : 6978 >>>>>>>>> Expected Failures : 39 >>>>>>>>> Unsupported Tests : 3281 >>>>>>>>> Unexpected Failures: 279 >>>>>>>>> >>>>>>>>> In the 279 unexpected failures for example 143 of them are >>>>>>>>> test/CodeGen/Generic. I'm not really sure how these tests are supposed to >>>>>>>>> work? None of them seems to be using FileCheck. >>>>>>>>> >>>>>>>>> However building for msp430 seems to be giving me similar results, >>>>>>>>> indicating that it is not a avr-llvm specific problem. Please see the >>>>>>>>> attached output "make check-all" from avr-llvm. >>>>>>>>> >>>>>>>>> >>>>>>>>> On Fri, May 4, 2012 at 11:30 PM, Borja Ferrer < >>>>>>>>> bor...@gm...> wrote: >>>>>>>>> >>>>>>>>>> I'm asking because last week you said that you were getting +200 >>>>>>>>>> fails, and since I'm getting 11 I wanted to know what's going on. >>>>>>>>>> >>>>>>>>>> faluco is me btw, I updated a patch today because I got a >>>>>>>>>> conflict when updating my clang repo. These variables are defined in >>>>>>>>>> DiagnosticSemaKinds.td so check that you have them, they come from the >>>>>>>>>> flash.diff patch. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>> >>>>>>>>>>> The new tests should pass. I cannot check other tests now, I'm >>>>>>>>>>> having some issues after applying the newest patches that came in today by >>>>>>>>>>> faluco: >>>>>>>>>>> >>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: >>>>>>>>>>> error: >>>>>>>>>>> no member named 'err_flash_variable_requires_const' in >>>>>>>>>>> namespace >>>>>>>>>>> 'clang::diag' >>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>> diag::err_flash_variable_requires_const); >>>>>>>>>>> ~~~~~~^ >>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: >>>>>>>>>>> error: >>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>> namespace >>>>>>>>>>> 'clang::diag' >>>>>>>>>>> Diag(NewVD->getLocation(), >>>>>>>>>>> diag::err_flash_pointer_requires_const); >>>>>>>>>>> ~~~~~~^ >>>>>>>>>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: >>>>>>>>>>> error: >>>>>>>>>>> no member named 'err_flash_pointer_requires_const' in >>>>>>>>>>> namespace >>>>>>>>>>> 'clang::diag' >>>>>>>>>>> Diag(NameLoc, diag::err_flash_pointer_requires_const); >>>>>>>>>>> ~~~~~~^ >>>>>>>>>>> Have i done something wrong? >>>>>>>>>>> >>>>>>>>>>> Thanks, >>>>>>>>>>> Nicklas >>>>>>>>>>> >>>>>>>>>>> On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer < >>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>> >>>>>>>>>>>> How many tests failures are you getting now? >>>>>>>>>>>> I'm getting 11, 10 from clang due to address space stuff >>>>>>>>>>>> (you'll need to patch clang to get those) and 1 from llvm. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>> >>>>>>>>>>>>> Ah, perfect. >>>>>>>>>>>>> >>>>>>>>>>>>> I would actually guess that you need to run "make check-all" >>>>>>>>>>>>> before being able to test new tests individually. Sorry :) >>>>>>>>>>>>> >>>>>>>>>>>>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer < >>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>> >>>>>>>>>>>>>> Nevermind, got it. >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Thanks! >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> One thing, i dont have llvm-lit in that dir, am I supposed >>>>>>>>>>>>>>> to build llvm with an addtional param or something in order to get it? >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Ok, I've committed now. To only run the AVR specific tests >>>>>>>>>>>>>>>> run something like: >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer < >>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> Oh a small one I've just noticed, leave only 1 newline >>>>>>>>>>>>>>>>> between tests not 2. >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> Ok they look great now, I don't have any other >>>>>>>>>>>>>>>>>> objections. Please commit this test to SVN, post your SF username here so >>>>>>>>>>>>>>>>>> that Eric or John can give you commit permissions. Once it gets commited >>>>>>>>>>>>>>>>>> I'll check if I need to add any pattern specific tests to it, these tests >>>>>>>>>>>>>>>>>> are corner cases of some instructions. >>>>>>>>>>>>>>>>>> Before commiting it, remove the testcases dir with all >>>>>>>>>>>>>>>>>> the files there, and create a new one called test/CodeGen/AVR, and place >>>>>>>>>>>>>>>>>> your file there, just to keep the same structure like in llvm's repo. >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> About the rest of tests to do, from that list remove mul >>>>>>>>>>>>>>>>>> and division for now, mul isn't yet implemented and division can come >>>>>>>>>>>>>>>>>> later. Sub tests should be very similar to add, then add binary ops (or, >>>>>>>>>>>>>>>>>> and, xor). Add calling convention tests (argument passing through regs and >>>>>>>>>>>>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> There are quite a few tests to add, but for now do the >>>>>>>>>>>>>>>>>> sub and binary op tests and we'll discuss the others by then. >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> 1) Sure >>>>>>>>>>>>>>>>>>> 2) Yes, I've followed the msp430 backend that does >>>>>>>>>>>>>>>>>>> include it. I've removed it now. >>>>>>>>>>>>>>>>>>> 3) Again, I've moved the CHECK lines, but it differs >>>>>>>>>>>>>>>>>>> from backend to backend. >>>>>>>>>>>>>>>>>>> 4) Done >>>>>>>>>>>>>>>>>>> 5) Done >>>>>>>>>>>>>>>>>>> 6) Done >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> I will continue working other tests, which do we need? >>>>>>>>>>>>>>>>>>> Something like(and please add/comment): >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> -Sub >>>>>>>>>>>>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>>>>>>>>>>>> -mult >>>>>>>>>>>>>>>>>>> -Return argument(In a few variants) >>>>>>>>>>>>>>>>>>> -and >>>>>>>>>>>>>>>>>>> -or >>>>>>>>>>>>>>>>>>> -xor >>>>>>>>>>>>>>>>>>> -increment >>>>>>>>>>>>>>>>>>> -branching? >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> Any ideas? >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> Thanks, >>>>>>>>>>>>>>>>>>> Nicklas >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> Obviously in the last line I meant adiw or subi/sbci >>>>>>>>>>>>>>>>>>>> pair, add for immediates doesn't exist for imms greater than 63 >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> They look good, very nice :) >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> 1) I think it's not necessary to add the reg_reg_imm >>>>>>>>>>>>>>>>>>>>> variant because you covered it with the other two tests. >>>>>>>>>>>>>>>>>>>>> 2) Do the tests work if you remove the target triple >>>>>>>>>>>>>>>>>>>>> line? I've seen other backends don't include it. >>>>>>>>>>>>>>>>>>>>> 3) Move the CHECK lines after the function prototype >>>>>>>>>>>>>>>>>>>>> like other backends do. >>>>>>>>>>>>>>>>>>>>> 4) In every CHECK line, can you remove the tabs >>>>>>>>>>>>>>>>>>>>> between the instr mnemonic and the first operand and add a single space? >>>>>>>>>>>>>>>>>>>>> (I'm unsure about this because i dont know if CHECK eats spaces). Also for >>>>>>>>>>>>>>>>>>>>> the future, the llvm coding standards says to config your editor to replace >>>>>>>>>>>>>>>>>>>>> tabs with spaces, so it's a good moment time to do it. >>>>>>>>>>>>>>>>>>>>> 5) Oh and the most important one, please add this in >>>>>>>>>>>>>>>>>>>>> only one file, add.ll or something like that, so we can keep this >>>>>>>>>>>>>>>>>>>>> convention in the future, otherwise we'll end having too many test files. >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> Something that should be covered is, when doing 16 bit >>>>>>>>>>>>>>>>>>>>> additions we can use adiw or add depending on the imm value, can you cover >>>>>>>>>>>>>>>>>>>>> this aswell? >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>>>>>>>>>>>>>>>> nbj...@gm...> wrote: >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> I have successfully been able to compile your >>>>>>>>>>>>>>>>>>>>>>> testcases (/avr-llvm/testcases/*.ll) to something looking like valid avr >>>>>>>>>>>>>>>>>>>>>>> assembler. >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> How should I test/simulate the assembler? I get >>>>>>>>>>>>>>>>>>>>>>> errors when trying to simulate the generated assembler in AVRStudio. >>>>>>>>>>>>>>>>>>>>>>> Perhaps they use a different assembler? >>>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is >>>>>>>>>>>>>>>>>>>>>> different then the Atmel assembler syntax. >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>>> Eventually we could support multiple asm syntax's >>>>>>>>>>>>>>>>>>>>>> like the X86 target does. >>>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-05-21 20:48:18
|
nicklas@nicklas-laptop:~$ cd install/avr-llvm/ avr-llvm/ build/ llvm/ testcases_backup/ avr-llvm_tmp/ build_original/ llvm_original/ nicklas@nicklas-laptop:~$ cd install/avr-llvm/build nicklas@nicklas-laptop:~/install/avr-llvm/build$ make check-all llvm[0]: Running test suite make[1]: Entering directory `/home/nicklas/install/avr-llvm/build/test' Making a new site.exp file... Making LLVM 'lit.site.cfg' file... Making LLVM unittest 'lit.site.cfg' file... make -C /home/nicklas/install/avr-llvm/build/test/../tools/clang/test lit.site.cfg Unit/lit.site.cfg make[2]: Entering directory `/home/nicklas/install/avr-llvm/build/tools/clang/test' Making Clang 'lit.site.cfg' file... Making Clang 'Unit/lit.site.cfg' file... make[2]: Leaving directory `/home/nicklas/install/avr-llvm/build/tools/clang/test' ( ulimit -t 600 ; ulimit -d 512000 ; ulimit -m 512000 ; ulimit -v 1024000 ; \ /home/nicklas/install/avr-llvm/llvm/utils/lit/lit.py -s -v . /home/nicklas/install/avr-llvm/build/test/../tools/clang/test ) lit.py: lit.cfg:175: note: using clang: '/home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang' FAIL: Clang :: CodeGen/address-space-compound-literal.c (1099 of 10663) ******************** TEST 'Clang :: CodeGen/address-space-compound-literal.c' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -emit-llvm < /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGen/address-space-compound-literal.c | grep "internal addrspace(1) global i32 1" -- Exit Code: 1 Command Output (stderr): -- <stdin>:4:4: error: flash pointer datum requires a const qualifier a* x = &(a){1}; ^ 1 error generated. -- ******************** FAIL: Clang :: CodeGen/address-space-field1.c (1101 of 10663) ******************** TEST 'Clang :: CodeGen/address-space-field1.c' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -emit-llvm -triple x86_64-apple-darwin10 < /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGen/address-space-field1.c -o - | FileCheck /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGen/address-space-field1.c -- Exit Code: 1 Command Output (stderr): -- <stdin>:34:32: error: flash pointer datum requires a const qualifier void test_addrspace(__addr1 S* p1, __addr2 S*p2) { ^ FileCheck error: '-' is empty. 1 error generated. -- ******************** FAIL: Clang :: CodeGen/address-space.c (1102 of 10663) ******************** TEST 'Clang :: CodeGen/address-space.c' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -triple x86_64-apple-darwin -emit-llvm < /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGen/address-space.c | FileCheck /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGen/address-space.c /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -triple x86_64-apple-darwin -emit-llvm < /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGen/address-space.c | grep 'load.*addrspace(2).. @A' /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -triple x86_64-apple-darwin -emit-llvm < /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGen/address-space.c | grep 'load.*addrspace(2).. @B' -- Exit Code: 1 Command Output (stderr): -- <stdin>:7:5: error: flash variable requires const qualifier int foo __attribute__((address_space(1))); ^ <stdin>:10:5: error: flash variable requires const qualifier int ban[10] __attribute__((address_space(1))); ^ FileCheck error: '-' is empty. 2 errors generated. -- ******************** FAIL: Clang :: CodeGenCXX/mangle-address-space.cpp (1710 of 10663) ******************** TEST 'Clang :: CodeGenCXX/mangle-address-space.cpp' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -emit-llvm -o - /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGenCXX/mangle-address-space.cpp | FileCheck /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGenCXX/mangle-address-space.cpp -- Exit Code: 1 Command Output (stderr): -- /home/nicklas/install/avr-llvm/llvm/tools/clang/test/CodeGenCXX/mangle-address-space.cpp:6:49: error: flash pointer datum requires a const qualifier void f0(char __attribute__((address_space(1))) *p) { } ^ FileCheck error: '-' is empty. 1 error generated. -- ******************** FAIL: Clang :: PCH/types.c (2779 of 10663) ******************** TEST 'Clang :: PCH/types.c' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -fblocks -include /home/nicklas/install/avr-llvm/llvm/tools/clang/test/PCH/types.h -fsyntax-only -verify /home/nicklas/install/avr-llvm/llvm/tools/clang/test/PCH/types.c /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -emit-pch -fblocks -o /home/nicklas/install/avr-llvm/build/tools/clang/test/PCH/Output/types.c.tmp /home/nicklas/install/avr-llvm/llvm/tools/clang/test/PCH/types.h /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -fblocks -include-pch /home/nicklas/install/avr-llvm/build/tools/clang/test/PCH/Output/types.c.tmp -fsyntax-only -verify /home/nicklas/install/avr-llvm/llvm/tools/clang/test/PCH/types.c -ast-print -- Exit Code: 1 Command Output (stderr): -- error: 'error' diagnostics expected but not seen: Line 14: changes address space of pointer error: 'error' diagnostics seen but not expected: Line 11: flash variable requires const qualifier Line 14: flash pointer datum requires a const qualifier Line 15: flash pointer datum requires a const qualifier 4 errors generated. -- ******************** FAIL: Clang :: Sema/address_spaces.c (3234 of 10663) ******************** TEST 'Clang :: Sema/address_spaces.c' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include /home/nicklas/install/avr-llvm/llvm/tools/clang/test/Sema/address_spaces.c -fsyntax-only -verify -- Exit Code: 1 Command Output (stderr): -- error: 'error' diagnostics expected but not seen: Line 45: changes address space of pointer error: 'error' diagnostics seen but not expected: Line 33: flash variable requires const qualifier Line 42: flash variable requires const qualifier error: 'note' diagnostics expected but not seen: Line 44: passing argument to parameter 'p' here 4 errors generated. -- ******************** FAIL: Clang :: SemaCXX/address-space-newdelete.cpp (3568 of 10663) ******************** TEST 'Clang :: SemaCXX/address-space-newdelete.cpp' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -fsyntax-only -verify /home/nicklas/install/avr-llvm/llvm/tools/clang/test/SemaCXX/address-space-newdelete.cpp -- Exit Code: 1 Command Output (stderr): -- error: 'error' diagnostics expected but not seen: Line 22: 'delete' cannot delete objects of type 'int' in address space '1' Line 23: 'delete' cannot delete objects of type 'int' in address space '1' error: 'error' diagnostics seen but not expected: Line 21: flash pointer datum requires a const qualifier 3 errors generated. -- ******************** FAIL: Clang :: SemaCXX/address-space-conversion.cpp (3569 of 10663) ******************** TEST 'Clang :: SemaCXX/address-space-conversion.cpp' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -fsyntax-only -verify /home/nicklas/install/avr-llvm/llvm/tools/clang/test/SemaCXX/address-space-conversion.cpp -- Exit Code: 1 Command Output (stderr): -- error: 'error' diagnostics expected but not seen: Line 31: is not allowed Line 36: is not allowed Line 38: is not allowed Line 43: is not allowed Line 72: is not allowed Line 77: is not allowed Line 80: casts away qualifiers Line 85: casts away qualifiers Line 88: is not allowed Line 93: is not allowed Line 94: casts away qualifiers Line 99: casts away qualifiers Line 115: casts away qualifiers Line 120: casts away qualifiers Line 123: casts away qualifiers Line 128: casts away qualifiers Line 193: cannot initialize a variable of type Line 194: cannot initialize a variable of type Line 195: cannot initialize a variable of type Line 196: cannot initialize a variable of type error: 'error' diagnostics seen but not expected: Line 25: flash pointer datum requires a const qualifier Line 26: flash pointer datum requires a const qualifier Line 50: flash pointer datum requires a const qualifier Line 51: flash pointer datum requires a const qualifier Line 52: flash pointer datum requires a const qualifier Line 102: flash pointer datum requires a const qualifier Line 103: flash pointer datum requires a const qualifier Line 131: flash pointer datum requires a const qualifier Line 132: flash pointer datum requires a const qualifier Line 133: flash pointer datum requires a const qualifier Line 157: flash pointer datum requires a const qualifier Line 158: flash pointer datum requires a const qualifier Line 159: flash pointer datum requires a const qualifier Line 181: flash pointer datum requires a const qualifier Line 182: flash pointer datum requires a const qualifier Line 183: flash pointer datum requires a const qualifier Line 186: flash pointer datum requires a const qualifier Line 189: flash pointer datum requires a const qualifier Line 194: flash pointer datum requires a const qualifier Line 196: flash pointer datum requires a const qualifier 40 errors generated. -- ******************** FAIL: Clang :: SemaCXX/address-space-references.cpp (3570 of 10663) ******************** TEST 'Clang :: SemaCXX/address-space-references.cpp' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -fsyntax-only -verify /home/nicklas/install/avr-llvm/llvm/tools/clang/test/SemaCXX/address-space-references.cpp -- Exit Code: 1 Command Output (stderr): -- error: 'error' diagnostics seen but not expected: Line 13: flash variable requires const qualifier 1 error generated. -- ******************** FAIL: Clang :: SemaTemplate/address-spaces.cpp (4404 of 10663) ******************** TEST 'Clang :: SemaTemplate/address-spaces.cpp' FAILED ******************** Script: -- /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/clang -cc1 -internal-isystem /home/nicklas/install/avr-llvm/build/Debug+Asserts/bin/../lib/clang/3.2/include -fsyntax-only -verify /home/nicklas/install/avr-llvm/llvm/tools/clang/test/SemaTemplate/address-spaces.cpp -- Exit Code: 1 Command Output (stderr): -- error: 'error' diagnostics expected but not seen: Line 53: cannot initialize a variable of type '__attribute__((address_space(1))) int *' with an rvalue of type 'int' error: 'error' diagnostics seen but not expected: Line 57: flash pointer datum requires a const qualifier Line 72: flash variable requires const qualifier Line 82: flash variable requires const qualifier error: 'note' diagnostics expected but not seen: Line 59: in instantiation of 5 errors generated. -- ******************** Testing Time: 295.76s ******************** Failing Tests (11): Clang :: CodeGen/address-space-compound-literal.c Clang :: CodeGen/address-space-field1.c Clang :: CodeGen/address-space.c Clang :: CodeGenCXX/mangle-address-space.cpp Clang :: PCH/types.c Clang :: Sema/address_spaces.c Clang :: SemaCXX/address-space-conversion.cpp Clang :: SemaCXX/address-space-newdelete.cpp Clang :: SemaCXX/address-space-references.cpp Clang :: SemaTemplate/address-spaces.cpp Expected Passes : 10557 Expected Failures : 82 Unsupported Tests : 13 Unexpected Failures: 10 make[1]: *** [check-local-all] Error 1 make[1]: Leaving directory `/home/nicklas/install/avr-llvm/build/test' make: *** [check-all] Error 2 nicklas@nicklas-laptop:~/install/avr-llvm/build$ |
From: Borja F. <bor...@gm...> - 2012-05-10 15:32:39
|
This is what I'm getting: Expected Passes : 9914 Expected Failures : 66 Unsupported Tests : 569 Unexpected Failures: 11 I've seen in that file you attached that you're getting errors because of the target triple, errors like: error: unable to create target: 'No available targets are compatible with this triple, see -version for the available targets.' or error auto-selecting target for module 'No available targets are compatible with this triple, see -version for the available targets so I guess that's the reason, so what is your target triple? do clang -v to get it, mine is i386-pc-linux-gnu 2012/5/10 Borja Ferrer <bor...@gm...> > Interesting, I'll check it out tomorrow to see if I can find some reason > behind this, because we're getting very different results here. > > > 2012/5/9 Nicklas Bo Jensen <nbj...@gm...> > >> Sorry for my slow response.Got i working again now, thanks. >> >> Building with optimization disabled and assertions turned on i get: >> >> Avr llvm+clang: >> Expected Passes : 6978 >> Expected Failures : 39 >> Unsupported Tests : 3281 >> Unexpected Failures: 279 >> >> In the 279 unexpected failures for example 143 of them are >> test/CodeGen/Generic. I'm not really sure how these tests are supposed to >> work? None of them seems to be using FileCheck. >> >> However building for msp430 seems to be giving me similar results, >> indicating that it is not a avr-llvm specific problem. Please see the >> attached output "make check-all" from avr-llvm. >> >> >> On Fri, May 4, 2012 at 11:30 PM, Borja Ferrer <bor...@gm...>wrote: >> >>> I'm asking because last week you said that you were getting +200 fails, >>> and since I'm getting 11 I wanted to know what's going on. >>> >>> faluco is me btw, I updated a patch today because I got a conflict when >>> updating my clang repo. These variables are defined in >>> DiagnosticSemaKinds.td so check that you have them, they come from the >>> flash.diff patch. >>> >>> >>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>> >>>> The new tests should pass. I cannot check other tests now, I'm having >>>> some issues after applying the newest patches that came in today by faluco: >>>> >>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: >>>> error: >>>> no member named 'err_flash_variable_requires_const' in namespace >>>> 'clang::diag' >>>> Diag(NewVD->getLocation(), diag::err_flash_variable_requires_const); >>>> ~~~~~~^ >>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: >>>> error: >>>> no member named 'err_flash_pointer_requires_const' in namespace >>>> 'clang::diag' >>>> Diag(NewVD->getLocation(), diag::err_flash_pointer_requires_const); >>>> ~~~~~~^ >>>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: >>>> error: >>>> no member named 'err_flash_pointer_requires_const' in namespace >>>> 'clang::diag' >>>> Diag(NameLoc, diag::err_flash_pointer_requires_const); >>>> ~~~~~~^ >>>> Have i done something wrong? >>>> >>>> Thanks, >>>> Nicklas >>>> >>>> On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer <bor...@gm...>wrote: >>>> >>>>> How many tests failures are you getting now? >>>>> I'm getting 11, 10 from clang due to address space stuff (you'll need >>>>> to patch clang to get those) and 1 from llvm. >>>>> >>>>> >>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>> >>>>>> Ah, perfect. >>>>>> >>>>>> I would actually guess that you need to run "make check-all" before >>>>>> being able to test new tests individually. Sorry :) >>>>>> >>>>>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer <bor...@gm...>wrote: >>>>>> >>>>>>> Nevermind, got it. >>>>>>> >>>>>>> >>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>> >>>>>>>> Thanks! >>>>>>>> >>>>>>>> One thing, i dont have llvm-lit in that dir, am I supposed to build >>>>>>>> llvm with an addtional param or something in order to get it? >>>>>>>> >>>>>>>> >>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>> >>>>>>>>> Ok, I've committed now. To only run the AVR specific tests run >>>>>>>>> something like: >>>>>>>>> >>>>>>>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>>>>>>> >>>>>>>>> >>>>>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer < >>>>>>>>> bor...@gm...> wrote: >>>>>>>>> >>>>>>>>>> Oh a small one I've just noticed, leave only 1 newline between >>>>>>>>>> tests not 2. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>>> >>>>>>>>>>> Ok they look great now, I don't have any other objections. >>>>>>>>>>> Please commit this test to SVN, post your SF username here so that Eric or >>>>>>>>>>> John can give you commit permissions. Once it gets commited I'll check if I >>>>>>>>>>> need to add any pattern specific tests to it, these tests are corner cases >>>>>>>>>>> of some instructions. >>>>>>>>>>> Before commiting it, remove the testcases dir with all the files >>>>>>>>>>> there, and create a new one called test/CodeGen/AVR, and place your file >>>>>>>>>>> there, just to keep the same structure like in llvm's repo. >>>>>>>>>>> >>>>>>>>>>> About the rest of tests to do, from that list remove mul and >>>>>>>>>>> division for now, mul isn't yet implemented and division can come later. >>>>>>>>>>> Sub tests should be very similar to add, then add binary ops (or, and, >>>>>>>>>>> xor). Add calling convention tests (argument passing through regs and >>>>>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>>>>> >>>>>>>>>>> There are quite a few tests to add, but for now do the sub and >>>>>>>>>>> binary op tests and we'll discuss the others by then. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>>> >>>>>>>>>>>> Hi, >>>>>>>>>>>> >>>>>>>>>>>> 1) Sure >>>>>>>>>>>> 2) Yes, I've followed the msp430 backend that does include it. >>>>>>>>>>>> I've removed it now. >>>>>>>>>>>> 3) Again, I've moved the CHECK lines, but it differs from >>>>>>>>>>>> backend to backend. >>>>>>>>>>>> 4) Done >>>>>>>>>>>> 5) Done >>>>>>>>>>>> 6) Done >>>>>>>>>>>> >>>>>>>>>>>> I will continue working other tests, which do we need? >>>>>>>>>>>> Something like(and please add/comment): >>>>>>>>>>>> >>>>>>>>>>>> -Sub >>>>>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>>>>> -mult >>>>>>>>>>>> -Return argument(In a few variants) >>>>>>>>>>>> -and >>>>>>>>>>>> -or >>>>>>>>>>>> -xor >>>>>>>>>>>> -increment >>>>>>>>>>>> -branching? >>>>>>>>>>>> >>>>>>>>>>>> Any ideas? >>>>>>>>>>>> >>>>>>>>>>>> Thanks, >>>>>>>>>>>> Nicklas >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> Obviously in the last line I meant adiw or subi/sbci pair, add >>>>>>>>>>>>> for immediates doesn't exist for imms greater than 63 >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>>>>> >>>>>>>>>>>>>> They look good, very nice :) >>>>>>>>>>>>>> >>>>>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>>>>> >>>>>>>>>>>>>> 1) I think it's not necessary to add the reg_reg_imm variant >>>>>>>>>>>>>> because you covered it with the other two tests. >>>>>>>>>>>>>> 2) Do the tests work if you remove the target triple line? >>>>>>>>>>>>>> I've seen other backends don't include it. >>>>>>>>>>>>>> 3) Move the CHECK lines after the function prototype like >>>>>>>>>>>>>> other backends do. >>>>>>>>>>>>>> 4) In every CHECK line, can you remove the tabs between the >>>>>>>>>>>>>> instr mnemonic and the first operand and add a single space? (I'm unsure >>>>>>>>>>>>>> about this because i dont know if CHECK eats spaces). Also for the future, >>>>>>>>>>>>>> the llvm coding standards says to config your editor to replace tabs with >>>>>>>>>>>>>> spaces, so it's a good moment time to do it. >>>>>>>>>>>>>> 5) Oh and the most important one, please add this in only one >>>>>>>>>>>>>> file, add.ll or something like that, so we can keep this convention in the >>>>>>>>>>>>>> future, otherwise we'll end having too many test files. >>>>>>>>>>>>>> >>>>>>>>>>>>>> Something that should be covered is, when doing 16 bit >>>>>>>>>>>>>> additions we can use adiw or add depending on the imm value, can you cover >>>>>>>>>>>>>> this aswell? >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>>>>>>>>> nbj...@gm...> wrote: >>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> How should I test/simulate the assembler? I get errors when >>>>>>>>>>>>>>>> trying to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>>>>>>>>> different assembler? >>>>>>>>>>>>>>>> >>>>>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is different >>>>>>>>>>>>>>> then the Atmel assembler syntax. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> Eventually we could support multiple asm syntax's like the >>>>>>>>>>>>>>> X86 target does. >>>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-09 22:18:25
|
Interesting, I'll check it out tomorrow to see if I can find some reason behind this, because we're getting very different results here. 2012/5/9 Nicklas Bo Jensen <nbj...@gm...> > Sorry for my slow response.Got i working again now, thanks. > > Building with optimization disabled and assertions turned on i get: > > Avr llvm+clang: > Expected Passes : 6978 > Expected Failures : 39 > Unsupported Tests : 3281 > Unexpected Failures: 279 > > In the 279 unexpected failures for example 143 of them are > test/CodeGen/Generic. I'm not really sure how these tests are supposed to > work? None of them seems to be using FileCheck. > > However building for msp430 seems to be giving me similar results, > indicating that it is not a avr-llvm specific problem. Please see the > attached output "make check-all" from avr-llvm. > > > On Fri, May 4, 2012 at 11:30 PM, Borja Ferrer <bor...@gm...>wrote: > >> I'm asking because last week you said that you were getting +200 fails, >> and since I'm getting 11 I wanted to know what's going on. >> >> faluco is me btw, I updated a patch today because I got a conflict when >> updating my clang repo. These variables are defined in >> DiagnosticSemaKinds.td so check that you have them, they come from the >> flash.diff patch. >> >> >> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >> >>> The new tests should pass. I cannot check other tests now, I'm having >>> some issues after applying the newest patches that came in today by faluco: >>> >>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: >>> error: >>> no member named 'err_flash_variable_requires_const' in namespace >>> 'clang::diag' >>> Diag(NewVD->getLocation(), diag::err_flash_variable_requires_const); >>> ~~~~~~^ >>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: >>> error: >>> no member named 'err_flash_pointer_requires_const' in namespace >>> 'clang::diag' >>> Diag(NewVD->getLocation(), diag::err_flash_pointer_requires_const); >>> ~~~~~~^ >>> /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: >>> error: >>> no member named 'err_flash_pointer_requires_const' in namespace >>> 'clang::diag' >>> Diag(NameLoc, diag::err_flash_pointer_requires_const); >>> ~~~~~~^ >>> Have i done something wrong? >>> >>> Thanks, >>> Nicklas >>> >>> On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer <bor...@gm...>wrote: >>> >>>> How many tests failures are you getting now? >>>> I'm getting 11, 10 from clang due to address space stuff (you'll need >>>> to patch clang to get those) and 1 from llvm. >>>> >>>> >>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>> >>>>> Ah, perfect. >>>>> >>>>> I would actually guess that you need to run "make check-all" before >>>>> being able to test new tests individually. Sorry :) >>>>> >>>>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer <bor...@gm...>wrote: >>>>> >>>>>> Nevermind, got it. >>>>>> >>>>>> >>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>> >>>>>>> Thanks! >>>>>>> >>>>>>> One thing, i dont have llvm-lit in that dir, am I supposed to build >>>>>>> llvm with an addtional param or something in order to get it? >>>>>>> >>>>>>> >>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>> >>>>>>>> Ok, I've committed now. To only run the AVR specific tests run >>>>>>>> something like: >>>>>>>> >>>>>>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>>>>>> >>>>>>>> >>>>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm... >>>>>>>> > wrote: >>>>>>>> >>>>>>>>> Oh a small one I've just noticed, leave only 1 newline between >>>>>>>>> tests not 2. >>>>>>>>> >>>>>>>>> >>>>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>>>> >>>>>>>>>> Ok they look great now, I don't have any other objections. Please >>>>>>>>>> commit this test to SVN, post your SF username here so that Eric or John >>>>>>>>>> can give you commit permissions. Once it gets commited I'll check if I need >>>>>>>>>> to add any pattern specific tests to it, these tests are corner cases of >>>>>>>>>> some instructions. >>>>>>>>>> Before commiting it, remove the testcases dir with all the files >>>>>>>>>> there, and create a new one called test/CodeGen/AVR, and place your file >>>>>>>>>> there, just to keep the same structure like in llvm's repo. >>>>>>>>>> >>>>>>>>>> About the rest of tests to do, from that list remove mul and >>>>>>>>>> division for now, mul isn't yet implemented and division can come later. >>>>>>>>>> Sub tests should be very similar to add, then add binary ops (or, and, >>>>>>>>>> xor). Add calling convention tests (argument passing through regs and >>>>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>>>> >>>>>>>>>> There are quite a few tests to add, but for now do the sub and >>>>>>>>>> binary op tests and we'll discuss the others by then. >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>> >>>>>>>>>>> Hi, >>>>>>>>>>> >>>>>>>>>>> 1) Sure >>>>>>>>>>> 2) Yes, I've followed the msp430 backend that does include it. >>>>>>>>>>> I've removed it now. >>>>>>>>>>> 3) Again, I've moved the CHECK lines, but it differs from >>>>>>>>>>> backend to backend. >>>>>>>>>>> 4) Done >>>>>>>>>>> 5) Done >>>>>>>>>>> 6) Done >>>>>>>>>>> >>>>>>>>>>> I will continue working other tests, which do we need? Something >>>>>>>>>>> like(and please add/comment): >>>>>>>>>>> >>>>>>>>>>> -Sub >>>>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>>>> -mult >>>>>>>>>>> -Return argument(In a few variants) >>>>>>>>>>> -and >>>>>>>>>>> -or >>>>>>>>>>> -xor >>>>>>>>>>> -increment >>>>>>>>>>> -branching? >>>>>>>>>>> >>>>>>>>>>> Any ideas? >>>>>>>>>>> >>>>>>>>>>> Thanks, >>>>>>>>>>> Nicklas >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>> >>>>>>>>>>>> Obviously in the last line I meant adiw or subi/sbci pair, add >>>>>>>>>>>> for immediates doesn't exist for imms greater than 63 >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>>>> >>>>>>>>>>>>> They look good, very nice :) >>>>>>>>>>>>> >>>>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>>>> >>>>>>>>>>>>> 1) I think it's not necessary to add the reg_reg_imm variant >>>>>>>>>>>>> because you covered it with the other two tests. >>>>>>>>>>>>> 2) Do the tests work if you remove the target triple line? >>>>>>>>>>>>> I've seen other backends don't include it. >>>>>>>>>>>>> 3) Move the CHECK lines after the function prototype like >>>>>>>>>>>>> other backends do. >>>>>>>>>>>>> 4) In every CHECK line, can you remove the tabs between the >>>>>>>>>>>>> instr mnemonic and the first operand and add a single space? (I'm unsure >>>>>>>>>>>>> about this because i dont know if CHECK eats spaces). Also for the future, >>>>>>>>>>>>> the llvm coding standards says to config your editor to replace tabs with >>>>>>>>>>>>> spaces, so it's a good moment time to do it. >>>>>>>>>>>>> 5) Oh and the most important one, please add this in only one >>>>>>>>>>>>> file, add.ll or something like that, so we can keep this convention in the >>>>>>>>>>>>> future, otherwise we'll end having too many test files. >>>>>>>>>>>>> >>>>>>>>>>>>> Something that should be covered is, when doing 16 bit >>>>>>>>>>>>> additions we can use adiw or add depending on the imm value, can you cover >>>>>>>>>>>>> this aswell? >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> >>>>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>>>>>>>> nbj...@gm...> wrote: >>>>>>>>>>>>>> >>>>>>>>>>>>>>> Hi, >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> How should I test/simulate the assembler? I get errors when >>>>>>>>>>>>>>> trying to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>>>>>>>> different assembler? >>>>>>>>>>>>>>> >>>>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is different >>>>>>>>>>>>>> then the Atmel assembler syntax. >>>>>>>>>>>>>> >>>>>>>>>>>>>> Eventually we could support multiple asm syntax's like the >>>>>>>>>>>>>> X86 target does. >>>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-04 21:30:40
|
I'm asking because last week you said that you were getting +200 fails, and since I'm getting 11 I wanted to know what's going on. faluco is me btw, I updated a patch today because I got a conflict when updating my clang repo. These variables are defined in DiagnosticSemaKinds.td so check that you have them, they come from the flash.diff patch. 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> > The new tests should pass. I cannot check other tests now, I'm having some > issues after applying the newest patches that came in today by faluco: > > /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: > error: > no member named 'err_flash_variable_requires_const' in namespace > 'clang::diag' > Diag(NewVD->getLocation(), diag::err_flash_variable_requires_const); > ~~~~~~^ > /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: > error: > no member named 'err_flash_pointer_requires_const' in namespace > 'clang::diag' > Diag(NewVD->getLocation(), diag::err_flash_pointer_requires_const); > ~~~~~~^ > /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: > error: > no member named 'err_flash_pointer_requires_const' in namespace > 'clang::diag' > Diag(NameLoc, diag::err_flash_pointer_requires_const); > ~~~~~~^ > Have i done something wrong? > > Thanks, > Nicklas > > On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer <bor...@gm...>wrote: > >> How many tests failures are you getting now? >> I'm getting 11, 10 from clang due to address space stuff (you'll need to >> patch clang to get those) and 1 from llvm. >> >> >> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >> >>> Ah, perfect. >>> >>> I would actually guess that you need to run "make check-all" before >>> being able to test new tests individually. Sorry :) >>> >>> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer <bor...@gm...>wrote: >>> >>>> Nevermind, got it. >>>> >>>> >>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>> >>>>> Thanks! >>>>> >>>>> One thing, i dont have llvm-lit in that dir, am I supposed to build >>>>> llvm with an addtional param or something in order to get it? >>>>> >>>>> >>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>> >>>>>> Ok, I've committed now. To only run the AVR specific tests run >>>>>> something like: >>>>>> >>>>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>>>> >>>>>> >>>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm...>wrote: >>>>>> >>>>>>> Oh a small one I've just noticed, leave only 1 newline between tests >>>>>>> not 2. >>>>>>> >>>>>>> >>>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>>> >>>>>>>> Ok they look great now, I don't have any other objections. Please >>>>>>>> commit this test to SVN, post your SF username here so that Eric or John >>>>>>>> can give you commit permissions. Once it gets commited I'll check if I need >>>>>>>> to add any pattern specific tests to it, these tests are corner cases of >>>>>>>> some instructions. >>>>>>>> Before commiting it, remove the testcases dir with all the files >>>>>>>> there, and create a new one called test/CodeGen/AVR, and place your file >>>>>>>> there, just to keep the same structure like in llvm's repo. >>>>>>>> >>>>>>>> About the rest of tests to do, from that list remove mul and >>>>>>>> division for now, mul isn't yet implemented and division can come later. >>>>>>>> Sub tests should be very similar to add, then add binary ops (or, and, >>>>>>>> xor). Add calling convention tests (argument passing through regs and >>>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>>> >>>>>>>> There are quite a few tests to add, but for now do the sub and >>>>>>>> binary op tests and we'll discuss the others by then. >>>>>>>> >>>>>>>> >>>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>> >>>>>>>>> Hi, >>>>>>>>> >>>>>>>>> 1) Sure >>>>>>>>> 2) Yes, I've followed the msp430 backend that does include it. >>>>>>>>> I've removed it now. >>>>>>>>> 3) Again, I've moved the CHECK lines, but it differs from backend >>>>>>>>> to backend. >>>>>>>>> 4) Done >>>>>>>>> 5) Done >>>>>>>>> 6) Done >>>>>>>>> >>>>>>>>> I will continue working other tests, which do we need? Something >>>>>>>>> like(and please add/comment): >>>>>>>>> >>>>>>>>> -Sub >>>>>>>>> -division(Only working for multiples of 2?) >>>>>>>>> -mult >>>>>>>>> -Return argument(In a few variants) >>>>>>>>> -and >>>>>>>>> -or >>>>>>>>> -xor >>>>>>>>> -increment >>>>>>>>> -branching? >>>>>>>>> >>>>>>>>> Any ideas? >>>>>>>>> >>>>>>>>> Thanks, >>>>>>>>> Nicklas >>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>>> bor...@gm...> wrote: >>>>>>>>> >>>>>>>>>> Obviously in the last line I meant adiw or subi/sbci pair, add >>>>>>>>>> for immediates doesn't exist for imms greater than 63 >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>>> >>>>>>>>>>> They look good, very nice :) >>>>>>>>>>> >>>>>>>>>>> Some small details and nitpicks: >>>>>>>>>>> >>>>>>>>>>> 1) I think it's not necessary to add the reg_reg_imm variant >>>>>>>>>>> because you covered it with the other two tests. >>>>>>>>>>> 2) Do the tests work if you remove the target triple line? I've >>>>>>>>>>> seen other backends don't include it. >>>>>>>>>>> 3) Move the CHECK lines after the function prototype like other >>>>>>>>>>> backends do. >>>>>>>>>>> 4) In every CHECK line, can you remove the tabs between the >>>>>>>>>>> instr mnemonic and the first operand and add a single space? (I'm unsure >>>>>>>>>>> about this because i dont know if CHECK eats spaces). Also for the future, >>>>>>>>>>> the llvm coding standards says to config your editor to replace tabs with >>>>>>>>>>> spaces, so it's a good moment time to do it. >>>>>>>>>>> 5) Oh and the most important one, please add this in only one >>>>>>>>>>> file, add.ll or something like that, so we can keep this convention in the >>>>>>>>>>> future, otherwise we'll end having too many test files. >>>>>>>>>>> >>>>>>>>>>> Something that should be covered is, when doing 16 bit additions >>>>>>>>>>> we can use adiw or add depending on the imm value, can you cover this >>>>>>>>>>> aswell? >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>>>>>> nbj...@gm...> wrote: >>>>>>>>>>>> >>>>>>>>>>>>> Hi, >>>>>>>>>>>>> >>>>>>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>>>>>> >>>>>>>>>>>>> How should I test/simulate the assembler? I get errors when >>>>>>>>>>>>> trying to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>>>>>> different assembler? >>>>>>>>>>>>> >>>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is different >>>>>>>>>>>> then the Atmel assembler syntax. >>>>>>>>>>>> >>>>>>>>>>>> Eventually we could support multiple asm syntax's like the X86 >>>>>>>>>>>> target does. >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-05-04 21:14:34
|
The new tests should pass. I cannot check other tests now, I'm having some issues after applying the newest patches that came in today by faluco: /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4374:38: error: no member named 'err_flash_variable_requires_const' in namespace 'clang::diag' Diag(NewVD->getLocation(), diag::err_flash_variable_requires_const); ~~~~~~^ /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:4383:38: error: no member named 'err_flash_pointer_requires_const' in namespace 'clang::diag' Diag(NewVD->getLocation(), diag::err_flash_pointer_requires_const); ~~~~~~^ /home/nicklas/install/avr-llvm/llvm/tools/clang/lib/Sema/SemaDecl.cpp:7208:25: error: no member named 'err_flash_pointer_requires_const' in namespace 'clang::diag' Diag(NameLoc, diag::err_flash_pointer_requires_const); ~~~~~~^ Have i done something wrong? Thanks, Nicklas On Fri, May 4, 2012 at 8:50 PM, Borja Ferrer <bor...@gm...> wrote: > How many tests failures are you getting now? > I'm getting 11, 10 from clang due to address space stuff (you'll need to > patch clang to get those) and 1 from llvm. > > > 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> > >> Ah, perfect. >> >> I would actually guess that you need to run "make check-all" before being >> able to test new tests individually. Sorry :) >> >> On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer <bor...@gm...>wrote: >> >>> Nevermind, got it. >>> >>> >>> 2012/5/4 Borja Ferrer <bor...@gm...> >>> >>>> Thanks! >>>> >>>> One thing, i dont have llvm-lit in that dir, am I supposed to build >>>> llvm with an addtional param or something in order to get it? >>>> >>>> >>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>> >>>>> Ok, I've committed now. To only run the AVR specific tests run >>>>> something like: >>>>> >>>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>>> >>>>> >>>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm...>wrote: >>>>> >>>>>> Oh a small one I've just noticed, leave only 1 newline between tests >>>>>> not 2. >>>>>> >>>>>> >>>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>>> >>>>>>> Ok they look great now, I don't have any other objections. Please >>>>>>> commit this test to SVN, post your SF username here so that Eric or John >>>>>>> can give you commit permissions. Once it gets commited I'll check if I need >>>>>>> to add any pattern specific tests to it, these tests are corner cases of >>>>>>> some instructions. >>>>>>> Before commiting it, remove the testcases dir with all the files >>>>>>> there, and create a new one called test/CodeGen/AVR, and place your file >>>>>>> there, just to keep the same structure like in llvm's repo. >>>>>>> >>>>>>> About the rest of tests to do, from that list remove mul and >>>>>>> division for now, mul isn't yet implemented and division can come later. >>>>>>> Sub tests should be very similar to add, then add binary ops (or, and, >>>>>>> xor). Add calling convention tests (argument passing through regs and >>>>>>> stack, return values for each value type, calls). Memory operations, etc... >>>>>>> >>>>>>> There are quite a few tests to add, but for now do the sub and >>>>>>> binary op tests and we'll discuss the others by then. >>>>>>> >>>>>>> >>>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>>> >>>>>>>> Hi, >>>>>>>> >>>>>>>> 1) Sure >>>>>>>> 2) Yes, I've followed the msp430 backend that does include it. I've >>>>>>>> removed it now. >>>>>>>> 3) Again, I've moved the CHECK lines, but it differs from backend >>>>>>>> to backend. >>>>>>>> 4) Done >>>>>>>> 5) Done >>>>>>>> 6) Done >>>>>>>> >>>>>>>> I will continue working other tests, which do we need? Something >>>>>>>> like(and please add/comment): >>>>>>>> >>>>>>>> -Sub >>>>>>>> -division(Only working for multiples of 2?) >>>>>>>> -mult >>>>>>>> -Return argument(In a few variants) >>>>>>>> -and >>>>>>>> -or >>>>>>>> -xor >>>>>>>> -increment >>>>>>>> -branching? >>>>>>>> >>>>>>>> Any ideas? >>>>>>>> >>>>>>>> Thanks, >>>>>>>> Nicklas >>>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer < >>>>>>>> bor...@gm...> wrote: >>>>>>>> >>>>>>>>> Obviously in the last line I meant adiw or subi/sbci pair, add for >>>>>>>>> immediates doesn't exist for imms greater than 63 >>>>>>>>> >>>>>>>>> >>>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>>> >>>>>>>>>> They look good, very nice :) >>>>>>>>>> >>>>>>>>>> Some small details and nitpicks: >>>>>>>>>> >>>>>>>>>> 1) I think it's not necessary to add the reg_reg_imm variant >>>>>>>>>> because you covered it with the other two tests. >>>>>>>>>> 2) Do the tests work if you remove the target triple line? I've >>>>>>>>>> seen other backends don't include it. >>>>>>>>>> 3) Move the CHECK lines after the function prototype like other >>>>>>>>>> backends do. >>>>>>>>>> 4) In every CHECK line, can you remove the tabs between the instr >>>>>>>>>> mnemonic and the first operand and add a single space? (I'm unsure about >>>>>>>>>> this because i dont know if CHECK eats spaces). Also for the future, the >>>>>>>>>> llvm coding standards says to config your editor to replace tabs with >>>>>>>>>> spaces, so it's a good moment time to do it. >>>>>>>>>> 5) Oh and the most important one, please add this in only one >>>>>>>>>> file, add.ll or something like that, so we can keep this convention in the >>>>>>>>>> future, otherwise we'll end having too many test files. >>>>>>>>>> >>>>>>>>>> Something that should be covered is, when doing 16 bit additions >>>>>>>>>> we can use adiw or add depending on the imm value, can you cover this >>>>>>>>>> aswell? >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>>>>> nbj...@gm...> wrote: >>>>>>>>>>> >>>>>>>>>>>> Hi, >>>>>>>>>>>> >>>>>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>>>>> >>>>>>>>>>>> How should I test/simulate the assembler? I get errors when >>>>>>>>>>>> trying to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>>>>> different assembler? >>>>>>>>>>>> >>>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is different then >>>>>>>>>>> the Atmel assembler syntax. >>>>>>>>>>> >>>>>>>>>>> Eventually we could support multiple asm syntax's like the X86 >>>>>>>>>>> target does. >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-04 18:51:05
|
How many tests failures are you getting now? I'm getting 11, 10 from clang due to address space stuff (you'll need to patch clang to get those) and 1 from llvm. 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> > Ah, perfect. > > I would actually guess that you need to run "make check-all" before being > able to test new tests individually. Sorry :) > > On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer <bor...@gm...>wrote: > >> Nevermind, got it. >> >> >> 2012/5/4 Borja Ferrer <bor...@gm...> >> >>> Thanks! >>> >>> One thing, i dont have llvm-lit in that dir, am I supposed to build llvm >>> with an addtional param or something in order to get it? >>> >>> >>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>> >>>> Ok, I've committed now. To only run the AVR specific tests run >>>> something like: >>>> >>>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>>> >>>> >>>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm...>wrote: >>>> >>>>> Oh a small one I've just noticed, leave only 1 newline between tests >>>>> not 2. >>>>> >>>>> >>>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>>> >>>>>> Ok they look great now, I don't have any other objections. Please >>>>>> commit this test to SVN, post your SF username here so that Eric or John >>>>>> can give you commit permissions. Once it gets commited I'll check if I need >>>>>> to add any pattern specific tests to it, these tests are corner cases of >>>>>> some instructions. >>>>>> Before commiting it, remove the testcases dir with all the files >>>>>> there, and create a new one called test/CodeGen/AVR, and place your file >>>>>> there, just to keep the same structure like in llvm's repo. >>>>>> >>>>>> About the rest of tests to do, from that list remove mul and division >>>>>> for now, mul isn't yet implemented and division can come later. Sub tests >>>>>> should be very similar to add, then add binary ops (or, and, xor). Add >>>>>> calling convention tests (argument passing through regs and stack, return >>>>>> values for each value type, calls). Memory operations, etc... >>>>>> >>>>>> There are quite a few tests to add, but for now do the sub and binary >>>>>> op tests and we'll discuss the others by then. >>>>>> >>>>>> >>>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>>> >>>>>>> Hi, >>>>>>> >>>>>>> 1) Sure >>>>>>> 2) Yes, I've followed the msp430 backend that does include it. I've >>>>>>> removed it now. >>>>>>> 3) Again, I've moved the CHECK lines, but it differs from backend to >>>>>>> backend. >>>>>>> 4) Done >>>>>>> 5) Done >>>>>>> 6) Done >>>>>>> >>>>>>> I will continue working other tests, which do we need? Something >>>>>>> like(and please add/comment): >>>>>>> >>>>>>> -Sub >>>>>>> -division(Only working for multiples of 2?) >>>>>>> -mult >>>>>>> -Return argument(In a few variants) >>>>>>> -and >>>>>>> -or >>>>>>> -xor >>>>>>> -increment >>>>>>> -branching? >>>>>>> >>>>>>> Any ideas? >>>>>>> >>>>>>> Thanks, >>>>>>> Nicklas >>>>>>> >>>>>>> >>>>>>> >>>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer <bor...@gm... >>>>>>> > wrote: >>>>>>> >>>>>>>> Obviously in the last line I meant adiw or subi/sbci pair, add for >>>>>>>> immediates doesn't exist for imms greater than 63 >>>>>>>> >>>>>>>> >>>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>>> >>>>>>>>> They look good, very nice :) >>>>>>>>> >>>>>>>>> Some small details and nitpicks: >>>>>>>>> >>>>>>>>> 1) I think it's not necessary to add the reg_reg_imm variant >>>>>>>>> because you covered it with the other two tests. >>>>>>>>> 2) Do the tests work if you remove the target triple line? I've >>>>>>>>> seen other backends don't include it. >>>>>>>>> 3) Move the CHECK lines after the function prototype like other >>>>>>>>> backends do. >>>>>>>>> 4) In every CHECK line, can you remove the tabs between the instr >>>>>>>>> mnemonic and the first operand and add a single space? (I'm unsure about >>>>>>>>> this because i dont know if CHECK eats spaces). Also for the future, the >>>>>>>>> llvm coding standards says to config your editor to replace tabs with >>>>>>>>> spaces, so it's a good moment time to do it. >>>>>>>>> 5) Oh and the most important one, please add this in only one >>>>>>>>> file, add.ll or something like that, so we can keep this convention in the >>>>>>>>> future, otherwise we'll end having too many test files. >>>>>>>>> >>>>>>>>> Something that should be covered is, when doing 16 bit additions >>>>>>>>> we can use adiw or add depending on the imm value, can you cover this >>>>>>>>> aswell? >>>>>>>>> >>>>>>>>> >>>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>>>> nbj...@gm...> wrote: >>>>>>>>>> >>>>>>>>>>> Hi, >>>>>>>>>>> >>>>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>>>> >>>>>>>>>>> How should I test/simulate the assembler? I get errors when >>>>>>>>>>> trying to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>>>> different assembler? >>>>>>>>>>> >>>>>>>>>>> avr-llvm produces GNU assembler syntax, which is different then >>>>>>>>>> the Atmel assembler syntax. >>>>>>>>>> >>>>>>>>>> Eventually we could support multiple asm syntax's like the X86 >>>>>>>>>> target does. >>>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-05-04 18:26:09
|
Ah, perfect. I would actually guess that you need to run "make check-all" before being able to test new tests individually. Sorry :) On Fri, May 4, 2012 at 8:17 PM, Borja Ferrer <bor...@gm...> wrote: > Nevermind, got it. > > > 2012/5/4 Borja Ferrer <bor...@gm...> > >> Thanks! >> >> One thing, i dont have llvm-lit in that dir, am I supposed to build llvm >> with an addtional param or something in order to get it? >> >> >> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >> >>> Ok, I've committed now. To only run the AVR specific tests run something >>> like: >>> >>> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >>> >>> >>> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm...>wrote: >>> >>>> Oh a small one I've just noticed, leave only 1 newline between tests >>>> not 2. >>>> >>>> >>>> 2012/5/4 Borja Ferrer <bor...@gm...> >>>> >>>>> Ok they look great now, I don't have any other objections. Please >>>>> commit this test to SVN, post your SF username here so that Eric or John >>>>> can give you commit permissions. Once it gets commited I'll check if I need >>>>> to add any pattern specific tests to it, these tests are corner cases of >>>>> some instructions. >>>>> Before commiting it, remove the testcases dir with all the files >>>>> there, and create a new one called test/CodeGen/AVR, and place your file >>>>> there, just to keep the same structure like in llvm's repo. >>>>> >>>>> About the rest of tests to do, from that list remove mul and division >>>>> for now, mul isn't yet implemented and division can come later. Sub tests >>>>> should be very similar to add, then add binary ops (or, and, xor). Add >>>>> calling convention tests (argument passing through regs and stack, return >>>>> values for each value type, calls). Memory operations, etc... >>>>> >>>>> There are quite a few tests to add, but for now do the sub and binary >>>>> op tests and we'll discuss the others by then. >>>>> >>>>> >>>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>>> >>>>>> Hi, >>>>>> >>>>>> 1) Sure >>>>>> 2) Yes, I've followed the msp430 backend that does include it. I've >>>>>> removed it now. >>>>>> 3) Again, I've moved the CHECK lines, but it differs from backend to >>>>>> backend. >>>>>> 4) Done >>>>>> 5) Done >>>>>> 6) Done >>>>>> >>>>>> I will continue working other tests, which do we need? Something >>>>>> like(and please add/comment): >>>>>> >>>>>> -Sub >>>>>> -division(Only working for multiples of 2?) >>>>>> -mult >>>>>> -Return argument(In a few variants) >>>>>> -and >>>>>> -or >>>>>> -xor >>>>>> -increment >>>>>> -branching? >>>>>> >>>>>> Any ideas? >>>>>> >>>>>> Thanks, >>>>>> Nicklas >>>>>> >>>>>> >>>>>> >>>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer <bor...@gm...>wrote: >>>>>> >>>>>>> Obviously in the last line I meant adiw or subi/sbci pair, add for >>>>>>> immediates doesn't exist for imms greater than 63 >>>>>>> >>>>>>> >>>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>>> >>>>>>>> They look good, very nice :) >>>>>>>> >>>>>>>> Some small details and nitpicks: >>>>>>>> >>>>>>>> 1) I think it's not necessary to add the reg_reg_imm variant >>>>>>>> because you covered it with the other two tests. >>>>>>>> 2) Do the tests work if you remove the target triple line? I've >>>>>>>> seen other backends don't include it. >>>>>>>> 3) Move the CHECK lines after the function prototype like other >>>>>>>> backends do. >>>>>>>> 4) In every CHECK line, can you remove the tabs between the instr >>>>>>>> mnemonic and the first operand and add a single space? (I'm unsure about >>>>>>>> this because i dont know if CHECK eats spaces). Also for the future, the >>>>>>>> llvm coding standards says to config your editor to replace tabs with >>>>>>>> spaces, so it's a good moment time to do it. >>>>>>>> 5) Oh and the most important one, please add this in only one file, >>>>>>>> add.ll or something like that, so we can keep this convention in the >>>>>>>> future, otherwise we'll end having too many test files. >>>>>>>> >>>>>>>> Something that should be covered is, when doing 16 bit additions we >>>>>>>> can use adiw or add depending on the imm value, can you cover this aswell? >>>>>>>> >>>>>>>> >>>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>>> nbj...@gm...> wrote: >>>>>>>>> >>>>>>>>>> Hi, >>>>>>>>>> >>>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>>> >>>>>>>>>> How should I test/simulate the assembler? I get errors when >>>>>>>>>> trying to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>>> different assembler? >>>>>>>>>> >>>>>>>>>> avr-llvm produces GNU assembler syntax, which is different then >>>>>>>>> the Atmel assembler syntax. >>>>>>>>> >>>>>>>>> Eventually we could support multiple asm syntax's like the X86 >>>>>>>>> target does. >>>>>>>>> >>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-04 18:17:48
|
Nevermind, got it. 2012/5/4 Borja Ferrer <bor...@gm...> > Thanks! > > One thing, i dont have llvm-lit in that dir, am I supposed to build llvm > with an addtional param or something in order to get it? > > > 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> > >> Ok, I've committed now. To only run the AVR specific tests run something >> like: >> >> ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ >> >> >> On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm...>wrote: >> >>> Oh a small one I've just noticed, leave only 1 newline between tests not >>> 2. >>> >>> >>> 2012/5/4 Borja Ferrer <bor...@gm...> >>> >>>> Ok they look great now, I don't have any other objections. Please >>>> commit this test to SVN, post your SF username here so that Eric or John >>>> can give you commit permissions. Once it gets commited I'll check if I need >>>> to add any pattern specific tests to it, these tests are corner cases of >>>> some instructions. >>>> Before commiting it, remove the testcases dir with all the files there, >>>> and create a new one called test/CodeGen/AVR, and place your file there, >>>> just to keep the same structure like in llvm's repo. >>>> >>>> About the rest of tests to do, from that list remove mul and division >>>> for now, mul isn't yet implemented and division can come later. Sub tests >>>> should be very similar to add, then add binary ops (or, and, xor). Add >>>> calling convention tests (argument passing through regs and stack, return >>>> values for each value type, calls). Memory operations, etc... >>>> >>>> There are quite a few tests to add, but for now do the sub and binary >>>> op tests and we'll discuss the others by then. >>>> >>>> >>>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>>> >>>>> Hi, >>>>> >>>>> 1) Sure >>>>> 2) Yes, I've followed the msp430 backend that does include it. I've >>>>> removed it now. >>>>> 3) Again, I've moved the CHECK lines, but it differs from backend to >>>>> backend. >>>>> 4) Done >>>>> 5) Done >>>>> 6) Done >>>>> >>>>> I will continue working other tests, which do we need? Something >>>>> like(and please add/comment): >>>>> >>>>> -Sub >>>>> -division(Only working for multiples of 2?) >>>>> -mult >>>>> -Return argument(In a few variants) >>>>> -and >>>>> -or >>>>> -xor >>>>> -increment >>>>> -branching? >>>>> >>>>> Any ideas? >>>>> >>>>> Thanks, >>>>> Nicklas >>>>> >>>>> >>>>> >>>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer <bor...@gm...>wrote: >>>>> >>>>>> Obviously in the last line I meant adiw or subi/sbci pair, add for >>>>>> immediates doesn't exist for imms greater than 63 >>>>>> >>>>>> >>>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>>> >>>>>>> They look good, very nice :) >>>>>>> >>>>>>> Some small details and nitpicks: >>>>>>> >>>>>>> 1) I think it's not necessary to add the reg_reg_imm variant because >>>>>>> you covered it with the other two tests. >>>>>>> 2) Do the tests work if you remove the target triple line? I've seen >>>>>>> other backends don't include it. >>>>>>> 3) Move the CHECK lines after the function prototype like other >>>>>>> backends do. >>>>>>> 4) In every CHECK line, can you remove the tabs between the instr >>>>>>> mnemonic and the first operand and add a single space? (I'm unsure about >>>>>>> this because i dont know if CHECK eats spaces). Also for the future, the >>>>>>> llvm coding standards says to config your editor to replace tabs with >>>>>>> spaces, so it's a good moment time to do it. >>>>>>> 5) Oh and the most important one, please add this in only one file, >>>>>>> add.ll or something like that, so we can keep this convention in the >>>>>>> future, otherwise we'll end having too many test files. >>>>>>> >>>>>>> Something that should be covered is, when doing 16 bit additions we >>>>>>> can use adiw or add depending on the imm value, can you cover this aswell? >>>>>>> >>>>>>> >>>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>>> >>>>>>>> >>>>>>>> >>>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>>> nbj...@gm...> wrote: >>>>>>>> >>>>>>>>> Hi, >>>>>>>>> >>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>> >>>>>>>>> How should I test/simulate the assembler? I get errors when trying >>>>>>>>> to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>> different assembler? >>>>>>>>> >>>>>>>>> avr-llvm produces GNU assembler syntax, which is different then >>>>>>>> the Atmel assembler syntax. >>>>>>>> >>>>>>>> Eventually we could support multiple asm syntax's like the X86 >>>>>>>> target does. >>>>>>>> >>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-04 17:55:13
|
Thanks! One thing, i dont have llvm-lit in that dir, am I supposed to build llvm with an addtional param or something in order to get it? 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> > Ok, I've committed now. To only run the AVR specific tests run something > like: > > ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ > > > On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm...>wrote: > >> Oh a small one I've just noticed, leave only 1 newline between tests not >> 2. >> >> >> 2012/5/4 Borja Ferrer <bor...@gm...> >> >>> Ok they look great now, I don't have any other objections. Please commit >>> this test to SVN, post your SF username here so that Eric or John can give >>> you commit permissions. Once it gets commited I'll check if I need to add >>> any pattern specific tests to it, these tests are corner cases of some >>> instructions. >>> Before commiting it, remove the testcases dir with all the files there, >>> and create a new one called test/CodeGen/AVR, and place your file there, >>> just to keep the same structure like in llvm's repo. >>> >>> About the rest of tests to do, from that list remove mul and division >>> for now, mul isn't yet implemented and division can come later. Sub tests >>> should be very similar to add, then add binary ops (or, and, xor). Add >>> calling convention tests (argument passing through regs and stack, return >>> values for each value type, calls). Memory operations, etc... >>> >>> There are quite a few tests to add, but for now do the sub and binary op >>> tests and we'll discuss the others by then. >>> >>> >>> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >>> >>>> Hi, >>>> >>>> 1) Sure >>>> 2) Yes, I've followed the msp430 backend that does include it. I've >>>> removed it now. >>>> 3) Again, I've moved the CHECK lines, but it differs from backend to >>>> backend. >>>> 4) Done >>>> 5) Done >>>> 6) Done >>>> >>>> I will continue working other tests, which do we need? Something >>>> like(and please add/comment): >>>> >>>> -Sub >>>> -division(Only working for multiples of 2?) >>>> -mult >>>> -Return argument(In a few variants) >>>> -and >>>> -or >>>> -xor >>>> -increment >>>> -branching? >>>> >>>> Any ideas? >>>> >>>> Thanks, >>>> Nicklas >>>> >>>> >>>> >>>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer <bor...@gm...>wrote: >>>> >>>>> Obviously in the last line I meant adiw or subi/sbci pair, add for >>>>> immediates doesn't exist for imms greater than 63 >>>>> >>>>> >>>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>>> >>>>>> They look good, very nice :) >>>>>> >>>>>> Some small details and nitpicks: >>>>>> >>>>>> 1) I think it's not necessary to add the reg_reg_imm variant because >>>>>> you covered it with the other two tests. >>>>>> 2) Do the tests work if you remove the target triple line? I've seen >>>>>> other backends don't include it. >>>>>> 3) Move the CHECK lines after the function prototype like other >>>>>> backends do. >>>>>> 4) In every CHECK line, can you remove the tabs between the instr >>>>>> mnemonic and the first operand and add a single space? (I'm unsure about >>>>>> this because i dont know if CHECK eats spaces). Also for the future, the >>>>>> llvm coding standards says to config your editor to replace tabs with >>>>>> spaces, so it's a good moment time to do it. >>>>>> 5) Oh and the most important one, please add this in only one file, >>>>>> add.ll or something like that, so we can keep this convention in the >>>>>> future, otherwise we'll end having too many test files. >>>>>> >>>>>> Something that should be covered is, when doing 16 bit additions we >>>>>> can use adiw or add depending on the imm value, can you cover this aswell? >>>>>> >>>>>> >>>>>> 2012/5/1 John Myers <ato...@gm...> >>>>>> >>>>>>> >>>>>>> >>>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>>> nbj...@gm...> wrote: >>>>>>> >>>>>>>> Hi, >>>>>>>> >>>>>>>> I have successfully been able to compile your testcases >>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>> >>>>>>>> How should I test/simulate the assembler? I get errors when trying >>>>>>>> to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>> different assembler? >>>>>>>> >>>>>>>> avr-llvm produces GNU assembler syntax, which is different then the >>>>>>> Atmel assembler syntax. >>>>>>> >>>>>>> Eventually we could support multiple asm syntax's like the X86 >>>>>>> target does. >>>>>>> >>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-05-04 13:50:12
|
Ok, I've committed now. To only run the AVR specific tests run something like: ./build/Debug+Asserts/bin/llvm-lit llvm/test/CodeGen/AVR/ On Fri, May 4, 2012 at 1:47 PM, Borja Ferrer <bor...@gm...> wrote: > Oh a small one I've just noticed, leave only 1 newline between tests not 2. > > > 2012/5/4 Borja Ferrer <bor...@gm...> > >> Ok they look great now, I don't have any other objections. Please commit >> this test to SVN, post your SF username here so that Eric or John can give >> you commit permissions. Once it gets commited I'll check if I need to add >> any pattern specific tests to it, these tests are corner cases of some >> instructions. >> Before commiting it, remove the testcases dir with all the files there, >> and create a new one called test/CodeGen/AVR, and place your file there, >> just to keep the same structure like in llvm's repo. >> >> About the rest of tests to do, from that list remove mul and division for >> now, mul isn't yet implemented and division can come later. Sub tests >> should be very similar to add, then add binary ops (or, and, xor). Add >> calling convention tests (argument passing through regs and stack, return >> values for each value type, calls). Memory operations, etc... >> >> There are quite a few tests to add, but for now do the sub and binary op >> tests and we'll discuss the others by then. >> >> >> 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> >> >>> Hi, >>> >>> 1) Sure >>> 2) Yes, I've followed the msp430 backend that does include it. I've >>> removed it now. >>> 3) Again, I've moved the CHECK lines, but it differs from backend to >>> backend. >>> 4) Done >>> 5) Done >>> 6) Done >>> >>> I will continue working other tests, which do we need? Something >>> like(and please add/comment): >>> >>> -Sub >>> -division(Only working for multiples of 2?) >>> -mult >>> -Return argument(In a few variants) >>> -and >>> -or >>> -xor >>> -increment >>> -branching? >>> >>> Any ideas? >>> >>> Thanks, >>> Nicklas >>> >>> >>> >>> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer <bor...@gm...>wrote: >>> >>>> Obviously in the last line I meant adiw or subi/sbci pair, add for >>>> immediates doesn't exist for imms greater than 63 >>>> >>>> >>>> 2012/5/2 Borja Ferrer <bor...@gm...> >>>> >>>>> They look good, very nice :) >>>>> >>>>> Some small details and nitpicks: >>>>> >>>>> 1) I think it's not necessary to add the reg_reg_imm variant because >>>>> you covered it with the other two tests. >>>>> 2) Do the tests work if you remove the target triple line? I've seen >>>>> other backends don't include it. >>>>> 3) Move the CHECK lines after the function prototype like other >>>>> backends do. >>>>> 4) In every CHECK line, can you remove the tabs between the instr >>>>> mnemonic and the first operand and add a single space? (I'm unsure about >>>>> this because i dont know if CHECK eats spaces). Also for the future, the >>>>> llvm coding standards says to config your editor to replace tabs with >>>>> spaces, so it's a good moment time to do it. >>>>> 5) Oh and the most important one, please add this in only one file, >>>>> add.ll or something like that, so we can keep this convention in the >>>>> future, otherwise we'll end having too many test files. >>>>> >>>>> Something that should be covered is, when doing 16 bit additions we >>>>> can use adiw or add depending on the imm value, can you cover this aswell? >>>>> >>>>> >>>>> 2012/5/1 John Myers <ato...@gm...> >>>>> >>>>>> >>>>>> >>>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>>> nbj...@gm...> wrote: >>>>>> >>>>>>> Hi, >>>>>>> >>>>>>> I have successfully been able to compile your testcases >>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>> >>>>>>> How should I test/simulate the assembler? I get errors when trying >>>>>>> to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>> different assembler? >>>>>>> >>>>>>> avr-llvm produces GNU assembler syntax, which is different then the >>>>>> Atmel assembler syntax. >>>>>> >>>>>> Eventually we could support multiple asm syntax's like the X86 target >>>>>> does. >>>>>> >>>>> >>>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-04 11:47:41
|
Oh a small one I've just noticed, leave only 1 newline between tests not 2. 2012/5/4 Borja Ferrer <bor...@gm...> > Ok they look great now, I don't have any other objections. Please commit > this test to SVN, post your SF username here so that Eric or John can give > you commit permissions. Once it gets commited I'll check if I need to add > any pattern specific tests to it, these tests are corner cases of some > instructions. > Before commiting it, remove the testcases dir with all the files there, > and create a new one called test/CodeGen/AVR, and place your file there, > just to keep the same structure like in llvm's repo. > > About the rest of tests to do, from that list remove mul and division for > now, mul isn't yet implemented and division can come later. Sub tests > should be very similar to add, then add binary ops (or, and, xor). Add > calling convention tests (argument passing through regs and stack, return > values for each value type, calls). Memory operations, etc... > > There are quite a few tests to add, but for now do the sub and binary op > tests and we'll discuss the others by then. > > > 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> > >> Hi, >> >> 1) Sure >> 2) Yes, I've followed the msp430 backend that does include it. I've >> removed it now. >> 3) Again, I've moved the CHECK lines, but it differs from backend to >> backend. >> 4) Done >> 5) Done >> 6) Done >> >> I will continue working other tests, which do we need? Something like(and >> please add/comment): >> >> -Sub >> -division(Only working for multiples of 2?) >> -mult >> -Return argument(In a few variants) >> -and >> -or >> -xor >> -increment >> -branching? >> >> Any ideas? >> >> Thanks, >> Nicklas >> >> >> >> On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer <bor...@gm...>wrote: >> >>> Obviously in the last line I meant adiw or subi/sbci pair, add for >>> immediates doesn't exist for imms greater than 63 >>> >>> >>> 2012/5/2 Borja Ferrer <bor...@gm...> >>> >>>> They look good, very nice :) >>>> >>>> Some small details and nitpicks: >>>> >>>> 1) I think it's not necessary to add the reg_reg_imm variant because >>>> you covered it with the other two tests. >>>> 2) Do the tests work if you remove the target triple line? I've seen >>>> other backends don't include it. >>>> 3) Move the CHECK lines after the function prototype like other >>>> backends do. >>>> 4) In every CHECK line, can you remove the tabs between the instr >>>> mnemonic and the first operand and add a single space? (I'm unsure about >>>> this because i dont know if CHECK eats spaces). Also for the future, the >>>> llvm coding standards says to config your editor to replace tabs with >>>> spaces, so it's a good moment time to do it. >>>> 5) Oh and the most important one, please add this in only one file, >>>> add.ll or something like that, so we can keep this convention in the >>>> future, otherwise we'll end having too many test files. >>>> >>>> Something that should be covered is, when doing 16 bit additions we can >>>> use adiw or add depending on the imm value, can you cover this aswell? >>>> >>>> >>>> 2012/5/1 John Myers <ato...@gm...> >>>> >>>>> >>>>> >>>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen < >>>>> nbj...@gm...> wrote: >>>>> >>>>>> Hi, >>>>>> >>>>>> I have successfully been able to compile your testcases >>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>> >>>>>> How should I test/simulate the assembler? I get errors when trying to >>>>>> simulate the generated assembler in AVRStudio. Perhaps they use a different >>>>>> assembler? >>>>>> >>>>>> avr-llvm produces GNU assembler syntax, which is different then the >>>>> Atmel assembler syntax. >>>>> >>>>> Eventually we could support multiple asm syntax's like the X86 target >>>>> does. >>>>> >>>> >>>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-04 11:45:43
|
Ok they look great now, I don't have any other objections. Please commit this test to SVN, post your SF username here so that Eric or John can give you commit permissions. Once it gets commited I'll check if I need to add any pattern specific tests to it, these tests are corner cases of some instructions. Before commiting it, remove the testcases dir with all the files there, and create a new one called test/CodeGen/AVR, and place your file there, just to keep the same structure like in llvm's repo. About the rest of tests to do, from that list remove mul and division for now, mul isn't yet implemented and division can come later. Sub tests should be very similar to add, then add binary ops (or, and, xor). Add calling convention tests (argument passing through regs and stack, return values for each value type, calls). Memory operations, etc... There are quite a few tests to add, but for now do the sub and binary op tests and we'll discuss the others by then. 2012/5/4 Nicklas Bo Jensen <nbj...@gm...> > Hi, > > 1) Sure > 2) Yes, I've followed the msp430 backend that does include it. I've > removed it now. > 3) Again, I've moved the CHECK lines, but it differs from backend to > backend. > 4) Done > 5) Done > 6) Done > > I will continue working other tests, which do we need? Something like(and > please add/comment): > > -Sub > -division(Only working for multiples of 2?) > -mult > -Return argument(In a few variants) > -and > -or > -xor > -increment > -branching? > > Any ideas? > > Thanks, > Nicklas > > > > On Wed, May 2, 2012 at 12:29 AM, Borja Ferrer <bor...@gm...>wrote: > >> Obviously in the last line I meant adiw or subi/sbci pair, add for >> immediates doesn't exist for imms greater than 63 >> >> >> 2012/5/2 Borja Ferrer <bor...@gm...> >> >>> They look good, very nice :) >>> >>> Some small details and nitpicks: >>> >>> 1) I think it's not necessary to add the reg_reg_imm variant because you >>> covered it with the other two tests. >>> 2) Do the tests work if you remove the target triple line? I've seen >>> other backends don't include it. >>> 3) Move the CHECK lines after the function prototype like other backends >>> do. >>> 4) In every CHECK line, can you remove the tabs between the instr >>> mnemonic and the first operand and add a single space? (I'm unsure about >>> this because i dont know if CHECK eats spaces). Also for the future, the >>> llvm coding standards says to config your editor to replace tabs with >>> spaces, so it's a good moment time to do it. >>> 5) Oh and the most important one, please add this in only one file, >>> add.ll or something like that, so we can keep this convention in the >>> future, otherwise we'll end having too many test files. >>> >>> Something that should be covered is, when doing 16 bit additions we can >>> use adiw or add depending on the imm value, can you cover this aswell? >>> >>> >>> 2012/5/1 John Myers <ato...@gm...> >>> >>>> >>>> >>>> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen <nbj...@gm... >>>> > wrote: >>>> >>>>> Hi, >>>>> >>>>> I have successfully been able to compile your testcases >>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>> >>>>> How should I test/simulate the assembler? I get errors when trying to >>>>> simulate the generated assembler in AVRStudio. Perhaps they use a different >>>>> assembler? >>>>> >>>>> avr-llvm produces GNU assembler syntax, which is different then the >>>> Atmel assembler syntax. >>>> >>>> Eventually we could support multiple asm syntax's like the X86 target >>>> does. >>>> >>> >>> >> > |
From: Borja F. <bor...@gm...> - 2012-05-01 22:29:33
|
Obviously in the last line I meant adiw or subi/sbci pair, add for immediates doesn't exist for imms greater than 63 2012/5/2 Borja Ferrer <bor...@gm...> > They look good, very nice :) > > Some small details and nitpicks: > > 1) I think it's not necessary to add the reg_reg_imm variant because you > covered it with the other two tests. > 2) Do the tests work if you remove the target triple line? I've seen other > backends don't include it. > 3) Move the CHECK lines after the function prototype like other backends > do. > 4) In every CHECK line, can you remove the tabs between the instr mnemonic > and the first operand and add a single space? (I'm unsure about this > because i dont know if CHECK eats spaces). Also for the future, the llvm > coding standards says to config your editor to replace tabs with spaces, so > it's a good moment time to do it. > 5) Oh and the most important one, please add this in only one file, add.ll > or something like that, so we can keep this convention in the future, > otherwise we'll end having too many test files. > > Something that should be covered is, when doing 16 bit additions we can > use adiw or add depending on the imm value, can you cover this aswell? > > > 2012/5/1 John Myers <ato...@gm...> > >> >> >> On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen <nbj...@gm...>wrote: >> >>> Hi, >>> >>> I have successfully been able to compile your testcases >>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>> >>> How should I test/simulate the assembler? I get errors when trying to >>> simulate the generated assembler in AVRStudio. Perhaps they use a different >>> assembler? >>> >>> avr-llvm produces GNU assembler syntax, which is different then the >> Atmel assembler syntax. >> >> Eventually we could support multiple asm syntax's like the X86 target >> does. >> > > |
From: Borja F. <bor...@gm...> - 2012-05-01 22:10:19
|
They look good, very nice :) Some small details and nitpicks: 1) I think it's not necessary to add the reg_reg_imm variant because you covered it with the other two tests. 2) Do the tests work if you remove the target triple line? I've seen other backends don't include it. 3) Move the CHECK lines after the function prototype like other backends do. 4) In every CHECK line, can you remove the tabs between the instr mnemonic and the first operand and add a single space? (I'm unsure about this because i dont know if CHECK eats spaces). Also for the future, the llvm coding standards says to config your editor to replace tabs with spaces, so it's a good moment time to do it. 5) Oh and the most important one, please add this in only one file, add.ll or something like that, so we can keep this convention in the future, otherwise we'll end having too many test files. Something that should be covered is, when doing 16 bit additions we can use adiw or add depending on the imm value, can you cover this aswell? 2012/5/1 John Myers <ato...@gm...> > > > On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen <nbj...@gm...>wrote: > >> Hi, >> >> I have successfully been able to compile your testcases >> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >> >> How should I test/simulate the assembler? I get errors when trying to >> simulate the generated assembler in AVRStudio. Perhaps they use a different >> assembler? >> >> avr-llvm produces GNU assembler syntax, which is different then the Atmel > assembler syntax. > > Eventually we could support multiple asm syntax's like the X86 target does. > |
From: John M. <ato...@gm...> - 2012-05-01 04:17:55
|
On Sun, Apr 29, 2012 at 10:46 AM, Nicklas Bo Jensen <nbj...@gm...>wrote: > Hi, > > I have successfully been able to compile your testcases > (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. > > How should I test/simulate the assembler? I get errors when trying to > simulate the generated assembler in AVRStudio. Perhaps they use a different > assembler? > > avr-llvm produces GNU assembler syntax, which is different then the Atmel assembler syntax. Eventually we could support multiple asm syntax's like the X86 target does. |
From: Borja F. <bor...@gm...> - 2012-04-30 21:16:21
|
Oh congrats with your new role at Atmel Eric, hope to see you around a bit more when you get some spare time and get a fast recovery from that flu. Ahh I see Nicklas, thats the reason, try patching it with the patches in SVN (under the clang dir), it's important because there we add suport for interrupts and PROGMEM syntax. But concerning this test case, the frontend needs the datalyout of the AVR arch. Basically with that we define the sizes of ints, longs, floats etc. Since you didn't do that clang is defaulting the size of ints to 32bit data. Another thing I've been thinking about the test, since we're testing codegen stuff, this means llvm asm -> avr asm and not C code -> avr asm, at the end the test would be something like: 1. define i8 @add8(i8 %a, i8 %b) { 2. %result = add i8 %a, %b 3. ret i8 %result 4. } So we ignore all the alloca and load and store stuff that is generated by clang and just concentrate on what we are interested, the add instruction. It's nice to use clang to convert C code to llvm asm, but then it has to be cleaned and leave only the things we are interested in. 2012/4/30 Nicklas Bo Jensen <nbj...@gm...> > No, im using a completely standard version of clang. > > > On Mon, Apr 30, 2012 at 9:01 PM, Borja Ferrer <bor...@gm...>wrote: > >> Nice to see you around Eric :) >> >> Indeed, things are getting zero extended and then truncated back, there >> are two things going on here. First is that I'm getting things converted to >> i16 instead of i32, did you patch clang? I'll have to check if the target >> patch stuff of clang is right. Second is that I dont have the zeroext >> attribute and that's my fault because it's a patch for clang that I haven't >> commited. >> >> The type promotion is something in the C standard and because sizeof(int) >> is bigger than a register things get a bit nasty, but it's valid code. >> >> >> 2012/4/30 Nicklas Bo Jensen <nbj...@gm...> >> >>> I'm using clang. >>> >>> define zeroext i8 @add() nounwind uwtable { >>> %a = alloca i8, align 1 >>> %b = alloca i8, align 1 >>> store i8 5, i8* %a, align 1 >>> store i8 7, i8* %b, align 1 >>> %1 = load i8* %a, align 1 >>> %2 = zext i8 %1 to i32 >>> %3 = load i8* %b, align 1 >>> %4 = zext i8 %3 to i32 >>> %5 = add nsw i32 %2, %4 >>> %6 = trunc i32 %5 to i8 >>> ret i8 %6 >>> } >>> >>> On Mon, Apr 30, 2012 at 8:22 PM, Borja Ferrer <bor...@gm...>wrote: >>> >>>> I see what's going here, our version is doing a 16bit addition and then >>>> truncating it back to 8bits. Are you using clang or dragonegg for the >>>> frontend? And can you post the llvm asm? >>>> Also, no need to test imm+imm, only reg+imm and reg+reg will do, the >>>> other will be constant folded. >>>> >>>> Ah, you'll need svn commit access, John or Eric could you do it? >>>> >>>> >>>> 2012/4/30 Nicklas Bo Jensen <nbj...@gm...> >>>> >>>>> On Mon, Apr 30, 2012 at 12:33 AM, Borja Ferrer <bor...@gm...> >>>>> wrote: >>>>> >>>>>> It should be similar to what other backends do, in this case we >>>>>> should test adding with 2 regs and then with immediates values, and repeat >>>>>> this for each value type (i8, i16, i32 and i64). Checking the instruction >>>>>> itself is enough, no need to check for registers aswell, that will come in >>>>>> other tests. But when testing with imm values we should check that the imm >>>>>> value is correctly generated, so in this case ignore the reg, but check >>>>>> that the imm field is valid. >>>>>> >>>>> >>>>> Ok, makes sense. I will work on creating the tests. >>>>> >>>>> >>>>>> And what do you mean in that you get different code between gcc and >>>>>> llvm? >>>>> >>>>> >>>>> Basically if I compile: >>>>> >>>>> unsigned char add() >>>>> { >>>>> unsigned char a,b; >>>>> a = 5; >>>>> b = 7; >>>>> return a+b; >>>>> } >>>>> >>>>> >>>>> with avr-gcc part of the resulting assembler is: >>>>> ldi r24,lo8(5) >>>>> std Y+1,r24 >>>>> ldi r24,lo8(7) >>>>> std Y+2,r24 >>>>> ldd r25,Y+1 >>>>> ldd r24,Y+2 >>>>> add r24,r25 >>>>> >>>>> with clang+avr-llvm part of the resulting assembler is: >>>>> ldi r24, 5 >>>>> std Y+2, r24 >>>>> ldi r24, 7 >>>>> std Y+1, r24 >>>>> ldd r24, Y+2 >>>>> adiw r25:r24, 7 >>>>> andi r24, 255 >>>>> andi r25, 0 >>>>> >>>>> So they use different approaches(add and adiw) to solve the same >>>>> problem. >>>>> >>>>> Thanks >>>>> Nicklas >>>>> >>>>> 2012/4/29 Nicklas Bo Jensen <nbj...@gm...> >>>>>> >>>>>>> Sure. Just wanted to actually compile the code before writing tests. >>>>>>> >>>>>>> Got how the test framework works and added a very small test that is >>>>>>> working perfectly. >>>>>>> >>>>>>> How detailed should the test be? Should it check the generated >>>>>>> assembly fully or just the main parts, e.g. the addition itself? For an >>>>>>> addition the avr-llvm version is quite different from the avr-gcc version. >>>>>>> >>>>>>> Thanks, >>>>>>> Nicklas >>>>>>> >>>>>>> >>>>>>> >>>>>>> On Sun, Apr 29, 2012 at 8:07 PM, Borja Ferrer <bor...@gm... >>>>>>> > wrote: >>>>>>> >>>>>>>> The problem here is that I've represented register pairs as r29:r28 >>>>>>>> while the assembler only wants the low register of the pair, that's why >>>>>>>> you're getting that error but you're doing it right. >>>>>>>> >>>>>>>> But the way of writing regression tests in llvm is different to >>>>>>>> what you're doing. Those tests in SVN are going away once we start writing >>>>>>>> the new ones. >>>>>>>> >>>>>>>> Read this: http://llvm.org/docs/TestingGuide.html >>>>>>>> and then go to >>>>>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ and >>>>>>>> choose any target you wish (say msp430 since it's the most similar one to >>>>>>>> us) to see how real tests look like. >>>>>>>> >>>>>>>> Basically, you have to write a test in llvm assembly, and then with >>>>>>>> CHECK you write the avr assembly that should be emitted, if it matches then >>>>>>>> the test passes otherwise it fails. You can avoid writing the llvm assembly >>>>>>>> by writing the test in C and then translate it to llvm assembly with clang. >>>>>>>> >>>>>>>> Try writing a small test for add using the llvm testing >>>>>>>> infrastructure and then run it with llvm to see if it passes. >>>>>>>> It's very important that you write the expected output assembly >>>>>>>> right, otherwise we'll generate wrong code to make the test pass, but since >>>>>>>> tests are quite small it's easy to get it right. >>>>>>>> >>>>>>>> >>>>>>>> 2012/4/29 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>> >>>>>>>>> Hi, >>>>>>>>> >>>>>>>>> I have successfully been able to compile your testcases >>>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>>> >>>>>>>>> How should I test/simulate the assembler? I get errors when trying >>>>>>>>> to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>>> different assembler? >>>>>>>>> >>>>>>>>> For one test, add1.ll I cannot process it using avr-as. I have >>>>>>>>> done: >>>>>>>>> >>>>>>>>> ../../build/Debug+Asserts/bin/llc --march=avr add1.ll -o add1.s >>>>>>>>> avr-as -mmcu=atmega168 add1.s >>>>>>>>> >>>>>>>>> >>>>>>>>> and get the error: >>>>>>>>> >>>>>>>>> asm.s: Assembler messages: >>>>>>>>> asm.s:12: Error: register r24, r26, r28 or r30 required >>>>>>>>> asm.s:12: Error: `,' required >>>>>>>>> asm.s:12: Error: garbage at end of line >>>>>>>>> asm.s:24: Error: register r24, r26, r28 or r30 required >>>>>>>>> asm.s:24: Error: `,' required >>>>>>>>> asm.s:24: Error: garbage at end of line >>>>>>>>> >>>>>>>>> >>>>>>>>> Am I doing something wrong? I have included the assembler. >>>>>>>>> >>>>>>>>> Thanks, >>>>>>>>> Nicklas >>>>>>>>> >>>>>>>>> On Sun, Apr 29, 2012 at 7:23 PM, Borja Ferrer < >>>>>>>>> bor...@gm...> wrote: >>>>>>>>> >>>>>>>>>> Hello Neil I'm replying you in this thread, i dont know why I >>>>>>>>>> didn't receive your mail, i had to look in SF to read it. >>>>>>>>>> >>>>>>>>>> Anyways, first try to build the backend so you can play a bit >>>>>>>>>> with it to get familiar with its code. Try compiling some C code to >>>>>>>>>> generate avr assembly. >>>>>>>>>> >>>>>>>>>> 2012/4/23 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>>> >>>>>>>>>>> Hi, >>>>>>>>>>> >>>>>>>>>>> I'll be happy to contribute, after I have fixed my issues >>>>>>>>>>> getting avr-llvm to compile in the first place. >>>>>>>>>>> >>>>>>>>>>> BR, >>>>>>>>>>> Nicklas >>>>>>>>>>> >>>>>>>>>>> On Sun, Apr 22, 2012 at 7:26 PM, Borja Ferrer < >>>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>>> >>>>>>>>>>>> I think it's time to stop adding more features until we cover >>>>>>>>>>>> what is currently implemented with regression tests. Otherwise the further >>>>>>>>>>>> we go the harder will be to cover everything up, from now on it's going to >>>>>>>>>>>> be easier to go in parallel. >>>>>>>>>>>> In the past emails I've seen people interested in helping out >>>>>>>>>>>> with this, it's a good way of starting with some development becuase it's >>>>>>>>>>>> an easy task to do and it helps to understand how llvm works, so anybody >>>>>>>>>>>> interested check in here so I know if I'm going to have any help at all or >>>>>>>>>>>> I have to do it myself. >>>>>>>>>>>> >>>>>>>>>>>> So if there's some help available we can plan in this thread >>>>>>>>>>>> what needs to get covered and how to do it, I'll wait a few days for any >>>>>>>>>>>> replies. >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>>> ------------------------------------------------------------------------------ >>>>>>>>>>>> For Developers, A Lot Can Happen In A Second. >>>>>>>>>>>> Boundary is the first to Know...and Tell You. >>>>>>>>>>>> Monitor Your Applications in Ultra-Fine Resolution. Try it FREE! >>>>>>>>>>>> http://p.sf.net/sfu/Boundary-d2dvs2 >>>>>>>>>>>> _______________________________________________ >>>>>>>>>>>> avr-llvm-devel mailing list >>>>>>>>>>>> avr...@li... >>>>>>>>>>>> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel >>>>>>>>>>>> >>>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>>> >>>>>>>>>> ------------------------------------------------------------------------------ >>>>>>>>>> Live Security Virtual Conference >>>>>>>>>> Exclusive live event will cover all the ways today's security and >>>>>>>>>> threat landscape has changed and how IT managers can respond. >>>>>>>>>> Discussions >>>>>>>>>> will include endpoint security, mobile security and the latest in >>>>>>>>>> malware >>>>>>>>>> threats. >>>>>>>>>> http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ >>>>>>>>>> >>>>>>>>>> _______________________________________________ >>>>>>>>>> avr-llvm-devel mailing list >>>>>>>>>> avr...@li... >>>>>>>>>> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel >>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Nicklas Bo J. <nbj...@gm...> - 2012-04-30 21:01:34
|
No, im using a completely standard version of clang. On Mon, Apr 30, 2012 at 9:01 PM, Borja Ferrer <bor...@gm...> wrote: > Nice to see you around Eric :) > > Indeed, things are getting zero extended and then truncated back, there > are two things going on here. First is that I'm getting things converted to > i16 instead of i32, did you patch clang? I'll have to check if the target > patch stuff of clang is right. Second is that I dont have the zeroext > attribute and that's my fault because it's a patch for clang that I haven't > commited. > > The type promotion is something in the C standard and because sizeof(int) > is bigger than a register things get a bit nasty, but it's valid code. > > > 2012/4/30 Nicklas Bo Jensen <nbj...@gm...> > >> I'm using clang. >> >> define zeroext i8 @add() nounwind uwtable { >> %a = alloca i8, align 1 >> %b = alloca i8, align 1 >> store i8 5, i8* %a, align 1 >> store i8 7, i8* %b, align 1 >> %1 = load i8* %a, align 1 >> %2 = zext i8 %1 to i32 >> %3 = load i8* %b, align 1 >> %4 = zext i8 %3 to i32 >> %5 = add nsw i32 %2, %4 >> %6 = trunc i32 %5 to i8 >> ret i8 %6 >> } >> >> On Mon, Apr 30, 2012 at 8:22 PM, Borja Ferrer <bor...@gm...>wrote: >> >>> I see what's going here, our version is doing a 16bit addition and then >>> truncating it back to 8bits. Are you using clang or dragonegg for the >>> frontend? And can you post the llvm asm? >>> Also, no need to test imm+imm, only reg+imm and reg+reg will do, the >>> other will be constant folded. >>> >>> Ah, you'll need svn commit access, John or Eric could you do it? >>> >>> >>> 2012/4/30 Nicklas Bo Jensen <nbj...@gm...> >>> >>>> On Mon, Apr 30, 2012 at 12:33 AM, Borja Ferrer <bor...@gm...> >>>> wrote: >>>> >>>>> It should be similar to what other backends do, in this case we should >>>>> test adding with 2 regs and then with immediates values, and repeat this >>>>> for each value type (i8, i16, i32 and i64). Checking the instruction itself >>>>> is enough, no need to check for registers aswell, that will come in other >>>>> tests. But when testing with imm values we should check that the imm value >>>>> is correctly generated, so in this case ignore the reg, but check that the >>>>> imm field is valid. >>>>> >>>> >>>> Ok, makes sense. I will work on creating the tests. >>>> >>>> >>>>> And what do you mean in that you get different code between gcc and >>>>> llvm? >>>> >>>> >>>> Basically if I compile: >>>> >>>> unsigned char add() >>>> { >>>> unsigned char a,b; >>>> a = 5; >>>> b = 7; >>>> return a+b; >>>> } >>>> >>>> >>>> with avr-gcc part of the resulting assembler is: >>>> ldi r24,lo8(5) >>>> std Y+1,r24 >>>> ldi r24,lo8(7) >>>> std Y+2,r24 >>>> ldd r25,Y+1 >>>> ldd r24,Y+2 >>>> add r24,r25 >>>> >>>> with clang+avr-llvm part of the resulting assembler is: >>>> ldi r24, 5 >>>> std Y+2, r24 >>>> ldi r24, 7 >>>> std Y+1, r24 >>>> ldd r24, Y+2 >>>> adiw r25:r24, 7 >>>> andi r24, 255 >>>> andi r25, 0 >>>> >>>> So they use different approaches(add and adiw) to solve the same >>>> problem. >>>> >>>> Thanks >>>> Nicklas >>>> >>>> 2012/4/29 Nicklas Bo Jensen <nbj...@gm...> >>>>> >>>>>> Sure. Just wanted to actually compile the code before writing tests. >>>>>> >>>>>> Got how the test framework works and added a very small test that is >>>>>> working perfectly. >>>>>> >>>>>> How detailed should the test be? Should it check the generated >>>>>> assembly fully or just the main parts, e.g. the addition itself? For an >>>>>> addition the avr-llvm version is quite different from the avr-gcc version. >>>>>> >>>>>> Thanks, >>>>>> Nicklas >>>>>> >>>>>> >>>>>> >>>>>> On Sun, Apr 29, 2012 at 8:07 PM, Borja Ferrer <bor...@gm...>wrote: >>>>>> >>>>>>> The problem here is that I've represented register pairs as r29:r28 >>>>>>> while the assembler only wants the low register of the pair, that's why >>>>>>> you're getting that error but you're doing it right. >>>>>>> >>>>>>> But the way of writing regression tests in llvm is different to what >>>>>>> you're doing. Those tests in SVN are going away once we start writing the >>>>>>> new ones. >>>>>>> >>>>>>> Read this: http://llvm.org/docs/TestingGuide.html >>>>>>> and then go to >>>>>>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ and >>>>>>> choose any target you wish (say msp430 since it's the most similar one to >>>>>>> us) to see how real tests look like. >>>>>>> >>>>>>> Basically, you have to write a test in llvm assembly, and then with >>>>>>> CHECK you write the avr assembly that should be emitted, if it matches then >>>>>>> the test passes otherwise it fails. You can avoid writing the llvm assembly >>>>>>> by writing the test in C and then translate it to llvm assembly with clang. >>>>>>> >>>>>>> Try writing a small test for add using the llvm testing >>>>>>> infrastructure and then run it with llvm to see if it passes. >>>>>>> It's very important that you write the expected output assembly >>>>>>> right, otherwise we'll generate wrong code to make the test pass, but since >>>>>>> tests are quite small it's easy to get it right. >>>>>>> >>>>>>> >>>>>>> 2012/4/29 Nicklas Bo Jensen <nbj...@gm...> >>>>>>> >>>>>>>> Hi, >>>>>>>> >>>>>>>> I have successfully been able to compile your testcases >>>>>>>> (/avr-llvm/testcases/*.ll) to something looking like valid avr assembler. >>>>>>>> >>>>>>>> How should I test/simulate the assembler? I get errors when trying >>>>>>>> to simulate the generated assembler in AVRStudio. Perhaps they use a >>>>>>>> different assembler? >>>>>>>> >>>>>>>> For one test, add1.ll I cannot process it using avr-as. I have done: >>>>>>>> >>>>>>>> ../../build/Debug+Asserts/bin/llc --march=avr add1.ll -o add1.s >>>>>>>> avr-as -mmcu=atmega168 add1.s >>>>>>>> >>>>>>>> >>>>>>>> and get the error: >>>>>>>> >>>>>>>> asm.s: Assembler messages: >>>>>>>> asm.s:12: Error: register r24, r26, r28 or r30 required >>>>>>>> asm.s:12: Error: `,' required >>>>>>>> asm.s:12: Error: garbage at end of line >>>>>>>> asm.s:24: Error: register r24, r26, r28 or r30 required >>>>>>>> asm.s:24: Error: `,' required >>>>>>>> asm.s:24: Error: garbage at end of line >>>>>>>> >>>>>>>> >>>>>>>> Am I doing something wrong? I have included the assembler. >>>>>>>> >>>>>>>> Thanks, >>>>>>>> Nicklas >>>>>>>> >>>>>>>> On Sun, Apr 29, 2012 at 7:23 PM, Borja Ferrer < >>>>>>>> bor...@gm...> wrote: >>>>>>>> >>>>>>>>> Hello Neil I'm replying you in this thread, i dont know why I >>>>>>>>> didn't receive your mail, i had to look in SF to read it. >>>>>>>>> >>>>>>>>> Anyways, first try to build the backend so you can play a bit with >>>>>>>>> it to get familiar with its code. Try compiling some C code to generate avr >>>>>>>>> assembly. >>>>>>>>> >>>>>>>>> 2012/4/23 Nicklas Bo Jensen <nbj...@gm...> >>>>>>>>> >>>>>>>>>> Hi, >>>>>>>>>> >>>>>>>>>> I'll be happy to contribute, after I have fixed my issues getting >>>>>>>>>> avr-llvm to compile in the first place. >>>>>>>>>> >>>>>>>>>> BR, >>>>>>>>>> Nicklas >>>>>>>>>> >>>>>>>>>> On Sun, Apr 22, 2012 at 7:26 PM, Borja Ferrer < >>>>>>>>>> bor...@gm...> wrote: >>>>>>>>>> >>>>>>>>>>> I think it's time to stop adding more features until we cover >>>>>>>>>>> what is currently implemented with regression tests. Otherwise the further >>>>>>>>>>> we go the harder will be to cover everything up, from now on it's going to >>>>>>>>>>> be easier to go in parallel. >>>>>>>>>>> In the past emails I've seen people interested in helping out >>>>>>>>>>> with this, it's a good way of starting with some development becuase it's >>>>>>>>>>> an easy task to do and it helps to understand how llvm works, so anybody >>>>>>>>>>> interested check in here so I know if I'm going to have any help at all or >>>>>>>>>>> I have to do it myself. >>>>>>>>>>> >>>>>>>>>>> So if there's some help available we can plan in this thread >>>>>>>>>>> what needs to get covered and how to do it, I'll wait a few days for any >>>>>>>>>>> replies. >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>>> ------------------------------------------------------------------------------ >>>>>>>>>>> For Developers, A Lot Can Happen In A Second. >>>>>>>>>>> Boundary is the first to Know...and Tell You. >>>>>>>>>>> Monitor Your Applications in Ultra-Fine Resolution. Try it FREE! >>>>>>>>>>> http://p.sf.net/sfu/Boundary-d2dvs2 >>>>>>>>>>> _______________________________________________ >>>>>>>>>>> avr-llvm-devel mailing list >>>>>>>>>>> avr...@li... >>>>>>>>>>> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel >>>>>>>>>>> >>>>>>>>>>> >>>>>>>>>> >>>>>>>>> >>>>>>>>> >>>>>>>>> ------------------------------------------------------------------------------ >>>>>>>>> Live Security Virtual Conference >>>>>>>>> Exclusive live event will cover all the ways today's security and >>>>>>>>> threat landscape has changed and how IT managers can respond. >>>>>>>>> Discussions >>>>>>>>> will include endpoint security, mobile security and the latest in >>>>>>>>> malware >>>>>>>>> threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ >>>>>>>>> >>>>>>>>> _______________________________________________ >>>>>>>>> avr-llvm-devel mailing list >>>>>>>>> avr...@li... >>>>>>>>> https://lists.sourceforge.net/lists/listinfo/avr-llvm-devel >>>>>>>>> >>>>>>>>> >>>>>>>> >>>>>>> >>>>>> >>>>> >>>> >>> >> > |
From: Weddington, E. <Eri...@at...> - 2012-04-30 20:57:44
|
> -----Original Message----- > From: Borja Ferrer [mailto:bor...@gm...] > Sent: Monday, April 30, 2012 1:02 PM > To: Nicklas Bo Jensen > Cc: avr...@li... > Subject: Re: [avr-llvm-devel] Regression tests > > Nice to see you around Eric :) > Gah. I'm incredibly busy. New role within Atmel, but responsible *even more* for open source stuff. ;-) Personally, though, I've had the flu for the last two weeks and I'm still not feeling all the way better. Low energy and coughing fits still. :-P Eric |