This project provide a reconfigurable asynchronous SDM router which can be configured
into a basic wormhole router or an SDM router with multiple virtual circuits in every
direction.

Features:
* 5-port router for mesh network (0 south, 1 west, 2 north, 3 east, 4 local)
* The dimension order routing (XY routing)
* Available flow control methods: wormhole, SDM, VC
* Reconfigurable number of virtual circuits, buffer size, data width
* Fully synthesizable router implementation
* SystemC testbench provided

Languages:
* Routers are written in synthesizable SystemVerilog
* Test benches are provided by SystemC

Software requirements:
* The open source Nangate 45nm cell library
* Synopsys Design Compiler (Synthesis)
* Cadence IUS -- NC Simulator (for SystemC/Verilog co-simulation)

Project Activity

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Categories

Hardware, Router

License

GNU Library or Lesser General Public License version 3.0 (LGPLv3)

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Additional Project Details

Operating Systems

BSD, Linux

Programming Language

VHDL/Verilog

Related Categories

VHDL/Verilog Hardware Platform, VHDL/Verilog Router Firmware

Registered

2012-05-25