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|
From: <ar...@us...> - 2009-04-16 16:35:38
|
Revision: 1231
http://armadeus.svn.sourceforge.net/armadeus/?rev=1231&view=rev
Author: artemys
Date: 2009-04-16 16:35:29 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
[LINUX] Add WiFi layer + supported chips in default APF27 2.6.27 Linux config
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config
Modified: trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config
===================================================================
--- trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config 2009-04-16 16:05:54 UTC (rev 1230)
+++ trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config 2009-04-16 16:35:29 UTC (rev 1231)
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.27.13
-# Thu Apr 16 17:05:53 2009
+# Thu Apr 16 18:13:44 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -395,9 +395,21 @@
#
# Wireless
#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
+CONFIG_CFG80211=m
+CONFIG_NL80211=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_MAC80211=m
+
+#
+# Rate control algorithm selection
+#
+CONFIG_MAC80211_RC_PID=y
+CONFIG_MAC80211_RC_DEFAULT_PID=y
+CONFIG_MAC80211_RC_DEFAULT="pid"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
@@ -412,7 +424,9 @@
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
@@ -595,8 +609,29 @@
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_P54_COMMON is not set
# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+CONFIG_ZD1211RW=m
+# CONFIG_ZD1211RW_DEBUG is not set
+CONFIG_RT2X00=m
+CONFIG_RT2X00_LIB=m
+CONFIG_RT2X00_LIB_USB=m
+CONFIG_RT2X00_LIB_FIRMWARE=y
+# CONFIG_RT2500USB is not set
+CONFIG_RT73USB=m
+# CONFIG_RT2X00_DEBUG is not set
#
# USB Network Adapters
@@ -1562,7 +1597,7 @@
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
-# CONFIG_CRYPTO_ECB is not set
+CONFIG_CRYPTO_ECB=m
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
@@ -1593,9 +1628,9 @@
#
# Ciphers
#
-# CONFIG_CRYPTO_AES is not set
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
@@ -1625,7 +1660,7 @@
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_T10DIF is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-16 16:06:01
|
Revision: 1230
http://armadeus.svn.sourceforge.net/armadeus/?rev=1230&view=rev
Author: artemys
Date: 2009-04-16 16:05:54 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
[LINUX] Add V4L2 + Camera + VPU in default APF27 2.6.27 Linux config
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config
Modified: trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config
===================================================================
--- trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config 2009-04-16 12:27:18 UTC (rev 1229)
+++ trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.27.13.config 2009-04-16 16:05:54 UTC (rev 1230)
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.27.13
-# Sun Mar 22 15:24:00 2009
+# Thu Apr 16 17:05:53 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -872,13 +872,106 @@
#
# Multimedia core support
#
-# CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_DEV=m
+CONFIG_VIDEO_V4L2_COMMON=m
+# CONFIG_VIDEO_ALLOW_V4L1 is not set
+CONFIG_VIDEO_V4L1_COMPAT=y
# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
+CONFIG_VIDEO_MEDIA=m
#
# Multimedia drivers
#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=m
+CONFIG_MEDIA_TUNER_CUSTOMIZE=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+CONFIG_VIDEO_V4L2=m
+CONFIG_VIDEOBUF_GEN=m
+CONFIG_VIDEOBUF_DMA_CONTIG=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+
+#
+# Encoders/decoders and other helper chips
+#
+
+#
+# Audio decoders
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TDA9875 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_OV7670 is not set
+CONFIG_VIDEO_OV96xx=m
+# CONFIG_VIDEO_TCM825X is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_AD9889 is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_V4L_USB_DRIVERS is not set
+CONFIG_SOC_CAMERA=m
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
+CONFIG_VIDEO_MX27=m
+# CONFIG_RADIO_ADAPTERS is not set
# CONFIG_DAB is not set
#
@@ -1225,7 +1318,8 @@
#
# MXC VPU(Video Processing Unit) support
#
-# CONFIG_MXC_VPU is not set
+CONFIG_MXC_VPU=y
+# CONFIG_MXC_VPU_DEBUG is not set
#
# Voltage and Current regulators
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-16 12:27:27
|
Revision: 1229
http://armadeus.svn.sourceforge.net/armadeus/?rev=1229&view=rev
Author: artemys
Date: 2009-04-16 12:27:18 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
[LINUX] Makes ppdevemu compile on 2.6.29
Modified Paths:
--------------
trunk/target/linux/modules/gpio/core.c
trunk/target/linux/modules/gpio/ppdevemu.c
Added Paths:
-----------
trunk/target/linux/modules/gpio/iomux-mx1.h
Modified: trunk/target/linux/modules/gpio/core.c
===================================================================
--- trunk/target/linux/modules/gpio/core.c 2009-04-16 12:22:24 UTC (rev 1228)
+++ trunk/target/linux/modules/gpio/core.c 2009-04-16 12:27:18 UTC (rev 1229)
@@ -39,24 +39,7 @@
#include <mach/iomux-mx1-mx2.h>
#endif
#ifdef CONFIG_ARCH_IMX /* TO BE REMOVED WHEN MX1 PLATFORM EXIST */
-#define VA_GPIO_BASE IO_ADDRESS(IMX_GPIO_BASE)
-#define MXC_DDIR(x) (0x00 + ((x) << 8))
-#define MXC_OCR1(x) (0x04 + ((x) << 8))
-#define MXC_OCR2(x) (0x08 + ((x) << 8))
-#define MXC_ICONFA1(x) (0x0c + ((x) << 8))
-#define MXC_ICONFA2(x) (0x10 + ((x) << 8))
-#define MXC_ICONFB1(x) (0x14 + ((x) << 8))
-#define MXC_ICONFB2(x) (0x18 + ((x) << 8))
-#define MXC_DR(x) (0x1c + ((x) << 8))
-#define MXC_GIUS(x) (0x20 + ((x) << 8))
-#define MXC_SSR(x) (0x24 + ((x) << 8))
-#define MXC_ICR1(x) (0x28 + ((x) << 8))
-#define MXC_ICR2(x) (0x2c + ((x) << 8))
-#define MXC_IMR(x) (0x30 + ((x) << 8))
-#define MXC_ISR(x) (0x34 + ((x) << 8))
-#define MXC_GPR(x) (0x38 + ((x) << 8))
-#define MXC_SWR(x) (0x3c + ((x) << 8))
-#define MXC_PUEN(x) (0x40 + ((x) << 8))
+#include "iomux-mx1.h"
#endif
#include "core.h" /* for ioctl defs */
Added: trunk/target/linux/modules/gpio/iomux-mx1.h
===================================================================
--- trunk/target/linux/modules/gpio/iomux-mx1.h (rev 0)
+++ trunk/target/linux/modules/gpio/iomux-mx1.h 2009-04-16 12:27:18 UTC (rev 1229)
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2006-2008 Julien Boibessot <jul...@ar...>
+ * Armadeus Project / Armadeus Systems
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#ifndef __IOMUX_MX1_H__
+#define __IOMUX_MX1_H__
+
+#define VA_GPIO_BASE IO_ADDRESS(IMX_GPIO_BASE)
+#define MXC_DDIR(x) (0x00 + ((x) << 8))
+#define MXC_OCR1(x) (0x04 + ((x) << 8))
+#define MXC_OCR2(x) (0x08 + ((x) << 8))
+#define MXC_ICONFA1(x) (0x0c + ((x) << 8))
+#define MXC_ICONFA2(x) (0x10 + ((x) << 8))
+#define MXC_ICONFB1(x) (0x14 + ((x) << 8))
+#define MXC_ICONFB2(x) (0x18 + ((x) << 8))
+#define MXC_DR(x) (0x1c + ((x) << 8))
+#define MXC_GIUS(x) (0x20 + ((x) << 8))
+#define MXC_SSR(x) (0x24 + ((x) << 8))
+#define MXC_ICR1(x) (0x28 + ((x) << 8))
+#define MXC_ICR2(x) (0x2c + ((x) << 8))
+#define MXC_IMR(x) (0x30 + ((x) << 8))
+#define MXC_ISR(x) (0x34 + ((x) << 8))
+#define MXC_GPR(x) (0x38 + ((x) << 8))
+#define MXC_SWR(x) (0x3c + ((x) << 8))
+#define MXC_PUEN(x) (0x40 + ((x) << 8))
+
+#endif /* __IOMUX_MX1_H__ */
Modified: trunk/target/linux/modules/gpio/ppdevemu.c
===================================================================
--- trunk/target/linux/modules/gpio/ppdevemu.c 2009-04-16 12:22:24 UTC (rev 1228)
+++ trunk/target/linux/modules/gpio/ppdevemu.c 2009-04-16 12:27:18 UTC (rev 1229)
@@ -1,5 +1,5 @@
/*
- * Armadeus Parallel port (ppdev) emulator
+ * Armadeus Parallel port (ppdev) emulation on APF9328 LCD port
*
* Copyright (C) 2006-2009 Julien Boibessot <jul...@ar...>
* Armadeus Project / Armadeus Systems
@@ -28,14 +28,18 @@
#include <linux/moduleparam.h>
/* Pretend we're PPDEV for IOCTL */
#include <linux/ppdev.h>
+#include <asm/io.h>
+#include <mach/hardware.h>
+#ifdef CONFIG_ARCH_IMX /* TO BE REMOVED WHEN MX1 PLATFORM EXIST */
+#include "iomux-mx1.h"
+#endif
-
extern void gpioWriteOnPort( unsigned int, unsigned int );
extern unsigned int gpioReadFromPort( unsigned int );
extern void gpioSetPortDir( unsigned int, unsigned int );
extern unsigned int gpioGetPortDir( unsigned int );
-#define DRIVER_VERSION "v0.1"
+#define DRIVER_VERSION "v0.2"
#define PPDEV_DEVICE_NAME "Armadeus_ppdev"
/* by default, we use dynamic allocation of major numbers */
@@ -79,11 +83,17 @@
*/
static void initialize_port( void )
{
+ u32 temp;
+
/* If not already done by core module */
- GIUS(PORT_D) = GIUS(PORT_D) | PORT_D_31_10_MASK; /* set only portD 31..10 */
- PUEN(PORT_D) = PUEN(PORT_D) | PORT_D_31_10_MASK;
- OCR1(PORT_D) = OCR1(PORT_D) | 0xFFFF0000;
- OCR2(PORT_D) = OCR2(PORT_D) | 0xFFFFFFFF;
+ temp = __raw_readl(VA_GPIO_BASE + MXC_GIUS(PORT_D)) | PORT_D_31_10_MASK; /* set only portD 31..10 */
+ __raw_writel(temp, VA_GPIO_BASE + MXC_GIUS(PORT_D));
+ temp = __raw_readl(VA_GPIO_BASE + MXC_PUEN(PORT_D)) | PORT_D_31_10_MASK; /* set only portD 31..10 */
+ __raw_writel(temp, VA_GPIO_BASE + MXC_PUEN(PORT_D));
+ temp = __raw_readl(VA_GPIO_BASE + MXC_OCR1(PORT_D)) | 0xFFFF0000;
+ __raw_writel(temp, VA_GPIO_BASE + MXC_OCR1(PORT_D));
+ temp = __raw_readl(VA_GPIO_BASE + MXC_OCR2(PORT_D)) | 0xFFFFFFFF;
+ __raw_writel(temp, VA_GPIO_BASE + MXC_OCR2(PORT_D));
}
/* Handles write() done on /dev/ppdevxx */
@@ -146,7 +156,7 @@
return -ERESTARTSYS;
minor = MINOR(inode->i_rdev);
- if( minor > PPDEV_MAX_MINOR ) {
+ if (minor > PPDEV_MAX_MINOR ) {
printk("Minor outside range: %d !\n", minor);
return -EFAULT;
}
@@ -162,13 +172,13 @@
/* Write ctrl infos on assigned ctrl ppdevlines how ??? */
printk("/FROB 0x%x/ ", value);
/* Get value from port and clear bits we will set */
- lShadow = gpioReadFromPort( PORT_D );
+ lShadow = gpioReadFromPort(PORT_D);
/* Control lines are on PortD[14,13,12] */
lShadow &= 0xFFFF8FFF;
/* Control are written on iMX LCD Port control in GPIO mode, ie PortD[14,13,12] */
lShadow |= ((value & 0x0F) << 12);
/* Put it on port */
- gpioWriteOnPort( PORT_D, lShadow );
+ gpioWriteOnPort(PORT_D, lShadow);
printk(" 0x%x /", lShadow);
break;
@@ -186,7 +196,7 @@
break;
/* Get value from port and clear bits we will set */
- lShadow = gpioReadFromPort( PORT_D );
+ lShadow = gpioReadFromPort(PORT_D);
if (port_mode == 4) {
lShadow &= 0xFF000FFF; //0xFFF00FFF;
/* Control (4 highest bits) are written on iMX LCD
@@ -199,7 +209,7 @@
lShadow &= 0xFF807FFF;
lShadow |= ((value & 0xFF) << 15);
}
- gpioWriteOnPort( PORT_D, lShadow );
+ gpioWriteOnPort(PORT_D, lShadow);
/*printk(" 0x%x /", lShadow); */
break;
@@ -207,9 +217,9 @@
if (port_mode == 4) {
/* Data (4 lowest bits) are read from iMX LCD port data
in GPIO mode, ie PortD[18-15] */
- value = (gpioReadFromPort( PORT_D ) >> (15+4)) & 0x0F;
+ value = (gpioReadFromPort(PORT_D) >> (15+4)) & 0x0F;
} else {
- value = (gpioReadFromPort( PORT_D ) >> 15) & 0xFF;
+ value = (gpioReadFromPort(PORT_D) >> 15) & 0xFF;
}
ret = __put_user(value, (unsigned char *)arg);
@@ -220,11 +230,11 @@
ret = __get_user(value, (unsigned char *)arg);
printk("/DIR 0x%x/ ", value);
- if (port_mode == 4)
+ if (port_mode == 4) {
PP_DDIR_MASK = 0xFF807FFF; /* 1111 1111 1111 1000 0111 1111 1111 1111 ?? */
- else
+ } else {
PP_DDIR_MASK = 0xFF807FFF; /* 1111 1111 1000 0000 0111 1111 1111 1111 */
-
+ }
/* linux/ppdev.h define PPDATADIR as "Data line direction: non-zero for input mode."
For ppdevs, the logic is reversed - bit=1 == output
This is _not_ "generic" at all, but very much hard-wired towards being able to use an HD44780 LCD on the GPIO pins
@@ -281,7 +291,7 @@
return result;
}
/* Dynamic Major allocation */
- if( ppdev_major == 0 )
+ if (ppdev_major == 0)
ppdev_major = result;
/* Initialise GPIO port access semaphore */
@@ -303,3 +313,4 @@
MODULE_AUTHOR("JB / NC");
MODULE_DESCRIPTION("Armadeus Parallel Port");
MODULE_LICENSE("GPL");
+
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-16 12:22:39
|
Revision: 1228
http://armadeus.svn.sourceforge.net/armadeus/?rev=1228&view=rev
Author: artemys
Date: 2009-04-16 12:22:24 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
[LINUX] Continues work on 2.6.29 integration. APF9328 still not compiling
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/013-armadeus-imxfb-improvements.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/014-armadeus-imxregs-add-lcd-bpix-mask.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/030-armadeus-imx_udc-add_driver_to_linux_build_system.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/040-armadeus-imxmmc-correct_some_freezes.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/072-armadeus-add_backlight_machinfo_to_imxfb_h.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/074-armadeus-tsc2102-touchscreen-add_driver_to_linux_build_system.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/078-armadeus-set_imx_fb_info-sectio-mismatch.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/094-armadeus-rtc1374-legacy.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/097-armadeus-imx-dma-improvements.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/199-armadeus-hack_kernel_to_export_some_irq_handling_functions.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/220-apf27-pengu-fec-old.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/234-apf27-armadeus-mx2_framebuffer_beta_update_for_2_6_27.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/235-apf27-pengu-make_pcm038_full_featured.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/235-apf27-pengu-pcm038-add_BSP_part_of_the_CPU_frequency_scaler.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/238-apf27-pengu-pcm038-Add_ALSA_audio_support.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/239-apf27-armadeus-alsa-remove_mc13783_from_mx27_snd_driver_compilation.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/240-apf27-armadeus-fixe-bugs-drivers_mxc_nand.c.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/256-apf27-pengu-mx27-Add_USB_resources_and_platform_devices.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/270-apf27-armadeus-imxmmc-add_sdhc1_resources_to_arch_arm_mach-mx2_device.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/271-apf27-armadeus-imxmmc-add_missing_definitions_in_dma-mx1-mx2_h.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/273-apf27-armadeus-imxmmc-create_arch_arm_plat-mxc_include_mach_mmc_h.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/281-apf27-armadeus-add_apf27.c.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/283-apf27-armadeus-add_dump_uart_registers_function_to_imx_serial_driver.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/286-apf27-armadeus-add_LQO57_to_mxcfb_modedb.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/287-apf27-armadeus-fix_usb_otg_int.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/288-apf27-set-ttySMX-ref-imx-uart.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/290-apf27-pengu-spi_addons.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/291-apf27-add_debug_support_with_UART1.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/292-apf27-armadeus-i2c-fix.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/293-apf27-armadeus-spi_imx-add_gpio_init_and_iMX27_support.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/295-apf27-armadeus-imxfb-modify_imxfb_device_name_for_freescale_driver.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/296-apf27-armadeus-imx27-usb-host1.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/305-apf27-armadeus-separates_imx_and_mx2_alsa_build.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/311-apf27-armadeus-mx27-add_pm_infra.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/314-apf27-armadeus-ad9889.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/315-apf27-darius-mxc-watchdog.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/318-apf27-pengu-mxc_add_vpu_driver.patch
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config
trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.29.config
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/221-apf27-armadeus-fec-old_fixes.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/272-apf27-armadeus-mxcmmc-add_sdhc2_pins_in_iomux-mx1-mx2_h.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/291-apf27-armadeus-add_mach_board-apf27_h.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/319-apf27-armadeus-ov96xx_sensors_driver.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/320-apf27-armadeus-increase_max_dma_zone_size.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/321-apf27-armadeus-mx2_adds_pwm_ressources.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/322-apf27-armadeus-add_mach_fpga_h.patch
Removed Paths:
-------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/030-mike_lee-original_imx_udc.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.29/031-armadeus-updates_imx-udc_driver_for_new_kernels.patch
Added: trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config
===================================================================
--- trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config (rev 0)
+++ trunk/buildroot/target/device/armadeus/apf27/apf27-linux-2.6.29.config 2009-04-16 12:22:24 UTC (rev 1228)
@@ -0,0 +1,1638 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29
+# Thu Apr 2 09:35:46 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+CONFIG_MARKERS=y
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+CONFIG_ARCH_MXC=y
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+
+#
+# Freescale MXC Implementations
+#
+# CONFIG_ARCH_MX1 is not set
+CONFIG_ARCH_MX2=y
+# CONFIG_ARCH_MX3 is not set
+
+#
+# MX2 family CPU support
+#
+CONFIG_MACH_MX27=y
+
+#
+# MX2 Platforms
+#
+CONFIG_MACH_APF27=y
+# CONFIG_MACH_MX27ADS is not set
+# CONFIG_MACH_PCM038 is not set
+# CONFIG_MXC_IRQ_PRIOR is not set
+CONFIG_MXC_ULPI=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_CPU_FREQ_IMX27 is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_VERBOSE=y
+CONFIG_CAN_PM_TRACE=y
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+# CONFIG_USE_APF27DEV_IMX_LED_FOR_PM is not set
+# CONFIG_USE_APF27DEV_IMX_SWITCH_FOR_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_MXC=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_FEC_OLD=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_TSC2102=m
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MXC=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_IMX is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_IMX=y
+CONFIG_SPI_MXC_SELECT1=y
+CONFIG_SPI_MXC_SELECT2=y
+# CONFIG_SPI_MXC_SELECT3 is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_SPI_TSC2102=m
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=m
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_IMX_WDT=m
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+CONFIG_FB_IMX_SHARP_LQ043_TFT=y
+# CONFIG_FB_IMX_MICROTIPS_MTF_T035_TFT is not set
+# CONFIG_FB_IMX_SHARP_LQ057_TFT is not set
+# CONFIG_FB_IMX_OPTREX_F51900_CSTN is not set
+# CONFIG_FB_IMX_MOTOROLA_A910_TFT is not set
+CONFIG_FB_MXC=y
+
+#
+# MXC framebuffer options
+#
+CONFIG_FB_MXC_SYNC_PANEL=y
+# CONFIG_FB_MXC_OVERLAY is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=m
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=m
+CONFIG_BACKLIGHT_GENERIC=m
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+CONFIG_LOGO_ARMADEUS_CLUT224=y
+CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_IMX2_PCM=m
+CONFIG_SND_IMX_TSC2102=m
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_SOC is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+CONFIG_USB_EHCI_MXC=y
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=y
+CONFIG_USB_PRINTER=y
+CONFIG_USB_WDM=y
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+
+#
+# Armadeus specific drivers
+#
+CONFIG_ARMADEUS_DRIVERS=y
+
+#
+# Misc.
+#
+# CONFIG_ARMADEUS_GENERIC_DRIVER is not set
+# CONFIG_ARMADEUS_GPIO_DRIVER is not set
+# CONFIG_ARMADEUS_KEYPAD_DRIVER is not set
+CONFIG_ARMADEUS_MAX1027=m
+
+#
+# FPGA related
+#
+
+#
+# FPGA Drivers
+#
+CONFIG_ARMADEUS_FPGA_DRIVERS=y
+
+#
+# Drivers for configuring and testing the FPGA
+#
+CONFIG_ARMADEUS_FPGA_LOADER_DRIVER=m
+
+#
+# Others drivers for the FPGA
+#
+# CONFIG_ARMADEUS_I2C_OCORE_IRQMNG is not set
+# CONFIG_ARMADEUS_PS2KBD_DRIVER is not set
+# CONFIG_ARMADEUS_WISHBONE_EXAMPLE_DRIVERS is not set
+# CONFIG_POD_DRIVERS is not set
+
+#
+# Handheld related
+#
+# CONFIG_ARMADEUS_PWM_DRIVER is not set
+CONFIG_IMX_BACKLIGHT=m
+
+#
+# Communication bus related
+#
+# CONFIG_ARMADEUS_ISP1761 is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_MXC=y
+# CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+CONFIG_RTC_DRV_DS1374=y
+# CONFIG_RTC_DRV_DS1374_LEGACY is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+
+#
+# MXC support drivers
+#
+
+#
+# MXC VPU(Video Processing Unit) support
+#
+# CONFIG_MXC_VPU is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
Added: trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.29.config
===================================================================
--- trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.29.config (rev 0)
+++ trunk/buildroot/target/device/armadeus/apf9328/apf9328-linux-2.6.29.config 2009-04-16 12:22:24 UTC (rev 1228)
@@ -0,0 +1,1620 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29
+# Tue Apr 14 20:57:39 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+CONFIG_ARCH_IMX=y
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+
+#
+# IMX Implementations
+#
+# CONFIG_ARCH_MX1ADS is not set
+CONFIG_MACH_APF9328=y
+# CONFIG_IMX_APF9328_FLASH_8MB is not set
+CONFIG_IMX_APF9328_FLASH_16MB=y
+CONFIG_IMX_SCB9328_RAM_16MB=y
+# CONFIG_IMX_SCB9328_RAM_32MB is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM920T=y
+CONFIG_CPU_32v4T=y
+CONFIG_CPU_ABRT_EV4T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V4WT=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_BLK_DEV_RAM_SIZE=2048
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CO...
[truncated message content] |
|
From: <th...@us...> - 2009-04-16 09:31:20
|
Revision: 1227
http://armadeus.svn.sourceforge.net/armadeus/?rev=1227&view=rev
Author: thom25
Date: 2009-04-16 09:31:11 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
[LINUX] fix pwm declaration and increase USB startup delay
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-16 07:34:57 UTC (rev 1226)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-16 09:31:11 UTC (rev 1227)
@@ -5,7 +5,7 @@
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-15 11:05:40.000000000 +0200
-@@ -0,0 +1,1559 @@
+@@ -0,0 +1,1558 @@
+ /*
+ * apf27.c
+ *
@@ -882,14 +882,13 @@
+ temp |= 2 << 30;
+ writel(temp, IO_ADDRESS(OTG_BASE_ADDR) + 0x184);
+ pr_debug("PORTSC1 after: 0x%08x\n", temp);
-+
+ mdelay(10);
+
+ temp = readl(IO_ADDRESS(OTG_BASE_ADDR) + 0x140);
+ temp |= 0x02; /* reset controller */
+ writel(temp, IO_ADDRESS(OTG_BASE_ADDR) + 0x140);
+ pr_debug("reset controller: 0x%08x\n", temp);
-+ mdelay(10);
++ mdelay(50);
+
+ if (ret)
+ mxc_gpio_release_multiple(mxc_usbotg_pins,
@@ -1483,7 +1482,7 @@
+ mxc_register_device(&mxc_nand_device, &apf27_nand_board_info);
+
+#ifdef CONFIG_PWM
-+ mxc_register_device(&imx_pwm_device0, &apf27_pwm_0_data);
++ mxc_register_device(&mxc_pwm_device0, &apf27_pwm_0_data);
+#endif
+#ifdef CONFIG_WATCHDOG
+ mxc_register_device(&mxc_wdt, NULL);
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <th...@us...> - 2009-04-16 07:35:03
|
Revision: 1226
http://armadeus.svn.sourceforge.net/armadeus/?rev=1226&view=rev
Author: thom25
Date: 2009-04-16 07:34:57 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
[LINUX] cleanup (platform ressources externaly declared)
Modified Paths:
--------------
trunk/target/linux/modules/fpga/dev_tools/loader/apf27-fpga-loader.c
Modified: trunk/target/linux/modules/fpga/dev_tools/loader/apf27-fpga-loader.c
===================================================================
--- trunk/target/linux/modules/fpga/dev_tools/loader/apf27-fpga-loader.c 2009-04-16 07:32:43 UTC (rev 1225)
+++ trunk/target/linux/modules/fpga/dev_tools/loader/apf27-fpga-loader.c 2009-04-16 07:34:57 UTC (rev 1226)
@@ -25,10 +25,8 @@
#include <linux/platform_device.h>
#include "xilinx-fpga-loader.h"
+#include <mach/fpga.h>
-
-#define FPGA_BASE_ADDR CS5_BASE_ADDR
-
#define CFG_FPGA_PWR (GPIO_PORTF | 19) /* FPGA prog pin */
#define CFG_FPGA_PRG (GPIO_PORTF | 11) /* FPGA prog pin */
#define CFG_FPGA_CLK (GPIO_PORTF | 15) /* FPGA clk pin */
@@ -39,9 +37,6 @@
#define CFG_FPGA_SUSPEND (GPIO_PORTF | 10) /* FPGA done pin */
#define CFG_FPGA_RESET (GPIO_PORTF | 7) /* FPGA done pin */
-static void __iomem *fpga_addr;
-
-
/* Initialize GPIO port before download */
int apf27_fpga_pre(void)
{
@@ -66,9 +61,6 @@
gpio_set_value(CFG_FPGA_RESET,1);
gpio_set_value(CFG_FPGA_PWR, 0);
- fpga_addr = ioremap( FPGA_BASE_ADDR, 16);
- if( fpga_addr == NULL )
- return 0;
return 1;
}
@@ -126,7 +118,7 @@
int apf27_fpga_wdata( unsigned char data )
{
- __raw_writew(data, fpga_addr);
+ __raw_writew(data, ARMADEUS_FPGA_BASE_ADDR_VIRT);
return data;
}
@@ -142,7 +134,8 @@
mxc_gpio_mode (CFG_FPGA_CLK | GPIO_PF | GPIO_PUEN);
gpio_set_value(CFG_FPGA_PRG, 1);
gpio_set_value(CFG_FPGA_RESET,0);
- iounmap(fpga_addr);
+ mxc_gpio_mode (CFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+
return 1;
}
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <th...@us...> - 2009-04-16 07:32:51
|
Revision: 1225
http://armadeus.svn.sourceforge.net/armadeus/?rev=1225&view=rev
Author: thom25
Date: 2009-04-16 07:32:43 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
[LINUX] force ISR clear before enabling the interrupt
Modified Paths:
--------------
trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c
Modified: trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c
===================================================================
--- trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c 2009-04-15 11:54:45 UTC (rev 1224)
+++ trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c 2009-04-16 07:32:43 UTC (rev 1225)
@@ -160,10 +160,12 @@
/* Mask all interrupts initially */
writew(0, FPGA_IMR);
- for (irq = IRQ_FPGA(0); irq < IRQ_FPGA(NB_IT-1); irq++) {
+ for (irq = IRQ_FPGA(0); irq < IRQ_FPGA(NB_IT); irq++) {
pr_debug("IRQ %d\n", irq);
set_irq_chip_and_handler(irq, &imx_fpga_chip, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID);
+ /* clear pending interrrupts */
+ imx_fpga_ack_irq(irq);
}
set_irq_chained_handler(ARMADEUS_FPGA_IRQ, imx_fpga_demux_handler);
@@ -177,7 +179,7 @@
static void __exit ocore_irq_mng_exit(void)
{
unsigned int irq;
- for (irq = IRQ_FPGA(0); irq < IRQ_FPGA(NB_IT-1); irq++) {
+ for (irq = IRQ_FPGA(0); irq < IRQ_FPGA(NB_IT); irq++) {
set_irq_chip( irq, NULL);
set_irq_handler(irq,NULL);
set_irq_flags(irq, 0);
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-15 11:54:54
|
Revision: 1224
http://armadeus.svn.sourceforge.net/armadeus/?rev=1224&view=rev
Author: artemys
Date: 2009-04-15 11:54:45 +0000 (Wed, 15 Apr 2009)
Log Message:
-----------
[LINUX] Handling of FPGA IRQ on APF27 (part 2)
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/323-apf27-armadeus-increases_max_irq_number.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-15 11:32:11 UTC (rev 1223)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-15 11:54:45 UTC (rev 1224)
@@ -4,8 +4,8 @@
Index: linux-2.6.27.13/arch/arm/mach-mx2/apf27.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-14 16:09:10.000000000 +0200
-@@ -0,0 +1,1530 @@
++++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-15 11:05:40.000000000 +0200
+@@ -0,0 +1,1559 @@
+ /*
+ * apf27.c
+ *
@@ -1441,6 +1441,32 @@
+};
+
+
++/* FPGA */
++#ifdef CONFIG_ARMADEUS_FPGA_DRIVERS
++static int fpga_pins[] = {
++ (APF27_FPGA_INT_PIN | GPIO_IN | GPIO_GPIO),
++};
++
++static int apf27_fpga_init(void)
++{
++ int res;
++
++ res = mxc_gpio_setup_multiple(fpga_pins, ARRAY_SIZE(fpga_pins), "FPGA");
++ if (!res)
++ set_irq_type(APF27_FPGA_IRQ, IRQF_TRIGGER_RISING);
++
++ return res;
++}
++# if 0
++static int apf27_fpga_exit(void)
++{
++ mxc_gpio_release_multiple(fpga_pins, ARRAY_SIZE(fpga_pins));
++ return 0;
++}
++# endif
++#endif /* CONFIG_ARMADEUS_FPGA_DRIVERS */
++
++
+static void __init apf27_init(void)
+{
+ sysdev_class_register(&apf27_pm_sysclass);
@@ -1497,6 +1523,9 @@
+#ifdef CONFIG_VIDEO_MX27
+ mxc_register_device(&mx27_camera_device, &apf27_camera);
+#endif
++#ifdef CONFIG_ARMADEUS_FPGA_DRIVERS
++ apf27_fpga_init();
++#endif
+
+ printk("i.MX27 chip revision: %d\n", mx27_revision() );
+}
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch 2009-04-15 11:32:11 UTC (rev 1223)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch 2009-04-15 11:54:45 UTC (rev 1224)
@@ -1,8 +1,8 @@
Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h 2009-04-14 14:48:16.000000000 +0200
-@@ -0,0 +1,43 @@
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h 2009-04-15 10:52:29.000000000 +0200
+@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2008 Armadeus Systems
+ *
@@ -38,11 +38,13 @@
+/* FPGA addresses */
+#define APF27_FPGA_VIRT (CS5_BASE_ADDR_VIRT)
+#define APF27_FPGA_PHYS (CS5_BASE_ADDR)
-+#define APF27_FPGA_IRQ (IRQ_GPIOF(12))
-+
+#define ARMADEUS_FPGA_BASE_ADDR_VIRT (APF27_FPGA_VIRT)
+#define ARMADEUS_FPGA_BASE_ADDR_PHYS (APF27_FPGA_PHYS)
-+#define ARMADEUS_FPGA_IRQ (APF27_FPGA_IRQ)
+
++/* FPGA IRQ */
++#define APF27_FPGA_INT_PIN (GPIO_PORTF | 12)
++#define APF27_FPGA_IRQ (IRQ_GPIOF(APF27_FPGA_INT_PIN))
++#define ARMADEUS_FPGA_IRQ (APF27_FPGA_IRQ)
+
++
+#endif /* __ASM_ARCH_MXC_BOARD_APF27_H__ */
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch 2009-04-15 11:32:11 UTC (rev 1223)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch 2009-04-15 11:54:45 UTC (rev 1224)
@@ -1,7 +1,7 @@
Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/fpga.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/fpga.h 2009-04-14 16:30:36.000000000 +0200
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/fpga.h 2009-04-15 10:15:43.000000000 +0200
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2009 Armadeus Systems
@@ -26,17 +26,17 @@
+
+
+#ifdef CONFIG_MACH_APF27
-+#include <mach/board-apf27.h>
++#include <mach/board-apf27.h> /* @ + IRQs are here */
+#else
+/* To complete when MX1 platform merged */
+#endif
+
+/* FPGA interrupts number */
+#ifdef CONFIG_MACH_APF27
-+#define IRQ_FPGA_START (IRQ_GPIOF(32) + 1)
++#define IRQ_FPGA_START (IRQ_GPIOF(32))
+#endif
+#define IRQ_FPGA(x) (IRQ_FPGA_START + x)
++#define NR_IRQS_FPGA (32)
+
-+
+#endif /* __ASM_ARCH_ARMADEUS_FPGA_H__ */
+
Added: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/323-apf27-armadeus-increases_max_irq_number.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/323-apf27-armadeus-increases_max_irq_number.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/323-apf27-armadeus-increases_max_irq_number.patch 2009-04-15 11:54:45 UTC (rev 1224)
@@ -0,0 +1,29 @@
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/mx27.h
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/plat-mxc/include/mach/mx27.h 2009-04-15 10:16:59.000000000 +0200
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/mx27.h 2009-04-15 10:23:26.000000000 +0200
+@@ -289,7 +289,8 @@
+ #define cpu_is_mx27() (1)
+
+ /* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */
+-#define ARCH_NR_GPIOS (192 + 16)
++#define MXC_MAX_GPIO_LINES (192)
++#define ARCH_NR_GPIOS (MXC_MAX_GPIO_LINES + 16)
+
+ /* OS clock tick rate */
+ #define CLOCK_TICK_RATE 13300000
+@@ -297,10 +298,11 @@
+ /* Start of RAM */
+ #define PHYS_OFFSET SDRAM_BASE_ADDR
+
+-/* max interrupt lines count */
+-#define NR_IRQS 256
+-
+ /* count of internal interrupt sources */
+ #define MXC_MAX_INT_LINES 64
+
++/* max interrupt lines count */
++#define MXC_MAX_VIRTUAL_INTS 64
++#define NR_IRQS (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES + MXC_MAX_VIRTUAL_INTS)
++
+ #endif /* __ASM_ARCH_MXC_MX27_H__ */
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|
|
From: <ar...@us...> - 2009-04-15 11:32:13
|
Revision: 1223
http://armadeus.svn.sourceforge.net/armadeus/?rev=1223&view=rev
Author: artemys
Date: 2009-04-15 11:32:11 +0000 (Wed, 15 Apr 2009)
Log Message:
-----------
[LINUX] Better coding style in wb_irq_mngr driver
Modified Paths:
--------------
trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c
Modified: trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c
===================================================================
--- trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c 2009-04-15 10:11:04 UTC (rev 1222)
+++ trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c 2009-04-15 11:32:11 UTC (rev 1223)
@@ -22,6 +22,8 @@
*
*/
+/*#define DEBUG*/
+
#include <linux/module.h>
#include <linux/init.h>
#include <linux/list.h>
@@ -48,17 +50,10 @@
#endif
-#if 0
-#define DEBUG_FPGA_IRQ(fmt,args...) printk(KERN_DEBUG "IRQ_MNGR: " fmt,##args)
-#else
-#define DEBUG_FPGA_IRQ(fmt...) do { } while (0)
-#endif
-
#define IRQ_MNGR_BASE (0x0)
#define ID (1)
#define ID_OFFSET (0x02 *(16/8))
-
#define NB_IT (16)
#define FPGA_IMR (ARMADEUS_FPGA_BASE_ADDR_VIRT + IRQ_MNGR_BASE + 0x00) /* Interrupt Mask Register */
@@ -77,7 +72,7 @@
int shadow;
shadow = 1 << ((irq - IRQ_FPGA_START) % NB_IT);
- DEBUG_FPGA_IRQ("%s: irq %d ack:0x%x\n", __FUNCTION__, irq, shadow);
+ pr_debug("%s: irq %d ack:0x%x\n", __FUNCTION__, irq, shadow);
writew( shadow, FPGA_ISR );
/* if last IT, ack GPIO global IRQ */
@@ -94,7 +89,7 @@
shadow = readw(FPGA_IMR);
shadow &= ~( 1 << ((irq - IRQ_FPGA_START) % NB_IT));
- DEBUG_FPGA_IRQ("%s: irq %d mask:0x%x\n", __FUNCTION__, irq, shadow);
+ pr_debug("%s: irq %d mask:0x%x\n", __FUNCTION__, irq, shadow);
writew( shadow, FPGA_IMR );
}
@@ -105,19 +100,19 @@
shadow = readw(FPGA_IMR);
shadow |= 1 << ((irq - IRQ_FPGA_START) % NB_IT);
- DEBUG_FPGA_IRQ("%s: irq %d mask:0x%x\n", __FUNCTION__, irq, shadow);
- writew( shadow, FPGA_IMR );
+ pr_debug("%s: irq %d mask:0x%x\n", __FUNCTION__, irq, shadow);
+ writew(shadow, FPGA_IMR);
}
static void
imx_fpga_handler(unsigned int mask, unsigned int irq,
struct irq_desc *desc)
{
- DEBUG_FPGA_IRQ("%s: mask:0x%x\n", __FUNCTION__, mask);
+ pr_debug("%s: mask:0x%04x\n", __FUNCTION__, mask);
desc = irq_desc + irq;
while (mask) {
if (mask & 1) {
- DEBUG_FPGA_IRQ("handling irq %d\n", irq);
+ pr_debug("handling irq %d\n", irq);
desc_handle_irq(irq, desc);
}
irq++;
@@ -149,14 +144,14 @@
{
unsigned int irq;
u16 data;
- int result=0;
+ int result = 0;
- DEBUG_FPGA_IRQ("Initializing FPGA IRQs\n");
+ pr_debug("Initializing FPGA IRQs\n");
/* check if ID is correct */
data = ioread16(ARMADEUS_FPGA_BASE_ADDR_VIRT + IRQ_MNGR_BASE + ID_OFFSET);
if (data != ID) {
- result = -1;
+ result = -ENODEV;
printk(KERN_WARNING "For irq_mngr id:%d doesn't match with id"
"read %d,\n is device present ?\n", ID, data);
goto error_id;
@@ -166,12 +161,13 @@
writew(0, FPGA_IMR);
for (irq = IRQ_FPGA(0); irq < IRQ_FPGA(NB_IT-1); irq++) {
- set_irq_chip_and_handler( irq, &imx_fpga_chip, handle_edge_irq );
+ pr_debug("IRQ %d\n", irq);
+ set_irq_chip_and_handler(irq, &imx_fpga_chip, handle_edge_irq);
set_irq_flags(irq, IRQF_VALID);
}
set_irq_chained_handler(ARMADEUS_FPGA_IRQ, imx_fpga_demux_handler);
- DEBUG_FPGA_IRQ("IRQs initialized\n");
+ pr_debug("IRQs initialized\n");
return 0;
error_id:
@@ -188,7 +184,7 @@
}
set_irq_chained_handler(ARMADEUS_FPGA_IRQ, NULL);
- DEBUG_FPGA_IRQ("%s\n", __FUNCTION__);
+ pr_debug("%s\n", __FUNCTION__);
}
module_init(ocore_irq_mng_init);
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|
|
From: <Fa...@us...> - 2009-04-15 10:11:07
|
Revision: 1222
http://armadeus.svn.sourceforge.net/armadeus/?rev=1222&view=rev
Author: FabM
Date: 2009-04-15 10:11:04 +0000 (Wed, 15 Apr 2009)
Log Message:
-----------
[BUILDROOT] Little bug in fpgaregs Makefile
Modified Paths:
--------------
trunk/target/linux/debug/fpgaregs/Makefile
Modified: trunk/target/linux/debug/fpgaregs/Makefile
===================================================================
--- trunk/target/linux/debug/fpgaregs/Makefile 2009-04-14 17:36:32 UTC (rev 1221)
+++ trunk/target/linux/debug/fpgaregs/Makefile 2009-04-15 10:11:04 UTC (rev 1222)
@@ -2,14 +2,15 @@
CC=arm-linux-gcc
endif
-all: fpgaregs
+all: fpgaregs fpga27regs
fpgaregs: fpgaregs.c fpgaregs.h
$(CC) -Wall fpgaregs.c -o $@
-fpgaregs: fpgaregs.c fpga27regs.h
+fpga27regs: fpgaregs.c fpga27regs.h
$(CC) -DIMX27 -Wall fpgaregs.c -o $@
clean:
rm -f *.o
rm -f fpgaregs
+ rm -f fpga27regs
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|
|
From: <ar...@us...> - 2009-04-14 17:36:45
|
Revision: 1221
http://armadeus.svn.sourceforge.net/armadeus/?rev=1221&view=rev
Author: artemys
Date: 2009-04-14 17:36:32 +0000 (Tue, 14 Apr 2009)
Log Message:
-----------
[LINUX] Divides patch 321 in 2
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_adds_pwm_ressources.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_pwm_fixes.patch
Removed Paths:
-------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch
Copied: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_adds_pwm_ressources.patch (from rev 1220, trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch)
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_adds_pwm_ressources.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_adds_pwm_ressources.patch 2009-04-14 17:36:32 UTC (rev 1221)
@@ -0,0 +1,44 @@
+Adds PWM ressources on MX2.
+
+Signed-off-by: Nicolas Colombain <nic...@ar...>
+Signed-off-by: Julien Boibessot <jul...@ar...>
+
+Index: linux-2.6.27.13/arch/arm/mach-mx2/devices.c
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/mach-mx2/devices.c 2009-04-12 16:10:13.000000000 +0200
++++ linux-2.6.27.13/arch/arm/mach-mx2/devices.c 2009-04-12 16:04:25.000000000 +0200
+@@ -637,6 +637,25 @@ struct platform_device mxc_ehci2 = {
+ .resource = mxc_ehci2_resources,
+ };
+
++static struct resource mxc_pwm_resources[] = {
++ [0] = {
++ .start = (PWM_BASE_ADDR),
++ .end = (PWM_BASE_ADDR + 0x14),
++ .flags = IORESOURCE_MEM,
++ },
++ [1] = {
++ .start = (MXC_INT_PWM),
++ .end = (MXC_INT_PWM),
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++struct platform_device mxc_pwm_device0 = {
++ .name = "imx-pwm",
++ .id = 0,
++ .num_resources = ARRAY_SIZE(mxc_pwm_resources),
++ .resource = mxc_pwm_resources,
++};
+
+ /* GPIO port description */
+ static struct mxc_gpio_port imx_gpio_ports[] = {
+Index: linux-2.6.27.13/arch/arm/mach-mx2/devices.h
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/mach-mx2/devices.h 2009-04-12 16:10:13.000000000 +0200
++++ linux-2.6.27.13/arch/arm/mach-mx2/devices.h 2009-04-12 16:05:02.000000000 +0200
+@@ -29,3 +29,4 @@ extern struct platform_device mxc_dam_de
+ extern struct platform_device mxc_otg;
+ extern struct platform_device mxc_ehci1;
+ extern struct platform_device mxc_ehci2;
++extern struct platform_device mxc_pwm_device0;
Added: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_pwm_fixes.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_pwm_fixes.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-mx2_pwm_fixes.patch 2009-04-14 17:36:32 UTC (rev 1221)
@@ -0,0 +1,34 @@
+Changes to have a working PWM on i.MX27:
+* adds pwm pin configuration
+* fixes pwm clock
+
+Signed-off-by: Nicolas Colombain <nic...@ar...>
+Signed-off-by: Julien Boibessot <jul...@ar...>
+
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h 2009-04-12 16:10:13.000000000 +0200
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h 2009-04-12 16:05:57.000000000 +0200
+@@ -388,6 +388,7 @@ extern void mxc_gpio_release_multiple(co
+ #define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_OUT | GPIO_PF | 2)
+ #define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3)
+ #define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 4)
++#define PE5_PF_PWM0 (GPIO_PORTE | GPIO_OUT | GPIO_PF | 5)
+ #define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6)
+ #define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 7)
+ #define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 8)
+Index: linux-2.6.27.13/arch/arm/mach-mx2/clock_imx27.c
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/mach-mx2/clock_imx27.c 2009-04-12 16:10:12.000000000 +0200
++++ linux-2.6.27.13/arch/arm/mach-mx2/clock_imx27.c 2009-04-12 16:06:29.000000000 +0200
+@@ -921,7 +921,7 @@ static struct clk pwm_clk[] = {
+ .parent = &per_clk[0],
+ .secondary = &pwm_clk[1],
+ }, {
+- .name = "pwm_clk",
++ .name = "pwm_ipg_clk",
+ .parent = &ipg_clk,
+ .enable = _clk_enable,
+ .enable_reg = CCM_PCCR0,
+
+
Deleted: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch 2009-04-14 15:03:56 UTC (rev 1220)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch 2009-04-14 17:36:32 UTC (rev 1221)
@@ -1,82 +0,0 @@
-Fix pwm clock
-Add pwm pin configuration
-Add pwm ressource
-
-Signed-off-by: Nicolas Colombain <nic...@ar...>
-Signed-off-by: Julien Boibessot <jul...@ar...>
-
-Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
-===================================================================
---- linux-2.6.27.13.orig/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h 2009-04-12 16:10:13.000000000 +0200
-+++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h 2009-04-12 16:05:57.000000000 +0200
-@@ -372,8 +372,6 @@ extern void mxc_gpio_release_multiple(co
- #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_IN | GPIO_PF | 23)
- #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_OUT | GPIO_PF | 24)
-
--
--
- #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25)
- #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26)
- #define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26)
-@@ -388,6 +386,7 @@ extern void mxc_gpio_release_multiple(co
- #define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_OUT | GPIO_PF | 2)
- #define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3)
- #define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 4)
-+#define PE5_PF_PWM0 (GPIO_PORTE | GPIO_OUT | GPIO_PF | 5)
- #define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6)
- #define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 7)
- #define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 8)
-Index: linux-2.6.27.13/arch/arm/mach-mx2/devices.c
-===================================================================
---- linux-2.6.27.13.orig/arch/arm/mach-mx2/devices.c 2009-04-12 16:10:13.000000000 +0200
-+++ linux-2.6.27.13/arch/arm/mach-mx2/devices.c 2009-04-12 16:04:25.000000000 +0200
-@@ -637,6 +637,25 @@ struct platform_device mxc_ehci2 = {
- .resource = mxc_ehci2_resources,
- };
-
-+static struct resource pwm_resources[] = {
-+ [0] = {
-+ .start = (PWM_BASE_ADDR),
-+ .end = (PWM_BASE_ADDR + 0x14),
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .start = (MXC_INT_PWM),
-+ .end = (MXC_INT_PWM),
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+struct platform_device imx_pwm_device0 = {
-+ .name = "imx-pwm", // Should be the same as the driver name
-+ .id = 0,
-+ .num_resources = ARRAY_SIZE(pwm_resources),
-+ .resource = pwm_resources,
-+};
-
- /* GPIO port description */
- static struct mxc_gpio_port imx_gpio_ports[] = {
-Index: linux-2.6.27.13/arch/arm/mach-mx2/devices.h
-===================================================================
---- linux-2.6.27.13.orig/arch/arm/mach-mx2/devices.h 2009-04-12 16:10:13.000000000 +0200
-+++ linux-2.6.27.13/arch/arm/mach-mx2/devices.h 2009-04-12 16:05:02.000000000 +0200
-@@ -29,3 +29,4 @@ extern struct platform_device mxc_dam_de
- extern struct platform_device mxc_otg;
- extern struct platform_device mxc_ehci1;
- extern struct platform_device mxc_ehci2;
-+extern struct platform_device imx_pwm_device0;
-Index: linux-2.6.27.13/arch/arm/mach-mx2/clock_imx27.c
-===================================================================
---- linux-2.6.27.13.orig/arch/arm/mach-mx2/clock_imx27.c 2009-04-12 16:10:12.000000000 +0200
-+++ linux-2.6.27.13/arch/arm/mach-mx2/clock_imx27.c 2009-04-12 16:06:29.000000000 +0200
-@@ -921,7 +921,7 @@ static struct clk pwm_clk[] = {
- .parent = &per_clk[0],
- .secondary = &pwm_clk[1],
- }, {
-- .name = "pwm_clk",
-+ .name = "pwm_ipg_clk",
- .parent = &ipg_clk,
- .enable = _clk_enable,
- .enable_reg = CCM_PCCR0,
-
-
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-14 15:03:57
|
Revision: 1220
http://armadeus.svn.sourceforge.net/armadeus/?rev=1220&view=rev
Author: artemys
Date: 2009-04-14 15:03:56 +0000 (Tue, 14 Apr 2009)
Log Message:
-----------
[LINUX] Separates content of patch 291
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch 2009-04-14 14:47:39 UTC (rev 1219)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch 2009-04-14 15:03:56 UTC (rev 1220)
@@ -1,51 +1,3 @@
-Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h
-===================================================================
---- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h 2009-04-14 14:48:16.000000000 +0200
-@@ -0,0 +1,43 @@
-+/*
-+ * Copyright (C) 2008 Armadeus Systems
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
-+ * MA 02110-1301, USA.
-+ */
-+
-+#ifndef __ASM_ARCH_MXC_BOARD_APF27_H__
-+#define __ASM_ARCH_MXC_BOARD_APF27_H__
-+
-+
-+#include <mach/iomux-mx1-mx2.h>
-+
-+/* mandatory for CONFIG_LL_DEBUG */
-+#define MXC_LL_UART_PADDR UART1_BASE_ADDR
-+#define MXC_LL_UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR)
-+
-+/* CS5 */
-+#define CS5_BASE_ADDR_VIRT 0xF4300000
-+#define CS5_SIZE SZ_1M
-+
-+/* FPGA addresses */
-+#define APF27_FPGA_VIRT (CS5_BASE_ADDR_VIRT)
-+#define APF27_FPGA_PHYS (CS5_BASE_ADDR)
-+#define APF27_FPGA_IRQ (IRQ_GPIOF(12))
-+
-+#define ARMADEUS_FPGA_BASE_ADDR_VIRT (APF27_FPGA_VIRT)
-+#define ARMADEUS_FPGA_BASE_ADDR_PHYS (APF27_FPGA_PHYS)
-+#define ARMADEUS_FPGA_IRQ (APF27_FPGA_IRQ)
-+
-+
-+#endif /* __ASM_ARCH_MXC_BOARD_APF27_H__ */
Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/debug-macro.S
===================================================================
--- linux-2.6.27.13.orig/arch/arm/plat-mxc/include/mach/debug-macro.S 2008-10-10 00:13:53.000000000 +0200
Added: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-armadeus-add_mach_board-apf27_h.patch 2009-04-14 15:03:56 UTC (rev 1220)
@@ -0,0 +1,48 @@
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h 2009-04-14 14:48:16.000000000 +0200
+@@ -0,0 +1,43 @@
++/*
++ * Copyright (C) 2008 Armadeus Systems
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
++ * MA 02110-1301, USA.
++ */
++
++#ifndef __ASM_ARCH_MXC_BOARD_APF27_H__
++#define __ASM_ARCH_MXC_BOARD_APF27_H__
++
++
++#include <mach/iomux-mx1-mx2.h>
++
++/* mandatory for CONFIG_LL_DEBUG */
++#define MXC_LL_UART_PADDR UART1_BASE_ADDR
++#define MXC_LL_UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR)
++
++/* CS5 */
++#define CS5_BASE_ADDR_VIRT 0xF4300000
++#define CS5_SIZE SZ_1M
++
++/* FPGA addresses */
++#define APF27_FPGA_VIRT (CS5_BASE_ADDR_VIRT)
++#define APF27_FPGA_PHYS (CS5_BASE_ADDR)
++#define APF27_FPGA_IRQ (IRQ_GPIOF(12))
++
++#define ARMADEUS_FPGA_BASE_ADDR_VIRT (APF27_FPGA_VIRT)
++#define ARMADEUS_FPGA_BASE_ADDR_PHYS (APF27_FPGA_PHYS)
++#define ARMADEUS_FPGA_IRQ (APF27_FPGA_IRQ)
++
++
++#endif /* __ASM_ARCH_MXC_BOARD_APF27_H__ */
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-14 14:47:40
|
Revision: 1219
http://armadeus.svn.sourceforge.net/armadeus/?rev=1219&view=rev
Author: artemys
Date: 2009-04-14 14:47:39 +0000 (Tue, 14 Apr 2009)
Log Message:
-----------
[LINUX] Makes Wishbone examples drivers works with APF27
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch
trunk/target/linux/modules/fpga/wishbone_example/wb_button/board_buttons.c
trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c
trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/test.c
trunk/target/linux/modules/fpga/wishbone_example/wb_led/board_leds.c
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-14 12:42:17 UTC (rev 1218)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-14 14:47:39 UTC (rev 1219)
@@ -4,8 +4,8 @@
Index: linux-2.6.27.13/arch/arm/mach-mx2/apf27.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-08 15:48:50.000000000 +0200
-@@ -0,0 +1,1513 @@
++++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-14 16:09:10.000000000 +0200
+@@ -0,0 +1,1530 @@
+ /*
+ * apf27.c
+ *
@@ -78,6 +78,8 @@
+#if defined(CONFIG_CPU_FREQ_IMX27) || defined(CONFIG_CPU_FREQ_IMX27_MODULE)
+#include "cpufreq_imx.h"
+#endif
++#include <mach/board-apf27.h>
++#include <asm/mach/map.h>
+#include "devices.h"
+#include "crm_regs.h"
+
@@ -1509,12 +1511,27 @@
+ .init = apf27_timer_init,
+};
+
++static struct map_desc apf27_io_desc[] __initdata = {
++ {
++ .virtual = CS5_BASE_ADDR_VIRT,
++ .pfn = __phys_to_pfn(CS5_BASE_ADDR),
++ .length = CS5_SIZE,
++ .type = MT_DEVICE,
++ },
++};
++
++void __init apf27_map_io(void)
++{
++ mxc_map_io();
++ iotable_init(apf27_io_desc, ARRAY_SIZE(apf27_io_desc));
++}
++
+MACHINE_START(APF27, "Armadeus APF27")
+ /* Maintainer: Julien Boibessot <jul...@ar...> */
+ .phys_io = AIPI_BASE_ADDR,
+ .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .boot_params = PHYS_OFFSET + 0x100,
-+ .map_io = mxc_map_io,
++ .map_io = apf27_map_io,
+ .init_irq = mxc_init_irq,
+ .init_machine = apf27_init,
+ .timer = &apf27_timer,
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch 2009-04-14 12:42:17 UTC (rev 1218)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/291-apf27-add_debug_support_with_UART1.patch 2009-04-14 14:47:39 UTC (rev 1219)
@@ -1,8 +1,10 @@
---- linux-2.6.27.2ref/arch/arm/plat-mxc/include/mach/board-apf27.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.27.2/arch/arm/plat-mxc/include/mach/board-apf27.h 2008-11-19 18:32:11.000000000 +0100
-@@ -0,0 +1,28 @@
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/board-apf27.h 2009-04-14 14:48:16.000000000 +0200
+@@ -0,0 +1,43 @@
+/*
-+ * Copyright (C) 2008 Juergen Beisert (ke...@pe...)
++ * Copyright (C) 2008 Armadeus Systems
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
@@ -22,15 +24,32 @@
+#ifndef __ASM_ARCH_MXC_BOARD_APF27_H__
+#define __ASM_ARCH_MXC_BOARD_APF27_H__
+
++
++#include <mach/iomux-mx1-mx2.h>
++
+/* mandatory for CONFIG_LL_DEBUG */
-+
+#define MXC_LL_UART_PADDR UART1_BASE_ADDR
+#define MXC_LL_UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR)
+
++/* CS5 */
++#define CS5_BASE_ADDR_VIRT 0xF4300000
++#define CS5_SIZE SZ_1M
+
-+#endif /* __ASM_ARCH_MXC_BOARD_PCM038_H__ */
---- linux-2.6.27.2ref/arch/arm/plat-mxc/include/mach/debug-macro.S 2008-10-10 00:13:53.000000000 +0200
-+++ linux-2.6.27.2/arch/arm/plat-mxc/include/mach/debug-macro.S 2008-11-19 18:27:56.000000000 +0100
++/* FPGA addresses */
++#define APF27_FPGA_VIRT (CS5_BASE_ADDR_VIRT)
++#define APF27_FPGA_PHYS (CS5_BASE_ADDR)
++#define APF27_FPGA_IRQ (IRQ_GPIOF(12))
++
++#define ARMADEUS_FPGA_BASE_ADDR_VIRT (APF27_FPGA_VIRT)
++#define ARMADEUS_FPGA_BASE_ADDR_PHYS (APF27_FPGA_PHYS)
++#define ARMADEUS_FPGA_IRQ (APF27_FPGA_IRQ)
++
++
++#endif /* __ASM_ARCH_MXC_BOARD_APF27_H__ */
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/debug-macro.S
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/plat-mxc/include/mach/debug-macro.S 2008-10-10 00:13:53.000000000 +0200
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/debug-macro.S 2009-04-14 13:56:06.000000000 +0200
@@ -28,6 +28,9 @@
#ifdef CONFIG_MACH_PCM038
#include <mach/board-pcm038.h>
Added: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/322-apf27-armadeus-add_mach_fpga_h.patch 2009-04-14 14:47:39 UTC (rev 1219)
@@ -0,0 +1,42 @@
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/fpga.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/fpga.h 2009-04-14 16:30:36.000000000 +0200
+@@ -0,0 +1,37 @@
++/*
++ * Copyright (C) 2009 Armadeus Systems
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2
++ * of the License, or (at your option) any later version.
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
++ * MA 02110-1301, USA.
++ */
++
++#ifndef __ASM_ARCH_ARMADEUS_FPGA_H__
++#define __ASM_ARCH_ARMADEUS_FPGA_H__
++
++
++#ifdef CONFIG_MACH_APF27
++#include <mach/board-apf27.h>
++#else
++/* To complete when MX1 platform merged */
++#endif
++
++/* FPGA interrupts number */
++#ifdef CONFIG_MACH_APF27
++#define IRQ_FPGA_START (IRQ_GPIOF(32) + 1)
++#endif
++#define IRQ_FPGA(x) (IRQ_FPGA_START + x)
++
++
++#endif /* __ASM_ARCH_ARMADEUS_FPGA_H__ */
++
Modified: trunk/target/linux/modules/fpga/wishbone_example/wb_button/board_buttons.c
===================================================================
--- trunk/target/linux/modules/fpga/wishbone_example/wb_button/board_buttons.c 2009-04-14 12:42:17 UTC (rev 1218)
+++ trunk/target/linux/modules/fpga/wishbone_example/wb_button/board_buttons.c 2009-04-14 14:47:39 UTC (rev 1219)
@@ -1,9 +1,8 @@
/*
- ***********************************************************************
+ * Specific button driver for generic button driver
*
* (c) Copyright 2008 Armadeus project
* Fabien Marteau <fab...@ar...>
- * Specific button driver for generic button driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,7 +17,6 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- **********************************************************************
*/
#include <linux/version.h>
@@ -26,33 +24,32 @@
#include <linux/config.h>
#endif
-/* form module/drivers */
#include <linux/init.h>
#include <linux/module.h>
-
-/* for platform device */
#include <linux/platform_device.h>
+#include <mach/hardware.h>
+#ifdef CONFIG_MACH_APF27 /* To remove when MX1 platform merged */
+#include <mach/fpga.h>
+#endif
#include "button.h"
#define BUTTON0_IRQ IRQ_FPGA(0)
-static struct plat_button_port plat_button0_data={
+static struct plat_button_port plat_button0_data = {
.name = "BUTTON0",
- .interrupt_number=BUTTON0_IRQ,
- .num=0,
- .membase = (void *)(ARMADEUS_FPGA_BASE_ADDR_VIRT +
- 0xc),
- .idnum=3,
- .idoffset=0x00 * (16 /8)
+ .interrupt_number = BUTTON0_IRQ,
+ .num = 0,
+ .membase = (void *)(ARMADEUS_FPGA_BASE_ADDR_VIRT + 0xc),
+ .idnum = 3,
+ .idoffset = 0x00 * (16 / 8)
};
-
-static struct platform_device plat_button0_device={
+static struct platform_device plat_button0_device = {
.name = "button",
- .id=0,
- .dev={
+ .id = 0,
+ .dev = {
.platform_data = &plat_button0_data
},
};
@@ -60,17 +57,12 @@
static int __init board_button_init(void)
{
- int ret = -1;
- ret = platform_device_register(&plat_button0_device);
- if(ret<0)return ret;
-
- return ret;
+ return platform_device_register(&plat_button0_device);
}
static void __exit board_button_exit(void)
{
platform_device_unregister(&plat_button0_device);
-
}
module_init(board_button_init);
Modified: trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c
===================================================================
--- trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c 2009-04-14 12:42:17 UTC (rev 1218)
+++ trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/main.c 2009-04-14 14:47:39 UTC (rev 1219)
@@ -37,10 +37,17 @@
# include <mach/irqs.h>
#endif
#include <asm/irq.h>
-#include <asm/io.h> // readb() & Co
+#include <asm/io.h> /* readb() & Co */
#include <asm/mach/irq.h>
+#ifdef CONFIG_MACH_APF27
+#include <mach/fpga.h> /* To remove when MX1 platform merged */
+#else
+#define VA_GPIO_BASE IO_ADDRESS(IMX_GPIO_BASE)
+#define MXC_ISR(x) (0x34 + ((x) << 8))
+#endif
+
#if 0
#define DEBUG_FPGA_IRQ(fmt,args...) printk(KERN_DEBUG "IRQ_MNGR: " fmt,##args)
#else
@@ -54,8 +61,8 @@
#define NB_IT (16)
-#define FPGA_IMR (APF9328_FPGA_VIRT + IRQ_MNGR_BASE + 0x00) /* Interrupt Mask Register */
-#define FPGA_ISR (APF9328_FPGA_VIRT + IRQ_MNGR_BASE + 0x02) /* Interrupt Status Register */
+#define FPGA_IMR (ARMADEUS_FPGA_BASE_ADDR_VIRT + IRQ_MNGR_BASE + 0x00) /* Interrupt Mask Register */
+#define FPGA_ISR (ARMADEUS_FPGA_BASE_ADDR_VIRT + IRQ_MNGR_BASE + 0x02) /* Interrupt Status Register */
static int
@@ -73,9 +80,11 @@
DEBUG_FPGA_IRQ("%s: irq %d ack:0x%x\n", __FUNCTION__, irq, shadow);
writew( shadow, FPGA_ISR );
- /* if last IT ack GPIO global IRQ */
- if( readw(FPGA_ISR) == 0 )
- ISR(IRQ_TO_REG(APF9328_FPGA_IRQ)) = 1 << (APF9328_FPGA_IRQ - IRQ_GPIOA(0));
+ /* if last IT, ack GPIO global IRQ */
+ if( readw(FPGA_ISR) == 0 ) {
+ __raw_writel(1 << (ARMADEUS_FPGA_IRQ & 0x1f),
+ VA_GPIO_BASE + MXC_ISR(IRQ_TO_REG(ARMADEUS_FPGA_IRQ)));
+ }
}
static void
@@ -139,21 +148,19 @@
static int __init ocore_irq_mng_init(void)
{
unsigned int irq;
- u16 data;
- int result=0;
+ u16 data;
+ int result=0;
DEBUG_FPGA_IRQ("Initializing FPGA IRQs\n");
- /**************************/
- /* check if ID is correct */
- /**************************/
- data = ioread16(APF9328_FPGA_VIRT+IRQ_MNGR_BASE+ID_OFFSET);
- if(data != ID)
- {
- result = -1;
- printk(KERN_WARNING "For irq_mngr id:%d doesn't match with id read %d,\n is device present ?\n",ID,data);
- goto error_id;
- }
+ /* check if ID is correct */
+ data = ioread16(ARMADEUS_FPGA_BASE_ADDR_VIRT + IRQ_MNGR_BASE + ID_OFFSET);
+ if (data != ID) {
+ result = -1;
+ printk(KERN_WARNING "For irq_mngr id:%d doesn't match with id"
+ "read %d,\n is device present ?\n", ID, data);
+ goto error_id;
+ }
/* Mask all interrupts initially */
writew(0, FPGA_IMR);
@@ -162,13 +169,13 @@
set_irq_chip_and_handler( irq, &imx_fpga_chip, handle_edge_irq );
set_irq_flags(irq, IRQF_VALID);
}
- set_irq_chained_handler(APF9328_FPGA_IRQ, imx_fpga_demux_handler);
+ set_irq_chained_handler(ARMADEUS_FPGA_IRQ, imx_fpga_demux_handler);
DEBUG_FPGA_IRQ("IRQs initialized\n");
return 0;
error_id:
- return result;
+ return result;
}
static void __exit ocore_irq_mng_exit(void)
@@ -179,7 +186,7 @@
set_irq_handler(irq,NULL);
set_irq_flags(irq, 0);
}
- set_irq_chained_handler(APF9328_FPGA_IRQ, NULL);
+ set_irq_chained_handler(ARMADEUS_FPGA_IRQ, NULL);
DEBUG_FPGA_IRQ("%s\n", __FUNCTION__);
}
@@ -190,3 +197,4 @@
MODULE_AUTHOR("Julien Boibessot, <jul...@ar...>");
MODULE_DESCRIPTION("Armadeus OpenCore IRQ manager");
MODULE_LICENSE("GPL");
+
Modified: trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/test.c
===================================================================
--- trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/test.c 2009-04-14 12:42:17 UTC (rev 1218)
+++ trunk/target/linux/modules/fpga/wishbone_example/wb_irq_mngr/test.c 2009-04-14 14:47:39 UTC (rev 1219)
@@ -29,10 +29,13 @@
#include <linux/module.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
+#ifdef CONFIG_MACH_APF27
+#include <mach/fpga.h> /* To remove when MX1 platform merged*/
+#endif
/* Module's parameters: */
-static int interrupt=IRQ_FPGA(3);
+static int interrupt = IRQ_FPGA(3);
module_param(interrupt, int, 0000);
MODULE_PARM_DESC(interrupt, "IT to request");
@@ -53,13 +56,14 @@
int result;
/* IRQ registering */
- if( (result=request_irq( interrupt, (irq_handler_t)fpga_interrupt, /*IRQF_SHARED*/0, "ocore_irq_test", &data)) < 0 )
- {
+ if ((result = request_irq(interrupt, (irq_handler_t)fpga_interrupt,
+ /*IRQF_SHARED*/0, "ocore_irq_test", &data)) < 0) {
printk(KERN_ERR "Can't request IRQ n°%d\n", interrupt);
goto error;
}
- printk(KERN_INFO DRIVER_NAME " inserted (IRQ %d reserved), be sure to have correspondig IP loaded in the FPGA !\n", interrupt);
+ printk(KERN_INFO DRIVER_NAME " inserted (IRQ %d reserved), be sure to "
+ "have correspondig IP loaded in the FPGA !\n", interrupt);
return 0;
error:
@@ -79,3 +83,4 @@
MODULE_AUTHOR("Julien Boibessot, <jul...@ar...>");
MODULE_DESCRIPTION("OpenCore IRQ manager IP's test driver");
MODULE_LICENSE("GPL");
+
Modified: trunk/target/linux/modules/fpga/wishbone_example/wb_led/board_leds.c
===================================================================
--- trunk/target/linux/modules/fpga/wishbone_example/wb_led/board_leds.c 2009-04-14 12:42:17 UTC (rev 1218)
+++ trunk/target/linux/modules/fpga/wishbone_example/wb_led/board_leds.c 2009-04-14 14:47:39 UTC (rev 1219)
@@ -1,9 +1,8 @@
/*
- ***********************************************************************
+ * Specific led driver for generic led driver
*
* (c) Copyright 2008 Armadeus project
* Fabien Marteau <fab...@ar...>
- * Specific led driver for generic led driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,7 +17,6 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- **********************************************************************
*/
#include <linux/version.h>
@@ -26,21 +24,21 @@
#include <linux/config.h>
#endif
-/* form module/drivers */
#include <linux/init.h>
#include <linux/module.h>
-
-/* for platform device */
#include <linux/platform_device.h>
-
+#ifdef CONFIG_MACH_APF27 /* to be removed when MX1 platform merged */
+#include <mach/fpga.h>
+#endif
#include"led.h"
+
static struct plat_led_port plat_led0_data = {
.name = "LED0",
- .num=0,
+ .num = 0,
.membase = (void *)(ARMADEUS_FPGA_BASE_ADDR_VIRT + 0x8),
- .idnum=2,
- .idoffset=0x01 * (16 /8)
+ .idnum = 2,
+ .idoffset = 0x01 * (16 / 8),
};
@@ -50,28 +48,23 @@
static struct platform_device plat_led0_device = {
.name = "led",
- .id=0,
- .dev={
+ .id = 0,
+ .dev = {
.release = plat_led_release,
- .platform_data=&plat_led0_data},
+ .platform_data=&plat_led0_data
+ },
};
static int __init sled_init(void)
{
- int ret=-1;
- ret = platform_device_register(&plat_led0_device);
- if(ret<0)return ret;
-
- PDEBUG("*led inserted*\n");
- return ret;
+ return platform_device_register(&plat_led0_device);
}
static void __exit sled_exit(void)
{
printk(KERN_WARNING "deleting board_leds\n");
platform_device_unregister(&plat_led0_device);
-
}
module_init(sled_init);
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <Fa...@us...> - 2009-04-14 12:42:19
|
Revision: 1218
http://armadeus.svn.sourceforge.net/armadeus/?rev=1218&view=rev
Author: FabM
Date: 2009-04-14 12:42:17 +0000 (Tue, 14 Apr 2009)
Log Message:
-----------
[BUILDROOT] cleaning fpgaregs header
Modified Paths:
--------------
trunk/target/linux/debug/fpgaregs/fpga27regs.h
trunk/target/linux/debug/fpgaregs/fpgaregs.h
Modified: trunk/target/linux/debug/fpgaregs/fpga27regs.h
===================================================================
--- trunk/target/linux/debug/fpgaregs/fpga27regs.h 2009-04-14 11:05:23 UTC (rev 1217)
+++ trunk/target/linux/debug/fpgaregs/fpga27regs.h 2009-04-14 12:42:17 UTC (rev 1218)
@@ -1,6 +1,4 @@
/*
- * definitions.h - imxregs common definitions
- *
* Copyright (C) 2008 armadeus systems
* Author: Fabien Marteau <fab...@ar...>
*
Modified: trunk/target/linux/debug/fpgaregs/fpgaregs.h
===================================================================
--- trunk/target/linux/debug/fpgaregs/fpgaregs.h 2009-04-14 11:05:23 UTC (rev 1217)
+++ trunk/target/linux/debug/fpgaregs/fpgaregs.h 2009-04-14 12:42:17 UTC (rev 1218)
@@ -1,6 +1,4 @@
/*
- * definitions.h - imxregs common definitions
- *
* Copyright (C) 2008 armadeus systems
* Author: Fabien Marteau <fab...@ar...>
*
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <Fa...@us...> - 2009-04-14 11:05:33
|
Revision: 1217
http://armadeus.svn.sourceforge.net/armadeus/?rev=1217&view=rev
Author: FabM
Date: 2009-04-14 11:05:23 +0000 (Tue, 14 Apr 2009)
Log Message:
-----------
[BUILDROOT] fpgaregs now work for apf27
Modified Paths:
--------------
trunk/buildroot/package/fpgaregs/fpgaregs.mk
trunk/target/linux/debug/fpgaregs/Makefile
trunk/target/linux/debug/fpgaregs/fpgaregs.c
Added Paths:
-----------
trunk/target/linux/debug/fpgaregs/fpga27regs.h
trunk/target/linux/debug/fpgaregs/fpgaregs.h
Modified: trunk/buildroot/package/fpgaregs/fpgaregs.mk
===================================================================
--- trunk/buildroot/package/fpgaregs/fpgaregs.mk 2009-04-14 09:10:34 UTC (rev 1216)
+++ trunk/buildroot/package/fpgaregs/fpgaregs.mk 2009-04-14 11:05:23 UTC (rev 1217)
@@ -9,6 +9,11 @@
FPGAREGS_DIR:=$(BUILD_DIR)/fpgaregs-$(FPGAREGS_VER)
FPGAREGS_CAT:=zcat
FPGAREGS_BINARY:=fpgaregs
+ifeq ($(BR2_TARGET_ARMADEUS_APF27),y)
+IMXREGS_BINARY:=fpga27regs
+else
+IMXREGS_BINARY:=fpgaregs
+endif
FPGAREGS_TARGET_BINARY:=usr/bin/fpgaregs
$(FPGAREGS_DIR)/fpgaregs.c:
Modified: trunk/target/linux/debug/fpgaregs/Makefile
===================================================================
--- trunk/target/linux/debug/fpgaregs/Makefile 2009-04-14 09:10:34 UTC (rev 1216)
+++ trunk/target/linux/debug/fpgaregs/Makefile 2009-04-14 11:05:23 UTC (rev 1217)
@@ -2,11 +2,13 @@
CC=arm-linux-gcc
endif
-
all: fpgaregs
-fpgaregs: fpgaregs.c
- $(CC) -mcpu=arm920t -Wall fpgaregs.c -o $@
+fpgaregs: fpgaregs.c fpgaregs.h
+ $(CC) -Wall fpgaregs.c -o $@
+
+fpgaregs: fpgaregs.c fpga27regs.h
+ $(CC) -DIMX27 -Wall fpgaregs.c -o $@
clean:
rm -f *.o
Added: trunk/target/linux/debug/fpgaregs/fpga27regs.h
===================================================================
--- trunk/target/linux/debug/fpgaregs/fpga27regs.h (rev 0)
+++ trunk/target/linux/debug/fpgaregs/fpga27regs.h 2009-04-14 11:05:23 UTC (rev 1217)
@@ -0,0 +1,23 @@
+/*
+ * definitions.h - imxregs common definitions
+ *
+ * Copyright (C) 2008 armadeus systems
+ * Author: Fabien Marteau <fab...@ar...>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#define FPGA_ADDRESS 0xD6000000
Modified: trunk/target/linux/debug/fpgaregs/fpgaregs.c
===================================================================
--- trunk/target/linux/debug/fpgaregs/fpgaregs.c 2009-04-14 09:10:34 UTC (rev 1216)
+++ trunk/target/linux/debug/fpgaregs/fpgaregs.c 2009-04-14 11:05:23 UTC (rev 1217)
@@ -44,7 +44,11 @@
/* memory management */
#include <sys/mman.h>
-#define FPGA_ADDRESS 0x12000000
+#ifdef IMX27
+# include "fpga27regs.h"
+#else
+# include "fpgaregs.h"
+#endif
#define WORD_ACCESS (2)
#define LONG_ACCESS (4)
Added: trunk/target/linux/debug/fpgaregs/fpgaregs.h
===================================================================
--- trunk/target/linux/debug/fpgaregs/fpgaregs.h (rev 0)
+++ trunk/target/linux/debug/fpgaregs/fpgaregs.h 2009-04-14 11:05:23 UTC (rev 1217)
@@ -0,0 +1,24 @@
+/*
+ * definitions.h - imxregs common definitions
+ *
+ * Copyright (C) 2008 armadeus systems
+ * Author: Fabien Marteau <fab...@ar...>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#define FPGA_ADDRESS 0x12000000
+
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <th...@us...> - 2009-04-14 09:10:45
|
Revision: 1216
http://armadeus.svn.sourceforge.net/armadeus/?rev=1216&view=rev
Author: thom25
Date: 2009-04-14 09:10:34 +0000 (Tue, 14 Apr 2009)
Log Message:
-----------
[LINUX] PWM driver reworked (compatibility between imxL and imx27 added)
Modified Paths:
--------------
trunk/target/linux/modules/pwm/pwm.c
trunk/target/linux/modules/pwm/pwm.h
Modified: trunk/target/linux/modules/pwm/pwm.c
===================================================================
--- trunk/target/linux/modules/pwm/pwm.c 2009-04-14 09:01:37 UTC (rev 1215)
+++ trunk/target/linux/modules/pwm/pwm.c 2009-04-14 09:10:34 UTC (rev 1216)
@@ -21,11 +21,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
-//#define DEBUG 1
-
#include <linux/module.h>
#include <linux/version.h>
-
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/delay.h>
@@ -43,75 +40,86 @@
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/string.h>
-#include <linux/init.h>
-#include <asm/bitops.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <linux/wait.h>
#include <linux/pm.h>
+#include <linux/clk.h>
/* For /sys */
#include <linux/sysdev.h>
/* For struct class */
#include <linux/device.h>
/* For circular buffer */
#include <linux/circ_buf.h>
-
-#include <mach/hardware.h>
#include <linux/platform_device.h>
-
#include "pwm.h"
-// additional defines
-#define PWMC_PRESCALER_MASK 0x00007F00
-#define PWMC_REPEAT_MASK 0x0000000C
-#define PWMC_CLKSEL_MASK 0x00000003
+#ifdef CONFIG_ARCH_MX2
+#define PWMCTRL (0x00)
+#define PWMSTATUS (0x04)
+#define PWMIRQ (0x08)
+#define PWMSAMPLE (0x0c)
+#define PWMPERIOD (0x10)
+#define PWMCOUNTER (0x14)
+#define PWM_EN (1<<0)
+#define PWM_IRQEN (1<<0)
+#define PWM_SWR (1<<3)
+#define PWM_CLKSRC_MASK (3<<16)
+#define PWM_CLKSRC_IPG (2<<16)
+#define PWM_CLKSRC_32K (3<<16)
+#define PWM_REPEAT_MASK (3<<1)
+#define PWM_HCTR (1<<20)
+#define PWM_BCTR (1<<21)
+#define PWM_FIFOAV (7<<0)
+#define PWM_FIFO_EMPTY (1<<3)
+#define PWM_REPEAT(x) (((x) & 0x03) << 1)
+#define PWM_CLKSEL_MASK (0)
+#define PWM_PRESCALER_MASK 0x0000FFF0
+#define PWM_PRESCALER(x) (((x-1) & 0xFFF) << 4)
+#define PWM_PERIOD(x) ((x) & 0xFFFF)
+#define PWM_SAMPLE(x) ((x) & 0xFFFF)
+#define PWM_INT MXC_INT_PWM
+#define PWM_MAX_DEV 1
+#else
+#define PWMCTRL (0x00)
+#define PWMSTATUS (0x00)
+#define PWMIRQ (0x00)
+#define PWMSAMPLE (0x04)
+#define PWMPERIOD (0x08)
+#define PWMCOUNTER (0x0C)
+#define PWM_EN (1<<4)
+#define PWM_IRQEN PWMC_IRQEN
+#define PWM_SWR PWMC_SWR
+#define PWM_CLKSRC_MASK (1<<15)
+#define PWM_CLKSRC_IPG (0<<15)
+#define PWM_CLKSRC_32K (1<<15)
+#define PWM_HCTR PWMC_HCTR
+#define PWM_BCTR PWMC_BCTR
+#define PWM_FIFOAV PWMC_FIFOAV
+#define PWM_REPEAT_MASK 0x0000000C
+#define PWM_CLKSEL_MASK 0x00000003
+#define PWM_REPEAT(x) PWMC_REPEAT(x)
+#define PWM_PRESCALER_MASK 0x00007F00
+#define PWM_PRESCALER(x) PWMC_PRESCALER(x)
+#define PWM_PERIOD(x) PWMP_PERIOD(x)
+#define PWM_SAMPLE(x) PWMS_SAMPLE(x)
+#define PWM_MAX_DEV 1
+#endif
-#define PWM_TEST
-
#define DRIVER_NAME "imx-pwm"
-#define DRIVER_VERSION "0.6"
+#define DRIVER_VERSION "0.7"
-#define DEV_IRQ_NAME DRIVER_NAME
-#define DEV_IRQ_ID DRIVER_NAME
-
//#define PK(fmt, args...) printk(fmt, ## args)
#define PK(...)
-
-struct pwm_device {
- u32 reg;
- int active;
- unsigned duty;
- /*const*/ struct pwm_table *entry;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
- struct class_device class_dev;
-#else
- struct device class_dev;
-#endif
+struct sound_circ_buf {
+ char* buf;
+ int write; /* == head */
+ int read; /* == tail */
+ int size;
};
+#define MAX_SOUND_BUFFER_SIZE (16*1024) /* !! Should be a power of 2 !! */
-static struct class pwm_class; /* forward declaration only */
-
-#define to_pwm_device(d) container_of(d, struct pwm_device, class_dev)
-
-
-/* Global variables */
-int gPwmMode;
-int g4bytes; /* count 4 bytes write occurence to FIFO */
-u8 *gpWriteBufPtr;
-u16 *gpWriteBufPtr16;
-int gDataLen = PWM_DATA_8BIT;
-u16 gSampleValue;
-
-int irq = 0;
-module_param(irq, int, 0);
-
-wait_queue_head_t write_wait;
-wait_queue_head_t exit_wait;
-struct fasync_struct *ts_fasync;
-
-int gMajor = 0; /* TODO dynamic major for now */
-
typedef struct timer_list timer_blk_t;
typedef struct timerStruct
@@ -120,95 +128,52 @@
int period;
void (*timer_func)(unsigned long);
int stop_flag;
-} PWM_Timer_t;
+} pwm_timer_t;
-static PWM_Timer_t pwmTimer;
-static timer_blk_t timer_blk;
struct pwm_table {
- long period; /* in us */
- unsigned max_period_val;
- unsigned prescaler;
+ u32 period; /* in us */
+ u32 prescaler;
};
-struct pwm_table pwmdata;
-/*
- * Ready to use calculations
- */
-static const struct pwm_table pwm_table[]={
- {
- .period=1, /* 1 us */
- .max_period_val = 13,
- .prescaler=1,
- },
- {
- .period=5, /* 5 us */
- .max_period_val = 65,
- .prescaler=1,
- },
- {
- .period=10, /* 10 us */
- .max_period_val = 130,
- .prescaler=1,
- },
- {
- .period=20, /* 20 us */
- .max_period_val = 260,
- .prescaler=1,
- },
- {
- .period=50, /* 50 us */
- .max_period_val = 650,
- .prescaler=1,
- },
- {
- .period=100, /* 100 us */
- .max_period_val = 650,
- .prescaler=2,
- },
- {
- .period=500, /* 500 us */
- .max_period_val = 929,
- .prescaler=7,
- },
- {
- .period=1000, /* 1ms */
- .max_period_val = 1000,
- .prescaler=13,
- },
- {
- .period=2000, /* 2ms */
- .max_period_val = 1000,
- .prescaler=26,
- },
- {
- .period=3000, /* 3ms */
- .max_period_val = 1000,
- .prescaler=39,
- },
- {
- .period=4000, /* 4ms */
- .max_period_val = 1020,
- .prescaler=51,
- },
- {
- .period=5000, /* 5ms */
- .max_period_val = 1016,
- .prescaler=64,
- }
+struct pwm_device {
+ unsigned long membase;
+ unsigned int irq;
+ int active;
+ unsigned duty;
+ /*const*/ struct pwm_table entry;
+ int mode;
+ int nbbytes; /* count 4 bytes write occurence to FIFO */
+ int dataLen;
+ u16 sampleValue;
+
+ wait_queue_head_t write_wait;
+ wait_queue_head_t exit_wait;
+
+ struct sound_circ_buf circ_buf;
+ pwm_timer_t timer;
+ timer_blk_t timer_blk;
+ struct clk *clk;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
+ struct class_device class_dev;
+#else
+ struct device class_dev;
+#endif
};
+int gMajor = 0;
+static struct pwm_device *dev_table[PWM_MAX_DEV];
+static struct class pwm_class; /* forward declaration only */
+
+#define to_pwm_device(d) container_of(d, struct pwm_device, class_dev)
+
+//struct fasync_struct *ts_fasync;
+
/****************************************************************
* Circular buffer handling four sound playing
***************************************************************/
-struct sound_circ_buf {
- char* buf;
- int write; /* == head */
- int read; /* == tail */
- int size;
-};
-
static inline u8 get_byte_from_circbuf( struct sound_circ_buf* abuffer )
{
u8 b = abuffer->buf[ abuffer->read ];
@@ -235,43 +200,50 @@
pr_debug("Added %d bytes to buffer, now write is in pos %d\n", count, abuffer->write);
}
-#define MAX_SOUND_BUFFER_SIZE (16*1024) /* !! Should be a power of 2 !! */
-static struct sound_circ_buf gPWM_Circ_Buf;
+
/****************************************************************
*
***************************************************************/
-static void inline unregister_sys_file( struct pwm_device *ppd );
+static void inline unregister_sys_file( struct pwm_device *pwm );
+static void write_bits(u32 bit, u32 mask, unsigned long reg)
+{
+ u32 temp;
+ temp = readl(reg) & ~mask;
+ writel(temp | (bit&mask), reg);
+}
+
+
/**
* setup_pwm_unit - common setup function whenever something was changed
- * @ppd: PWM unit to work with
+ * @pwm: PWM unit to work with
*/
-static void setup_pwm_unit(struct pwm_device *ppd)
+static void setup_pwm_unit(struct pwm_device *pwm)
{
- if (ppd->entry == NULL)
- return; /* do nothing, not fully configured yet */
-
- if (ppd->active) {
+ if (pwm->active) {
/* Activate PWM */
- PWMC |= PWMC_EN;
+ write_bits( PWM_EN, PWM_EN, pwm->membase + PWMCTRL );
+ write_bits( PWM_CLKSRC_IPG, PWM_CLKSRC_MASK, pwm->membase + PWMCTRL );
/* Setup prescaler */
pr_debug("Updating PWM registers\n");
- PWMC = (PWMC & ~PWMC_PRESCALER_MASK) | PWMC_PRESCALER(ppd->entry->prescaler) /*| PWMC_REPEAT(3)*/;
+ write_bits( PWM_PRESCALER(pwm->entry.prescaler),
+ PWM_PRESCALER_MASK, pwm->membase + PWMCTRL ); /*| PWMC_REPEAT(3)*/;
/* Setup period */
- PWMP = PWMP_PERIOD(ppd->entry->period);
+ writel(PWM_PERIOD(pwm->entry.period) , pwm->membase + PWMPERIOD );
/* Setup duty cycle */
- PWMS = PWMS_SAMPLE( (u32) ((ppd->entry->period * ppd->duty) / 1000) );
+ writel(PWM_SAMPLE( (u32) ((pwm->entry.period * pwm->duty) / 1000) ),
+ pwm->membase + PWMSAMPLE);
} else {
/* De-activate */
- PWMC &= ~PWMC_EN;
+ write_bits( ~PWM_EN, PWM_EN, pwm->membase + PWMCTRL );
}
}
/* timer */
-static int create_timer(PWM_Timer_t *timer)
+static int create_timer(pwm_timer_t *timer)
{
init_timer(timer->timer_blk_ptr);
timer->timer_blk_ptr->function = timer->timer_func;
@@ -279,7 +251,7 @@
return(0);
}
-static int start_timer(PWM_Timer_t *timer)
+static int start_timer(pwm_timer_t *timer)
{
timer->timer_blk_ptr->expires = jiffies + timer->period;
timer->stop_flag = 0;
@@ -289,7 +261,7 @@
return(0);
}
-static int stop_timer(PWM_Timer_t *timer)
+static int stop_timer(pwm_timer_t *timer)
{
timer->stop_flag = 1;
del_timer_sync((struct timer_list *)timer->timer_blk_ptr);
@@ -297,20 +269,20 @@
return(0);
}
-static void stop_pwm(void)
+static void stop_pwm(struct pwm_device *pwm)
{
- PWMC &= ~PWMC_IRQEN; /* disable IRQ */
- PWMC &= ~PWMC_EN; /* disable PWM */
+ write_bits( ~PWM_IRQEN, PWM_IRQEN, pwm->membase + PWMIRQ );
+ write_bits( ~PWM_EN, PWM_EN, pwm->membase + PWMCTRL );
- gSampleValue = 0;
- if(gPwmMode == PWM_TONE_MODE)
- StopTimer(&pwmTimer);
+ pwm->sampleValue = 0;
+ if(pwm->mode == PWM_TONE_MODE)
+ stop_timer(&pwm->timer);
/* Can release file now */
- wake_up_interruptible(&exit_wait);
+ wake_up_interruptible(&pwm->exit_wait);
PK("<1>data completed.\n");
- PK("<1>PWMC = 0x%8x\n", (u32)PWMC);
+ PK("<1>PWMC = 0x%8x\n", readl(pwm->membase + PWMCTRL));
}
static void pwmIntFunc( unsigned long unused)
@@ -324,7 +296,7 @@
// PK("<1>PWMS = 0x%4x\n", (u16)_reg_PWM_PWMS);
//
// // 96M/128/2/period
-// period = *gpWriteBufPtr16++;
+// period = *writeBufPtr16++;
//
// if(period > 0)
// // PWMP = 96000000/128/12/2/period; //96000000/128/2*11
@@ -332,7 +304,7 @@
// PK("<1>PWMP = 0x%4x\n", (u16)PWMP);
// PK("<1>PWMCNT = 0x%4x\n", (u16)PWMCNT);
//
-// StartTimer(&pwmTimer);
+// StartTimer(&timer);
//
// gWriteCnt--;
// }
@@ -341,19 +313,14 @@
}
-static int init_pwm(void)
+static int init_pwm(struct pwm_device *pwm)
{
- /* Init Port PA[2] : PWMO
- Should be done in apf9328.c non ??? */
- DDIR(0) |= 0x00000002;
- GIUS(0) &= ~0x00000002;
- GPR(0) &= ~0x00000002;
-
/* Software reset */
- PWMC |= PWMC_SWR;
+ write_bits( PWM_SWR, PWM_SWR, pwm->membase + PWMCTRL );
udelay(10);
/* Activate & de-activate PWM (seems to be necessary after a reset) */
- PWMC |= PWMC_EN; PWMC &= ~PWMC_EN;
+ write_bits( PWM_EN, PWM_EN, pwm->membase + PWMCTRL );
+ write_bits( ~PWM_EN, PWM_EN, pwm->membase + PWMCTRL );
/* Enable interrupt */
//PWMC |= PWMC_IRQEN;
@@ -365,21 +332,26 @@
int pwm_release(struct inode * inode, struct file * filp)
{
+ struct pwm_device *pwm = dev_table[iminor(inode)];
+
// wait unit gWriteCnt == 0
- interruptible_sleep_on(&exit_wait);
+ interruptible_sleep_on(&pwm->exit_wait);
- if( gPWM_Circ_Buf.buf ) {
- kfree( gPWM_Circ_Buf.buf );
- gPWM_Circ_Buf.buf = 0;
+ if( pwm->circ_buf.buf ) {
+ kfree( pwm->circ_buf.buf );
+ pwm->circ_buf.buf = 0;
}
- printk(DRIVER_NAME " released, 4 bytes FIFO usage: %d\n", g4bytes);
+ printk(DRIVER_NAME " released, 4 bytes FIFO usage: %d\n", pwm->nbbytes);
return 0;
}
int pwm_open(struct inode * inode, struct file * filp)
{
+ struct pwm_device *pwm = dev_table[iminor(inode)];
+
+ pwm->dataLen = PWM_DATA_8BIT;
/* Init PWM hardware */
- init_pwm();
+ init_pwm(pwm);
pr_debug(DRIVER_NAME " opened \n");
return 0;
@@ -406,6 +378,7 @@
{
char *str=NULL;
int ret = 0;
+ struct pwm_device *pwm = dev_table[iminor(inode)];
pr_debug("pwm_ioctl ----\n");
switch(cmd)
@@ -413,14 +386,14 @@
/* Set PWM Mode (Tone or Playback) */
case PWM_IOC_SMODE:
{
- gPwmMode = arg;
+ pwm->mode = arg;
- if (gPwmMode == PWM_TONE_MODE) {
+ if (pwm->mode == PWM_TONE_MODE) {
/* create periodic timer when tone mode */
pr_debug("PWM Tone Mode.\n");
- pwmTimer.timer_blk_ptr = &timer_blk;
- pwmTimer.timer_func = pwmIntFunc;
- create_timer(&pwmTimer);
+ pwm->timer.timer_blk_ptr = &pwm->timer_blk;
+ pwm->timer.timer_func = pwmIntFunc;
+ create_timer(&pwm->timer);
} else {
pr_debug("PWM Play Mode.\n");
}
@@ -430,49 +403,52 @@
/* Set Playback frequency/ouput rate */
case PWM_IOC_SFREQ:
{
- PWMC &= ~PWMC_EN; // Disable PWM
- PWMC &= ~PWMC_CLKSRC; // Select 16MHz PERCLK1 as CLK source
- PWMC &= ~PWMC_PRESCALER_MASK; // PRESCALER = 0 => use full 16MHz
-
+ /* Disable PWM */
+ write_bits( ~PWM_EN, PWM_EN, pwm->membase + PWMCTRL );
+ /* Select 16MHz PERCLK1 as CLK source */
+ write_bits( PWM_CLKSRC_IPG, PWM_CLKSRC_MASK, pwm->membase + PWMCTRL );
+ /* PRESCALER = 0 => use full IPG */
+ write_bits( 0, PWM_PRESCALER_MASK, pwm->membase + PWMCTRL );
+ /* CLKSEL = 0 => divide by 2 */
+ write_bits( 0, PWM_CLKSEL_MASK, pwm->membase + PWMCTRL );
+
switch(arg)
{
case PWM_SAMPLING_32KHZ:
- PWMC &= ~PWMC_REPEAT_MASK; // REPEAT = 0 => divide by 1
- PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
+ /* REPEAT = 0 => divide by 1 */
+ write_bits( 0, PWM_REPEAT_MASK, pwm->membase + PWMCTRL );
/* 16MHz/256/1/2 = 32768 */
str = "32Khz";
break;
case PWM_SAMPLING_16KHZ:
- PWMC &= ~PWMC_REPEAT_MASK;
- PWMC |= PWMC_REPEAT(1); // REPEAT = 01 => divide by 2
- PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
+ /* REPEAT = 01 => divide by 2 */
+ write_bits( PWM_REPEAT(1), PWM_REPEAT_MASK, pwm->membase + PWMCTRL );
/* 16MHz/256/2/2 = 16384 */
str = "16Khz";
break;
case PWM_SAMPLING_8KHZ:
default:
- PWMC &= ~PWMC_REPEAT_MASK;
- PWMC |= PWMC_REPEAT(2); // REPEAT = 10 => divide by 4
- PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
+ /* REPEAT = 10 => divide by 4*/
+ write_bits( PWM_REPEAT(1), PWM_REPEAT_MASK, pwm->membase + PWMCTRL );
/* 16MHz/256/4/2 = 8192 */
str = "8Khz";
break;
}
pr_debug("Sample rate = %s\n", str);
- pr_debug("ioctl: PWMC = 0x%8x\n", PWMC);
+ pr_debug("ioctl: PWMC = 0x%8x\n", readl(pwm->membase+PWMCTRL));
}
break;
/* Set samples length (8 or 16 bits) */
case PWM_IOC_SDATALEN:
{
- gDataLen = arg;
+ pwm->dataLen = arg;
if (arg == PWM_DATA_8BIT) {
- PWMP = 0xfe; /* Period, 8bit */
+ writel(0xfe, pwm->membase + PWMPERIOD);
str = "8bit";
} else { /* if(arg == PWM_DATA_16BIT) */
- PWMP = 0xfffe; /* Period, 16bit */
+ writel(0xfffe, pwm->membase + PWMPERIOD);
str = "16bit";
}
pr_debug("Data Length = %s\n", str);
@@ -480,32 +456,33 @@
break;
case PWM_IOC_SSAMPLE:
- gSampleValue = arg;
+ pwm->sampleValue = arg;
break;
case PWM_IOC_SPERIOD:
- if (gPwmMode == PWM_TONE_MODE)
+ if (pwm->mode == PWM_TONE_MODE)
{
PK("<1>PWM period = %d\n",(int)arg);
- pwmTimer.period = arg/12;
+ pwm->timer.period = arg/12;
}
break;
case PWM_IOC_STOP:
- stop_pwm();
+ stop_pwm(pwm);
break;
case PWM_IOC_SWAPDATA:
if (arg&PWM_SWAP_HCTRL) { /* Halfword FIFO data swapping */
- PWMC |= PWMC_HCTR;
+ write_bits( PWM_REPEAT(1), PWM_REPEAT_MASK, pwm->membase + PWMCTRL );
+ write_bits( PWM_HCTR, PWM_HCTR, pwm->membase + PWMCTRL );
} else {
- PWMC &= ~PWMC_HCTR;
+ write_bits( ~PWM_HCTR, PWM_HCTR, pwm->membase + PWMCTRL );
}
if (arg & PWM_SWAP_BCTRL) { /* Byte FIFO data swapping */
- PWMC |= PWMC_BCTR;
+ write_bits( PWM_BCTR, PWM_BCTR, pwm->membase + PWMCTRL );
} else {
- PWMC &= ~PWMC_BCTR;
+ write_bits( ~PWM_BCTR, PWM_BCTR, pwm->membase + PWMCTRL );
}
break;
@@ -520,8 +497,9 @@
ssize_t pwm_read(struct file * filp, char * buf, size_t count, loff_t * l)
{
int ret = 0;
+ struct pwm_device *pwm = dev_table[iminor(filp->f_dentry->d_inode)];
- if (PWMC & PWMC_IRQEN)
+ if (readl(pwm->membase+PWMIRQ) & PWM_IRQEN)
ret = 1; /* no data */
else
ret = 0; /* processing data */
@@ -535,70 +513,75 @@
{
int ret = 0;
int remaining_space = 0;
+ struct pwm_device *pwm = dev_table[iminor(filp->f_dentry->d_inode)];
+ struct sound_circ_buf *circ = &pwm->circ_buf;
+
pr_debug( "pwm_write ----\n" );
if (count > MAX_SOUND_BUFFER_SIZE)
count = MAX_SOUND_BUFFER_SIZE;
/* First time, allocate the double buffer */
- if (!gPWM_Circ_Buf.buf) {
- gPWM_Circ_Buf.buf = kmalloc( count*2, GFP_KERNEL );
- if (!gPWM_Circ_Buf.buf) {
+ if (!circ->buf) {
+ circ->buf = kmalloc( count*2, GFP_KERNEL );
+ if (!circ->buf) {
goto out;
} else {
/* Initialize circular buffer */
- gPWM_Circ_Buf.read = 0;
- gPWM_Circ_Buf.write = 0;
- gPWM_Circ_Buf.size = MAX_SOUND_BUFFER_SIZE*2;
+ circ->read = 0;
+ circ->write = 0;
+ circ->size = MAX_SOUND_BUFFER_SIZE*2;
}
}
/* If there is enough space at the end of the buffer for all data in one copy, do it */
- remaining_space = gPWM_Circ_Buf.size - gPWM_Circ_Buf.write;
+ remaining_space = circ->size - circ->write;
pr_debug("Remaining space to end: %d, must write: %d \n", remaining_space, count);
if (remaining_space >= count) {
// Get data from UserSpace
- if( copy_from_user( gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write , buf, count ) ) {
+ if( copy_from_user( circ->buf + circ->write , buf, count ) ) {
ret = -EFAULT; goto out;
}
- increase_circbuf( &gPWM_Circ_Buf, count );
+ increase_circbuf( &pwm->circ_buf, count );
/* if not enough space, then */
} else {
/* Do it in 2 times */
- if (copy_from_user(gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write, buf, remaining_space)) {
+ if (copy_from_user(circ->buf + circ->write, buf, remaining_space)) {
ret = -EFAULT; goto out;
}
- increase_circbuf( &gPWM_Circ_Buf, remaining_space );
- if (copy_from_user(gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write, buf, count - remaining_space)) {
+ increase_circbuf( &pwm->circ_buf, remaining_space );
+ if (copy_from_user(circ->buf + circ->write, buf, count - remaining_space)) {
ret = -EFAULT; goto out;
}
- increase_circbuf(&gPWM_Circ_Buf, count - remaining_space);
+ increase_circbuf(&pwm->circ_buf, count - remaining_space);
}
/* Enable PWM */
- PWMC |= PWMC_EN;
- PWMS = 0x00000000;
+ write_bits( PWM_EN, PWM_EN, pwm->membase + PWMCTRL );
+ writel(0x00000000, pwm->membase + PWMSAMPLE);
- if (gPwmMode == PWM_PLAY_MODE) {
- PWMC |= PWMC_IRQEN; /* Enable IRQ */
+ if (pwm->mode == PWM_PLAY_MODE) {
+ /* Enable IRQ */
+ write_bits( PWM_IRQEN, PWM_IRQEN, pwm->membase + PWMCTRL);
} else {
- PWMS = gSampleValue;
- PWMC |= 0x7f00; /* set prescaler to 128 */
- /* gpWriteBufPtr16 = (u16*)gpWriteBuf;
+ writel(pwm->sampleValue, pwm->membase + PWMSAMPLE);
+ /* set prescaler to 128 */
+ write_bits(0x7f00 , PWM_PRESCALER_MASK, pwm->membase + PWMCTRL);
+ /*writeBufPtr16 = (u16*)gpWriteBuf;
gWriteCnt /= 2; //input size is 8bit size, need /2 to get 16bit size
- StartTimer( &pwmTimer );*/
+ StartTimer( &timer );*/
}
/* Calculate how much space is left in buffer */
- remaining_space = CIRC_SPACE(gPWM_Circ_Buf.write, gPWM_Circ_Buf.read, gPWM_Circ_Buf.size);
+ remaining_space = CIRC_SPACE(circ->write, circ->read, circ->size);
pr_debug("Space left: %d\n", remaining_space);
if (remaining_space < count) {
/* Pauses user app until interrupt handler has consumed some data */
- interruptible_sleep_on(&write_wait);
+ interruptible_sleep_on(&pwm->write_wait);
}
out:
- pr_debug( "out pwm_write PWMC = 0x%8x ----\n", PWMC );
+ pr_debug( "out pwm_write PWMC = 0x%8x ----\n", readl(pwm->membase + PWMCTRL ));
return count;
}
@@ -613,7 +596,53 @@
/////////////////////////////////////// END OF /DEV INTERFACE /////////////////////////////////////////////////////////
+#ifdef CONFIG_ARCH_MX2
+#define PWM_MIN_FREQUENCY 1 // Hz
+#define PWM_MAX_FREQUENCY 1000000 /* Hz */
+#else
+#define PWM_MIN_FREQUENCY 2 /* Hz */
+#define PWM_MAX_FREQUENCY 1000000 /* Hz */
+#endif
+static int get_current_pwm_clk_rate(struct pwm_device *pwm)
+{
+ if( (readl(pwm->membase + PWMCTRL) & PWM_CLKSRC_MASK) == PWM_CLKSRC_32K)
+ return 32768;
+#ifdef CONFIG_ARCH_MX2
+ return clk_get_rate(pwm->clk);
+#else
+ return 8000000;
+#endif
+}
+
+/* result in Hz */
+static long get_pwm_min_freq(struct pwm_device *pwm)
+{
+ return PWM_MIN_FREQUENCY;
+}
+
+/* result in Hz */
+static long get_pwm_max_freq(struct pwm_device *pwm)
+{
+ return PWM_MAX_FREQUENCY;
+}
+
+/* freq in Hz */
+static void compute_pwm_params(u32 req_freq, struct pwm_device *pwm)
+{
+ u32 input_freq, divider;
+ input_freq = get_current_pwm_clk_rate(pwm);
+ divider = ((input_freq*10)/req_freq+5)/10;
+ if( divider/65536 ){
+ pwm->entry.prescaler = divider/65536 +1;
+ pwm->entry.period = input_freq/(pwm->entry.prescaler*req_freq)-2;
+ }
+ else{
+ pwm->entry.period = divider-2;
+ pwm->entry.prescaler = 1;
+ }
+}
+
/**
* pwm_show_duty - return current duty setting
* @dev: device to work with
@@ -622,9 +651,9 @@
static ssize_t pwm_show_duty(struct device *dev, struct device_attribute *attr, char *buf)
{
ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
- ret_size=sprintf(buf,"%u",ppd->duty);
+ ret_size=sprintf(buf,"%u",pwm->duty);
return ret_size;
}
@@ -645,14 +674,14 @@
static ssize_t pwm_store_duty(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
long value;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
value = simple_strtol(buf, NULL, 10);
if ((value < 1) || (value > 999))
return -EIO;
- ppd->duty=(unsigned)value;
- setup_pwm_unit(ppd);
+ pwm->duty=(unsigned)value;
+ setup_pwm_unit(pwm);
return size;
}
@@ -665,12 +694,9 @@
static ssize_t pwm_show_period(struct device *dev, struct device_attribute *attr, char *buf)
{
ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
- if (ppd->entry) /* already initialized? */
- ret_size=sprintf(buf,"%ld",ppd->entry->period);
- else
- ret_size=sprintf(buf,"0");
+ ret_size=sprintf(buf,"%d",pwm->entry.period);
return ret_size;
}
@@ -682,53 +708,19 @@
* @size: size of buffer
*
* Returns the given @size or -EIO
- *
- * The min/max period depends on processors features.
- * Currently the i.MXl uses either PERCLK1 or CLK32 clock.s You can prescale
- * these clocks up to 1/128 (down to 203.125kHz).
- * The period is based on this prescaled clock and it's width depends on
- * the period register (PWMP). This register is 16 bits width.
- * So for PERCLK1 (16Mhz):
- * - min. period is (no prescale, PWMP = 1): ~62ns
- * - max. period is (max prescale, period control = 0xFFFF): ~520ms
- * For CLK32 (32KHz):
- * - min. period is ~31us
- * - max. period is 256s
- *
- * The unit of the given value should be "us" (1E-6) and the value
- * between 1 and 500000.
*/
-#define PWM_MAX_PERIOD 500000 // us
-#define PWM_MIN_PERIOD 1 //us
-#define PWM_MIN_FREQUENCY 2 // Hz
-#define PWM_MAX_FREQUENCY 100000 // Hz
static ssize_t pwm_store_period(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
long value/*,i*/;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
- value = simple_strtol(buf, NULL, 10);
- if ((value < PWM_MIN_PERIOD) && (value > PWM_MAX_PERIOD))
+ value = simple_strtol(buf, NULL, 10); // in us
+ if ((value < (1000000/get_pwm_max_freq(pwm))) || (value > (1000000/get_pwm_min_freq(pwm))))
return -EIO;
-/* for( i=0; i<ARRAY_SIZE(pwm_table); i++ )
- {
- if (pwm_table[i].period >= value)
- break;
- }
- if (i==ARRAY_SIZE(pwm_table)) // period not found in table?
- return -EIO;
-
- ppd->entry=&pwm_table[i];*/
- ppd->entry=&pwmdata;
- ppd->entry->period = value;
- ppd->entry->prescaler = 8; // 1us / tick if CLKSEL is = 0
- ppd->entry->max_period_val = value;
- /*printk(KERN_INFO "New period should be %ld us, and is %ld us\n",
- value,ppd->entry->period);*/
-
- setup_pwm_unit(ppd);
+ compute_pwm_params(1000000/value, pwm);
+ setup_pwm_unit(pwm);
return size;
}
@@ -740,10 +732,10 @@
static ssize_t pwm_show_frequency(struct device *dev, struct device_attribute *attr, char *buf)
{
ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
- if (ppd->entry)
- ret_size = sprintf(buf,"%ld", (u32) 1000000/(ppd->entry->period));
+ if (pwm->entry.period)
+ ret_size = sprintf(buf,"%d", (u32) 1000000/(pwm->entry.period));
else
ret_size = sprintf(buf,"0");
@@ -765,22 +757,15 @@
static ssize_t pwm_store_frequency(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
long value;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
value = simple_strtol(buf, NULL, 10);
- if( (value < PWM_MIN_FREQUENCY) && (value > PWM_MAX_FREQUENCY) )
+ if( (value < get_pwm_min_freq(pwm)) || (value > get_pwm_max_freq(pwm)) )
return -EIO;
- /* Convert frequency into period */
- value = (u32) (1000000 / value);
+ compute_pwm_params(value, pwm);
+ setup_pwm_unit(pwm);
- ppd->entry=&pwmdata;
- ppd->entry->period = value;
- ppd->entry->prescaler = 8; /* 1us / tick if CLKSEL is = 0 */
- ppd->entry->max_period_val = value;
- /* Update hardware */
- setup_pwm_unit(ppd);
-
return( size );
}
@@ -792,9 +777,9 @@
static ssize_t pwm_show_state(struct device *dev, struct device_attribute *attr, char *buf)
{
ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
- ret_size=sprintf(buf,"%d",ppd->active);
+ ret_size=sprintf(buf,"%d",pwm->active);
return ret_size;
}
@@ -810,15 +795,15 @@
static ssize_t pwm_store_state(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
long value;
- struct pwm_device *ppd = to_pwm_device(dev);
+ struct pwm_device *pwm = to_pwm_device(dev);
value = simple_strtol(buf, NULL, 10);
if (value != 0)
- ppd->active=1;
+ pwm->active=1;
else
- ppd->active=0;
+ pwm->active=0;
- setup_pwm_unit(ppd);
+ setup_pwm_unit(pwm);
return size;
}
@@ -848,60 +833,7 @@
*/
static DEVICE_ATTR(active, S_IWUSR | S_IRUGO, pwm_show_state, pwm_store_state);
-/**
- * init_userinterface - setup the device and things the user will see
- * @pdev: platform device to work with
- * @address: physical address of this device
- *
- * Return 0 on success
- */
-static int init_userinterface(struct platform_device *pdev, u32 address)
-{
- int rc = 0;
- struct pwm_device *ppd;
- if (unlikely((ppd = kmalloc(sizeof(struct pwm_device), GFP_KERNEL)) == NULL)) {
- rc = -ENOMEM;
- goto error_malloc;
- }
-
- memset(&ppd->class_dev, 0, sizeof(struct device));
- ppd->class_dev.class = &pwm_class;
- ppd->class_dev.parent = &pdev->dev;
- snprintf(ppd->class_dev.bus_id, BUS_ID_SIZE, "pwm%i", pdev->id);
- ppd->reg=address;
- ppd->entry=NULL;
- ppd->active=0;
- ppd->duty=500; /* = 50.O% */
-
- rc = device_register(&ppd->class_dev);
- if (unlikely(rc)) goto error_register;
-
- /* Register the attributes */
- rc |= device_create_file(&ppd->class_dev, &dev_attr_duty);
- if (unlikely(rc)) goto error_file;
- rc |= device_create_file(&ppd->class_dev, &dev_attr_period);
- if (unlikely(rc)) goto error_file;
- rc |= device_create_file(&ppd->class_dev, &dev_attr_frequency);
- if (unlikely(rc)) goto error_file;
- rc |= device_create_file(&ppd->class_dev, &dev_attr_active);
- if (unlikely(rc)) goto error_file;
-
- pdev->dev.driver_data=ppd;
- goto success;
-
-error_file:
- printk(KERN_ERR "%s: class /sys file creation failed\n", DRIVER_NAME);
- unregister_sys_file(ppd);
-error_register:
- printk(KERN_ERR "%s: class registering failed\n", DRIVER_NAME);
- kfree(ppd);
-error_malloc:
- return rc;
-success:
- return 0;
-}
-
/*
* PWM interrupt handler (used in Play Mode only)
*/
@@ -909,53 +841,56 @@
{
u32 status;
int remaining = 0;
+ struct pwm_device *pwm = (struct pwm_device *) dev_id;
/* Acknowledge interrupt */
- status = PWMC;
-
- remaining = CIRC_CNT( gPWM_Circ_Buf.write, gPWM_Circ_Buf.read, gPWM_Circ_Buf.size );
+#ifdef CONFIG_ARCH_MX2
+ write_bits(PWM_FIFO_EMPTY, PWM_FIFO_EMPTY, pwm->membase + PWMSTATUS);
+#else
+ status = readl(pwm->membase + PWMSTATUS);
+#endif
+ remaining = CIRC_CNT( pwm->circ_buf.write, pwm->circ_buf.read, pwm->circ_buf.size );
if( remaining <= 1024 && remaining > 1021 ) { // TODO make it better (I think a test each consumed sample is the only accurate solution
// Can accept new data now
- wake_up_interruptible( &write_wait );
+ wake_up_interruptible( &pwm->write_wait );
}
/* End of sound buffer */
if( remaining < 3 ) {
- if(gDataLen == PWM_DATA_8BIT) {
+ if(pwm->dataLen == PWM_DATA_8BIT) {
while( remaining ) {
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
+ writel( (u32)(get_byte_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
/*PK("<1>(%d) pwm_int: PWMS = 0x%8x\n", gWriteCnt, PWMS);*/
remaining--;
}
} else { /* PWM_DATA_16BIT) */
while( remaining ) {
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
+ writel( (u32)(get_word_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
//PK("<1>(%d) pwm_int: PWMS = 0x%8x\n", gWriteCnt, PWMS);
remaining--;
}
}
-
- stop_pwm();
+ stop_pwm(pwm);
goto end;
}
/* Put sound samples in FIFO */
- if (gDataLen == PWM_DATA_8BIT) {
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- if (PWMC & PWMC_FIFOAV) { /* TODO: verify if needed */
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- g4bytes++;
+ if (pwm->dataLen == PWM_DATA_8BIT) {
+ writel( (u32)(get_byte_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ writel( (u32)(get_byte_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ writel( (u32)(get_byte_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ if ((readl(pwm->membase + PWMSTATUS) & PWM_FIFOAV) > 0) { /* TODO: verify if needed */
+ writel( (u32)(get_byte_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ pwm->nbbytes++;
}
} else { /* PWM_DATA_16BIT) */
// TODO: put good value in PWMC_BCTR to auto swap bytes if needed (do it at write or ioctl)
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- if (PWMC & PWMC_FIFOAV) { /* TODO: verify if needed */
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- g4bytes++;
+ writel( (u32)(get_word_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ writel( (u32)(get_word_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ writel( (u32)(get_word_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ if ((readl(pwm->membase + PWMSTATUS) & PWM_FIFOAV) > 0) { /* TODO: verify if needed */
+ writel( (u32)(get_word_from_circbuf( &pwm->circ_buf )), pwm->membase + PWMSAMPLE);
+ pwm->nbbytes++;
}
}
@@ -963,104 +898,142 @@
return(IRQ_HANDLED);
}
-static int __init pwm_init_from_probe(void)
-{
- int result;
-
- /* Register our char device */
- result = register_chrdev(0, DRIVER_NAME, &pwm_fops);
- if (result < 0) {
- printk("pwm driver: Unable to register driver\n");
- goto end;
- }
- /* Dynamic Major allocation */
- if (gMajor == 0) {
- gMajor = result;
- printk("PWM major number = %d\n",gMajor);
- }
-
- result = request_irq(PWM_INT, pwm_interrupt, IRQF_DISABLED, DEV_IRQ_NAME, DEV_IRQ_ID);
- if (result) {
- printk("<1>cannot init major= %d irq=%d\n", gMajor, irq);
- unregister_chrdev(gMajor, DRIVER_NAME);
- goto end;
- }
-
- /* init wait queue */
- init_waitqueue_head(&write_wait);
- init_waitqueue_head(&exit_wait);
- pr_debug("Wait queues initialized\n");
-
- /* init PWM hardware module */
- init_pwm();
-
- printk("i.MX PWM driver v" DRIVER_VERSION "\n");
-
-end:
- return( result );
-}
-
/**
* imx_pwm_drv_probe - claim resources
* @pdev: platform device to work with
- *
- * CAUTION: This functions rejects a PWM unit if its
- * not forwarded to any possible GPIO pin! In this case
- * it also returns -ENODEV
- *
- * Returns -ENODEV if there is no such device on this SoC, -EBUSY if this
- * resource is already claimed
*/
static int imx_pwm_drv_probe(struct platform_device *pdev)
{
int err=-ENODEV;
struct resource *res;
+ struct pwm_device *pwm;
+ struct imx_pwm_platform_data *pdata = pdev->dev.platform_data;
printk(KERN_INFO " Initializing PWM#%u...",pdev->id);
- switch( pdev->id )
- {
- /* PWM0 */
- case 0:
- // Check if GPIO was initialized ??
- break;
-
- default:
- printk(DRIVER_NAME " failed. Unknown PWM%u device. Remember that this device only supports 1 PWM\n", pdev->id);
- return err;
- break;
+ if( pdev->id >= PWM_MAX_DEV )
+ printk(DRIVER_NAME " failed. Unknown PWM%u device. Remember that this device only supports %d PWM\n", pdev->id, PWM_MAX_DEV);
+
+ if ( dev_table[pdev->id] != NULL ) {
+ printk(KERN_ERR ": already used\n");
+ return -ENODEV;
}
- if (unlikely(!(res = platform_get_resource(pdev, IORESOURCE_MEM, 0))))
- goto exit;
+ if (!pdata) {
+ printk(KERN_ERR "Platform data not supplied\n");
+ return -ENOENT;
+ }
- if (unlikely(!request_mem_region( res->start, res->end - res->start + 1, "imx-pwm" ))) {
+ if (unlikely((pwm = kmalloc(sizeof(struct pwm_device), GFP_KERNEL)) == NULL)) {
+ return -ENOMEM;
+ }
+ memset(&pwm->class_dev, 0, sizeof(struct device));
+ pwm->class_dev.class = &pwm_class;
+ pwm->class_dev.parent = &pdev->dev;
+ snprintf(pwm->class_dev.bus_id, BUS_ID_SIZE, "pwm%i", pdev->id);
+ pwm->active=0;
+ pwm->duty=500; /* = 50.O% */
+ pdev->dev.driver_data=pwm;
+ dev_table[pdev->id] = pwm;
+
+ pwm->irq = platform_get_irq(pdev, 0);
+ if (pwm->irq < 0) {
+ printk(KERN_ERR "No interrupt defined\n");
+ err = -ENOENT;
+ goto error_malloc;
+ }
+
+ if (unlikely(!(res = platform_get_resource(pdev, IORESOURCE_MEM, 0)))){
+ printk(KERN_ERR "Unable to get mem ressource\n");
+ err = -ENOENT;
+ goto error_malloc;
+ }
+
+ if (unlikely(!request_mem_region( res->start, res->end - res->start + 1, DRIVER_NAME ))) {
+ printk(KERN_ERR "Region busy\n");
err = -EBUSY;
- goto exit;
+ goto error_malloc;
}
- pwm_init_from_probe();
+ /* TODO: use iomap() */
+ pwm->membase = IO_ADDRESS(res->start);
+ /* Register our char device */
+ err = register_chrdev(gMajor, DRIVER_NAME, &pwm_fops);
+ if (err < 0) {
+ printk(KERN_ERR "pwm driver: Unable to register driver\n");
+ goto error_memreg;
+ }
+ /* Dynamic Major allocation */
+ if (gMajor == 0) {
+ gMajor = err;
+ printk("PWM major number = %d\n",gMajor);
+ }
+
+ err = request_irq(pwm->irq, pwm_interrupt, IRQF_DISABLED, DRIVER_NAME, pwm);
+ if (err) {
+ printk(KERN_ERR "<1>cannot init major= %d irq=%d\n", gMajor, pwm->irq);
+ goto error_chrdev;
+ }
+
+ /* init wait queue */
+ init_waitqueue_head(&pwm->write_wait);
+ init_waitqueue_head(&pwm->exit_wait);
+
+ /* init gpio */
+ if (pdata->init)
+ pdata->init();
+
/* Create /sys stuf */
- if (unlikely((err=init_userinterface(pdev,res->start))))
- goto release;
+ err = device_register(&pwm->class_dev);
+ if (unlikely(err)) goto error_irq;
- printk("done.\n");
+ /* Register the attributes */
+ err |= device_create_file(&pwm->class_dev, &dev_attr_duty);
+ if (unlikely(err)) goto error_register;
+ err |= device_create_file(&pwm->class_dev, &dev_attr_period);
+ if (unlikely(err)) goto error_file;
+ err |= device_create_file(&pwm->class_dev, &dev_attr_frequency);
+ if (unlikely(err)) goto error_file;
+ err |= device_create_file(&pwm->class_dev, &dev_attr_active);
+ if (unlikely(err)) goto error_file;
+
+#ifdef CONFIG_ARCH_MX2
+ pwm->clk = clk_get(&pdev->dev, "pwm_clk");
+ if (IS_ERR(pwm->clk)) {
+ printk(KERN_ERR "probe - cannot get clock\n");
+ goto error_file;
+ }
+ clk_enable(pwm->clk);
+#endif
+ /* init PWM hardware module */
+ init_pwm(pwm);
+
+ printk("i.MX PWM driver v" DRIVER_VERSION "\n");
return(0);
-release:
+error_file:
+ printk(KERN_ERR "%s: class /sys file creation failed\n", DRIVER_NAME);
+ unregister_sys_file(pwm);
+error_register:
+ device_unregister( &pwm->class_dev );
+error_irq:
+ free_irq(pwm->irq, pwm);
+error_chrdev:
+ unregister_chrdev(gMajor, DRIVER_NAME);
+error_memreg:
release_mem_region(res->start, res->end - res->start + 1);
-exit:
- printk(KERN_INFO "not available.\n");
+error_malloc:
+ kfree(pwm);
return err;
}
-static inline void unregister_sys_file( struct pwm_device *ppd )
+static inline void unregister_sys_file( struct pwm_device *pwm )
{
/* Unregister /sys attributes */
- device_remove_file( &ppd->class_dev, &dev_attr_active );
- device_remove_file( &ppd->class_dev, &dev_attr_period );
- device_remove_file( &ppd->class_dev, &dev_attr_frequency );
- device_remove_file( &ppd->class_dev, &dev_attr_duty );
+ device_remove_file( &pwm->class_dev, &dev_attr_active );
+ device_remove_file( &pwm->class_dev, &dev_attr_period );
+ device_remove_file( &pwm->class_dev, &dev_attr_frequency );
+ device_remove_file( &pwm->class_dev, &dev_attr_duty );
}
/**
@@ -1070,15 +1043,19 @@
static int imx_pwm_drv_remove (struct platform_device *pdev)
{
struct resource *res;
- struct pwm_device *ppd=(struct pwm_device*)pdev->dev.driver_data;
+ struct pwm_device *pwm=(struct pwm_device*)pdev->dev.driver_data;
+ struct imx_pwm_platform_data *pdata = pdev->dev.platform_data;
- unregister_sys_file(ppd);
- device_unregister( &ppd->class_dev );
- kfree(ppd);
-
+ unregister_sys_file(pwm);
+ device_unregister( &pwm->class_dev );
+ free_irq(pwm->irq, pwm);
+ unregister_chrdev(gMajor, DRIVER_NAME);
res = platform_get_resource( pdev, IORESOURCE_MEM, 0 );
release_mem_region( res->start, res->end - res->start + 1 );
-
+ kfree(pwm);
+ dev_table[pdev->id] = NULL;
+ if( pdata->exit() )
+ pdata->exit();
return 0;
}
@@ -1090,7 +1067,14 @@
*/
static int imx_pwm_drv_suspend (struct platform_device *pdev, pm_message_t state)
{
- printk("%s\n",__FUNCTION__);
+ struct pwm_device *pwm=(struct pwm_device*)pdev->dev.driver_data;
+ struct imx_pwm_platform_data *pdata = pdev->dev.platform_data;
+
+ clk_disable(pwm->clk);
+ dev_dbg(&pdev->dev, "suspended\n");
+ if( pdata->exit() )
+ pdata->exit();
+
return 0;
}
@@ -1100,7 +1084,13 @@
*/
static int imx_pwm_drv_resume (struct platform_device *pdev)
{
- printk("%s\n",__FUNCTION__);
+ struct pwm_device *pwm=(struct pwm_device*)pdev->dev.driver_data;
+ struct imx_pwm_platform_data *pdata = pdev->dev.platform_data;
+
+ clk_enable(pwm->clk);
+ dev_dbg(&pdev->dev, "resumed\n");
+ if( pdata->init() )
+ pdata->init();
return 0;
}
#else
@@ -1129,7 +1119,6 @@
},
};
-
static struct sysdev_class pwm_sysclass = {
.name = "pwm",
};
@@ -1178,15 +1167,13 @@
static void __exit imx_pwm_exit(void)
{
- disable_irq(PWM_INT); /* should be done before free_irq no ? */
- free_irq(PWM_INT, DEV_IRQ_ID);
- unregister_chrdev(gMajor, DRIVER_NAME);
-
+ int i;
platform_driver_unregister(&imx_pwm_driver);
sysdev_unregister(&pwm_sys_device);
sysdev_class_unregister(&pwm_sysclass);
class_unregister(&pwm_class);
-
+ for(i=0; i<PWM_MAX_DEV; i++)
+ dev_table[i] = NULL;
printk(DRIVER_NAME " successfully unloaded\n");
}
Modified: trunk/target/linux/modules/pwm/pwm.h
===================================================================
--- trunk/target/linux/modules/pwm/pwm.h 2009-04-14 09:01:37 UTC (rev 1215)
+++ trunk/target/linux/modules/pwm/pwm.h 2009-04-14 09:10:34 UTC (rev 1216)
@@ -43,5 +43,10 @@
#define PWM_PLAY_MODE 1
#define PWM_TONE_MODE 2
+
+struct imx_pwm_platform_data {
+ int (*init)(void);
+ int (*exit)(void);
+};
#endif
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <th...@us...> - 2009-04-14 09:01:45
|
Revision: 1215
http://armadeus.svn.sourceforge.net/armadeus/?rev=1215&view=rev
Author: thom25
Date: 2009-04-14 09:01:37 +0000 (Tue, 14 Apr 2009)
Log Message:
-----------
[LINUX] add specific PWM platform data
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/021-armadeus-apf9328.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/021-armadeus-apf9328.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/021-armadeus-apf9328.patch 2009-04-12 14:36:13 UTC (rev 1214)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/021-armadeus-apf9328.patch 2009-04-14 09:01:37 UTC (rev 1215)
@@ -3,7 +3,7 @@
(Take a look at armadeus/target/linux/ directory to know how to generate it)
--- linux-2.6.27.13.original/arch/arm/mach-imx/apf9328.c
+++ linux-2.6.27.13.mod/arch/arm/mach-imx/apf9328.c
-@@ -0,0 +1,731 @@
+@@ -0,0 +1,763 @@
+/*
+ * linux/arch/arm/mach-imx/apf9328.c
+ *
@@ -50,7 +50,7 @@
+#include <linux/spi/max1027.h>
+#include <linux/usb/isp116x.h>
+#include <mach/imx_ssi.h>
-+
++#include "../../../drivers/armadeus/pwm/pwm.h"
+#ifdef CONFIG_DM9000
+#include <linux/dm9000.h>
+#endif
@@ -75,6 +75,9 @@
+#ifdef CONFIG_ARMADEUS_ISP1761_MODULE
+#define CONFIG_ARMADEUS_ISP1761 1
+#endif
++#ifdef CONFIG_ARMADEUS_PWM_DRIVER_MODULE
++#define CONFIG_PWM
++#endif
+
+// --- ISP1761
+#ifdef CONFIG_ARMADEUS_ISP1761
@@ -166,8 +169,7 @@
+};
+#endif // CONFIG_DM9000
+
-+// --- PWM RESSOURCE ---
-+// I don't think it needs an ifdef - JB
++
+static struct resource pwm_resources[] = {
+ [0] = {
+ .start = (IMX_PWM_BASE),
@@ -181,13 +183,41 @@
+ },
+};
+
++#ifdef CONFIG_PWM
++static int apf9328_pwm_0_init(void)
++{
++ printk("setup gpio \n");
++ /* Init Port PA[2] : PWMO*/
++ DDIR(0) |= 0x00000002;
++ GIUS(0) &= ~0x00000002;
++ GPR(0) &= ~0x00000002;
++ return 0;
++}
++
++static int apf9328_pwm_0_exit(void)
++{
++ return 0;
++}
++
++static struct imx_pwm_platform_data apf9328_pwm_0_data = {
++ .init = apf9328_pwm_0_init,
++ .exit = apf9328_pwm_0_exit,
++};
++
+static struct platform_device imx_pwm_device = {
+ .name = "imx-pwm", // Should be the same as the driver name
+ .id = 0,
+ .num_resources = ARRAY_SIZE(pwm_resources),
+ .resource = pwm_resources,
++ .dev = {
++ .platform_data = &apf9328_pwm_0_data,
++ }
+};
+
++#endif
++
++
++
+#if defined(CONFIG_SND_IMX_TSC2102) || defined(CONFIG_SND_IMX_TSC2102_MODULE)
+int apf9328_ssi_gpio_init(struct platform_device *pdev)
+{
@@ -630,7 +660,9 @@
+ &imx_spi1,
+ &imx_spi2,
+#endif
++#ifdef CONFIG_PWM
+ &imx_pwm_device,
++#endif
+#ifdef CONFIG_IMX_BACKLIGHT
+ &imxbl_device,
+#endif
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <th...@us...> - 2009-04-12 14:36:15
|
Revision: 1214
http://armadeus.svn.sourceforge.net/armadeus/?rev=1214&view=rev
Author: thom25
Date: 2009-04-12 14:36:13 +0000 (Sun, 12 Apr 2009)
Log Message:
-----------
[LINUX] add pwm support to apf27
[LINUX] fix some pengu files related to the pwm
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-10 21:13:39 UTC (rev 1213)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-12 14:36:13 UTC (rev 1214)
@@ -5,7 +5,7 @@
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-08 15:48:50.000000000 +0200
-@@ -0,0 +1,1482 @@
+@@ -0,0 +1,1513 @@
+ /*
+ * apf27.c
+ *
@@ -64,6 +64,7 @@
+#include <linux/spi/max1027.h>
+#include <linux/spi/tsc2102.h>
+#include "../../../drivers/net/can/mcp251x.h"
++#include "../../../drivers/armadeus/pwm/pwm.h"
+#include <media/ad9889.h>
+#if defined(CONFIG_SND) || defined (CONFIG_SND_MODULE)
+#include <mach/imx_dam.h>
@@ -101,8 +102,33 @@
+#ifdef CONFIG_VIDEO_OV96xx_MODULE
+#define CONFIG_VIDEO_OV96xx 1
+#endif
++#ifdef CONFIG_ARMADEUS_PWM_DRIVER_MODULE
++#define CONFIG_PWM
++#endif
+
++#ifdef CONFIG_PWM
++static int mxc_pwm0_pins[] = {
++ PE5_PF_PWM0
++};
+
++static int apf27_pwm_0_init(void)
++{
++ return mxc_gpio_setup_multiple(mxc_pwm0_pins, ARRAY_SIZE(mxc_pwm0_pins), "PWM0");
++}
++
++static int apf27_pwm_0_exit(void)
++{
++ mxc_gpio_release_multiple(mxc_pwm0_pins, ARRAY_SIZE(mxc_pwm0_pins));
++ return 0;
++}
++
++static struct imx_pwm_platform_data apf27_pwm_0_data = {
++ .init = apf27_pwm_0_init,
++ .exit = apf27_pwm_0_exit,
++};
++#endif
++
++
+/*
+ * APF27 has a Micron 128MiB 1,8V NAND flash, 16 bits width
+ */
@@ -156,6 +182,7 @@
+ .init = apf27_i2c_1_init,
+ .exit = apf27_i2c_1_exit,
+};
++
+static struct i2c_board_info apf27_i2c_devices_bus0[] = {
+ [0] = {
+ .type = "ds1374",
@@ -1426,6 +1453,10 @@
+ mxc_register_device(&mxc_uart_device2, &uart_pdata[1]);
+ /*mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);*/
+ mxc_register_device(&mxc_nand_device, &apf27_nand_board_info);
++
++#ifdef CONFIG_PWM
++ mxc_register_device(&imx_pwm_device0, &apf27_pwm_0_data);
++#endif
+#ifdef CONFIG_WATCHDOG
+ mxc_register_device(&mxc_wdt, NULL);
+#endif
Added: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/321-apf27-armadeus-pengu_pwm_fix.patch 2009-04-12 14:36:13 UTC (rev 1214)
@@ -0,0 +1,82 @@
+Fix pwm clock
+Add pwm pin configuration
+Add pwm ressource
+
+Signed-off-by: Nicolas Colombain <nic...@ar...>
+Signed-off-by: Julien Boibessot <jul...@ar...>
+
+Index: linux-2.6.27.13/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h 2009-04-12 16:10:13.000000000 +0200
++++ linux-2.6.27.13/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h 2009-04-12 16:05:57.000000000 +0200
+@@ -372,8 +372,6 @@ extern void mxc_gpio_release_multiple(co
+ #define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_IN | GPIO_PF | 23)
+ #define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_OUT | GPIO_PF | 24)
+
+-
+-
+ #define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25)
+ #define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26)
+ #define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26)
+@@ -388,6 +386,7 @@ extern void mxc_gpio_release_multiple(co
+ #define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_OUT | GPIO_PF | 2)
+ #define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3)
+ #define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 4)
++#define PE5_PF_PWM0 (GPIO_PORTE | GPIO_OUT | GPIO_PF | 5)
+ #define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6)
+ #define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 7)
+ #define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 8)
+Index: linux-2.6.27.13/arch/arm/mach-mx2/devices.c
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/mach-mx2/devices.c 2009-04-12 16:10:13.000000000 +0200
++++ linux-2.6.27.13/arch/arm/mach-mx2/devices.c 2009-04-12 16:04:25.000000000 +0200
+@@ -637,6 +637,25 @@ struct platform_device mxc_ehci2 = {
+ .resource = mxc_ehci2_resources,
+ };
+
++static struct resource pwm_resources[] = {
++ [0] = {
++ .start = (PWM_BASE_ADDR),
++ .end = (PWM_BASE_ADDR + 0x14),
++ .flags = IORESOURCE_MEM,
++ },
++ [1] = {
++ .start = (MXC_INT_PWM),
++ .end = (MXC_INT_PWM),
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++struct platform_device imx_pwm_device0 = {
++ .name = "imx-pwm", // Should be the same as the driver name
++ .id = 0,
++ .num_resources = ARRAY_SIZE(pwm_resources),
++ .resource = pwm_resources,
++};
+
+ /* GPIO port description */
+ static struct mxc_gpio_port imx_gpio_ports[] = {
+Index: linux-2.6.27.13/arch/arm/mach-mx2/devices.h
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/mach-mx2/devices.h 2009-04-12 16:10:13.000000000 +0200
++++ linux-2.6.27.13/arch/arm/mach-mx2/devices.h 2009-04-12 16:05:02.000000000 +0200
+@@ -29,3 +29,4 @@ extern struct platform_device mxc_dam_de
+ extern struct platform_device mxc_otg;
+ extern struct platform_device mxc_ehci1;
+ extern struct platform_device mxc_ehci2;
++extern struct platform_device imx_pwm_device0;
+Index: linux-2.6.27.13/arch/arm/mach-mx2/clock_imx27.c
+===================================================================
+--- linux-2.6.27.13.orig/arch/arm/mach-mx2/clock_imx27.c 2009-04-12 16:10:12.000000000 +0200
++++ linux-2.6.27.13/arch/arm/mach-mx2/clock_imx27.c 2009-04-12 16:06:29.000000000 +0200
+@@ -921,7 +921,7 @@ static struct clk pwm_clk[] = {
+ .parent = &per_clk[0],
+ .secondary = &pwm_clk[1],
+ }, {
+- .name = "pwm_clk",
++ .name = "pwm_ipg_clk",
+ .parent = &ipg_clk,
+ .enable = _clk_enable,
+ .enable_reg = CCM_PCCR0,
+
+
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-10 21:13:50
|
Revision: 1213
http://armadeus.svn.sourceforge.net/armadeus/?rev=1213&view=rev
Author: artemys
Date: 2009-04-10 21:13:39 +0000 (Fri, 10 Apr 2009)
Log Message:
-----------
[LINUX] cleanup PWM driver before adding APF27 support (good luck nico ;-))
Modified Paths:
--------------
trunk/target/linux/modules/pwm/pwm.c
Modified: trunk/target/linux/modules/pwm/pwm.c
===================================================================
--- trunk/target/linux/modules/pwm/pwm.c 2009-04-10 12:08:02 UTC (rev 1212)
+++ trunk/target/linux/modules/pwm/pwm.c 2009-04-10 21:13:39 UTC (rev 1213)
@@ -1,5 +1,4 @@
/*
- *
* Driver for the i.MX PWM driver
*
* This driver is part of the Armadeus Project and is the merge of a lot of ideas
@@ -21,7 +20,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
- *
*/
//#define DEBUG 1
@@ -51,23 +49,23 @@
#include <linux/errno.h>
#include <linux/wait.h>
#include <linux/pm.h>
-// For /sys
+/* For /sys */
#include <linux/sysdev.h>
-// For struct class
+/* For struct class */
#include <linux/device.h>
-// For circular buffer
+/* For circular buffer */
#include <linux/circ_buf.h>
+
#include <mach/hardware.h>
+#include <linux/platform_device.h>
+#include "pwm.h"
+
// additional defines
#define PWMC_PRESCALER_MASK 0x00007F00
#define PWMC_REPEAT_MASK 0x0000000C
#define PWMC_CLKSEL_MASK 0x00000003
-//
-#include <linux/platform_device.h>
-#include "pwm.h"
-
#define PWM_TEST
#define DRIVER_NAME "imx-pwm"
@@ -81,10 +79,10 @@
struct pwm_device {
- u32 reg;
- int active;
- unsigned duty;
- /*const*/ struct pwm_table *entry;
+ u32 reg;
+ int active;
+ unsigned duty;
+ /*const*/ struct pwm_table *entry;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
struct class_device class_dev;
#else
@@ -97,10 +95,9 @@
#define to_pwm_device(d) container_of(d, struct pwm_device, class_dev)
-// Global variables
+/* Global variables */
int gPwmMode;
-//char *gpWriteBuf;
-int g4bytes; // count 4 bytes write occurence to FIFO
+int g4bytes; /* count 4 bytes write occurence to FIFO */
u8 *gpWriteBufPtr;
u16 *gpWriteBufPtr16;
int gDataLen = PWM_DATA_8BIT;
@@ -113,25 +110,25 @@
wait_queue_head_t exit_wait;
struct fasync_struct *ts_fasync;
-int gMajor = 0; /* TODO dynamic major for now */
+int gMajor = 0; /* TODO dynamic major for now */
typedef struct timer_list timer_blk_t;
typedef struct timerStruct
{
- timer_blk_t *timer_blk_ptr;
- int period;
- void (*timer_func)(unsigned long);
- int stop_flag;
+ timer_blk_t *timer_blk_ptr;
+ int period;
+ void (*timer_func)(unsigned long);
+ int stop_flag;
} PWM_Timer_t;
static PWM_Timer_t pwmTimer;
static timer_blk_t timer_blk;
struct pwm_table {
- long period; /* in us */
- unsigned max_period_val;
- unsigned prescaler;
+ long period; /* in us */
+ unsigned max_period_val;
+ unsigned prescaler;
};
struct pwm_table pwmdata;
@@ -139,66 +136,66 @@
* Ready to use calculations
*/
static const struct pwm_table pwm_table[]={
- {
- .period=1, /* 1 us */
- .max_period_val = 13,
- .prescaler=1,
- },
- {
- .period=5, /* 5 us */
- .max_period_val = 65,
- .prescaler=1,
- },
- {
- .period=10, /* 10 us */
- .max_period_val = 130,
- .prescaler=1,
- },
- {
- .period=20, /* 20 us */
- .max_period_val = 260,
- .prescaler=1,
- },
- {
- .period=50, /* 50 us */
- .max_period_val = 650,
- .prescaler=1,
- },
- {
- .period=100, /* 100 us */
- .max_period_val = 650,
- .prescaler=2,
- },
- {
- .period=500, /* 500 us */
- .max_period_val = 929,
- .prescaler=7,
- },
- {
- .period=1000, /* 1ms */
- .max_period_val = 1000,
- .prescaler=13,
- },
- {
- .period=2000, /* 2ms */
- .max_period_val = 1000,
- .prescaler=26,
- },
- {
- .period=3000, /* 3ms */
- .max_period_val = 1000,
- .prescaler=39,
- },
- {
- .period=4000, /* 4ms */
- .max_period_val = 1020,
- .prescaler=51,
- },
- {
- .period=5000, /* 5ms */
- .max_period_val = 1016,
- .prescaler=64,
- }
+ {
+ .period=1, /* 1 us */
+ .max_period_val = 13,
+ .prescaler=1,
+ },
+ {
+ .period=5, /* 5 us */
+ .max_period_val = 65,
+ .prescaler=1,
+ },
+ {
+ .period=10, /* 10 us */
+ .max_period_val = 130,
+ .prescaler=1,
+ },
+ {
+ .period=20, /* 20 us */
+ .max_period_val = 260,
+ .prescaler=1,
+ },
+ {
+ .period=50, /* 50 us */
+ .max_period_val = 650,
+ .prescaler=1,
+ },
+ {
+ .period=100, /* 100 us */
+ .max_period_val = 650,
+ .prescaler=2,
+ },
+ {
+ .period=500, /* 500 us */
+ .max_period_val = 929,
+ .prescaler=7,
+ },
+ {
+ .period=1000, /* 1ms */
+ .max_period_val = 1000,
+ .prescaler=13,
+ },
+ {
+ .period=2000, /* 2ms */
+ .max_period_val = 1000,
+ .prescaler=26,
+ },
+ {
+ .period=3000, /* 3ms */
+ .max_period_val = 1000,
+ .prescaler=39,
+ },
+ {
+ .period=4000, /* 4ms */
+ .max_period_val = 1020,
+ .prescaler=51,
+ },
+ {
+ .period=5000, /* 5ms */
+ .max_period_val = 1016,
+ .prescaler=64,
+ }
};
/****************************************************************
@@ -206,39 +203,39 @@
***************************************************************/
struct sound_circ_buf {
- char* buf;
- int write; // == head
- int read; // == tail
- int size;
+ char* buf;
+ int write; /* == head */
+ int read; /* == tail */
+ int size;
};
static inline u8 get_byte_from_circbuf( struct sound_circ_buf* abuffer )
{
- u8 b = abuffer->buf[ abuffer->read ];
- abuffer->read = (abuffer->read + 1) & (abuffer->size - 1);
- return b;
+ u8 b = abuffer->buf[ abuffer->read ];
+ abuffer->read = (abuffer->read + 1) & (abuffer->size - 1);
+ return b;
}
static inline u16 get_word_from_circbuf( struct sound_circ_buf* abuffer )
{
- u16 w = *((u16*)(&(abuffer->buf[ abuffer->read ])));
- abuffer->read = (abuffer->read + 2) & (abuffer->size - 1);
- return w;
+ u16 w = *((u16*)(&(abuffer->buf[ abuffer->read ])));
+ abuffer->read = (abuffer->read + 2) & (abuffer->size - 1);
+ return w;
}
static inline void put_byte_to_circbuf( struct sound_circ_buf* abuffer, unsigned char abyte )
{
- abuffer->buf[ abuffer->write ] = abyte;
- abuffer->write = (abuffer->write + 1) & (abuffer->size - 1);
+ abuffer->buf[ abuffer->write ] = abyte;
+ abuffer->write = (abuffer->write + 1) & (abuffer->size - 1);
}
static inline void increase_circbuf( struct sound_circ_buf* abuffer, int count )
{
- abuffer->write = (abuffer->write + count) & (abuffer->size - 1);
- pr_debug("Added %d bytes to buffer, now write is in pos %d\n", count, abuffer->write);
+ abuffer->write = (abuffer->write + count) & (abuffer->size - 1);
+ pr_debug("Added %d bytes to buffer, now write is in pos %d\n", count, abuffer->write);
}
-#define MAX_SOUND_BUFFER_SIZE (16*1024) // !! Should be a power of 2 !!
+#define MAX_SOUND_BUFFER_SIZE (16*1024) /* !! Should be a power of 2 !! */
static struct sound_circ_buf gPWM_Circ_Buf;
/****************************************************************
@@ -254,111 +251,66 @@
*/
static void setup_pwm_unit(struct pwm_device *ppd)
{
- if (ppd->entry == NULL)
- return; /* do nothing, not fully configured yet */
+ if (ppd->entry == NULL)
+ return; /* do nothing, not fully configured yet */
- if (ppd->active)
- {
- // Activate PWM
- PWMC |= PWMC_EN;
-
- // Setup prescaler
- pr_debug("Updating PWM registers\n");
- PWMC = (PWMC & ~PWMC_PRESCALER_MASK) | PWMC_PRESCALER(ppd->entry->prescaler) /*| PWMC_REPEAT(3)*/;
-
- // Setup period
- PWMP = PWMP_PERIOD(ppd->entry->period);
-
- // Setup duty
- PWMS = PWMS_SAMPLE( (u32) ((ppd->entry->period * ppd->duty) / 1000) );
-/* unsigned duty;
-
- if (ppd->duty == MAX_DUTY)
- duty=ppd->entry->max_period_val-1; // FIXME: Solve with bit 10 in this register
- else
- duty=((ppd->entry->max_period_val-1)*ppd->duty)/MAX_DUTY;
-*/
-
- }
- else
- {
- // De-activate
- PWMC &= ~PWMC_EN;
- }
+ if (ppd->active) {
+ /* Activate PWM */
+ PWMC |= PWMC_EN;
+ /* Setup prescaler */
+ pr_debug("Updating PWM registers\n");
+ PWMC = (PWMC & ~PWMC_PRESCALER_MASK) | PWMC_PRESCALER(ppd->entry->prescaler) /*| PWMC_REPEAT(3)*/;
+ /* Setup period */
+ PWMP = PWMP_PERIOD(ppd->entry->period);
+ /* Setup duty cycle */
+ PWMS = PWMS_SAMPLE( (u32) ((ppd->entry->period * ppd->duty) / 1000) );
+ } else {
+ /* De-activate */
+ PWMC &= ~PWMC_EN;
+ }
}
-/******************************************************************************
- * Function Name: checkDevice
- *
- * Input: inode :
- * Value Returned: int : Return status.If no error, return 0.
- *
- * Description: verify if the inode is a correct inode
- *
- * Modification History:
- * 10 DEC,2001,
- *****************************************************************************/
-// static int checkDevice(struct inode *pInode)
-// {
-// int minor;
-// kdev_t dev = pInode->i_rdev;
-//
-// if( MAJOR(dev) != gMajor)
-// {
-// PK("<1>checkDevice bad major = %d\n",MAJOR(dev) );
-// return -1;
-// }
-// minor = MINOR(dev);
-//
-// if ( minor < MAX_ID )
-// return minor;
-// else
-// {
-// PK("<1>checkDevice bad minor = %d\n",minor );
-// return -1;
-// }
-// }
-
/* timer */
-int CreateTimer(PWM_Timer_t *timer)
+static int create_timer(PWM_Timer_t *timer)
{
- init_timer(timer->timer_blk_ptr);
- timer->timer_blk_ptr->function = timer->timer_func;
+ init_timer(timer->timer_blk_ptr);
+ timer->timer_blk_ptr->function = timer->timer_func;
- return(0);
+ return(0);
}
-int StartTimer(PWM_Timer_t *timer)
+static int start_timer(PWM_Timer_t *timer)
{
- timer->timer_blk_ptr->expires = jiffies + timer->period;
- timer->stop_flag = 0;
+ timer->timer_blk_ptr->expires = jiffies + timer->period;
+ timer->stop_flag = 0;
- add_timer((struct timer_list *)timer->timer_blk_ptr);
+ add_timer((struct timer_list *)timer->timer_blk_ptr);
- return(0);
+ return(0);
}
-int StopTimer(PWM_Timer_t *timer)
+
+static int stop_timer(PWM_Timer_t *timer)
{
- timer->stop_flag = 1;
- del_timer_sync((struct timer_list *)timer->timer_blk_ptr);
+ timer->stop_flag = 1;
+ del_timer_sync((struct timer_list *)timer->timer_blk_ptr);
- return(0);
+ return(0);
}
-static void StopPwm(void)
+static void stop_pwm(void)
{
- PWMC &= ~PWMC_IRQEN; // disable IRQ
- PWMC &= ~PWMC_EN; // disable PWM
+ PWMC &= ~PWMC_IRQEN; /* disable IRQ */
+ PWMC &= ~PWMC_EN; /* disable PWM */
- gSampleValue = 0;
- if(gPwmMode == PWM_TONE_MODE)
- StopTimer(&pwmTimer);
+ gSampleValue = 0;
+ if(gPwmMode == PWM_TONE_MODE)
+ StopTimer(&pwmTimer);
- // Can release file now
- wake_up_interruptible(&exit_wait);
+ /* Can release file now */
+ wake_up_interruptible(&exit_wait);
- PK("<1>data completed.\n");
- PK("<1>PWMC = 0x%8x\n", (u32)PWMC);
+ PK("<1>data completed.\n");
+ PK("<1>PWMC = 0x%8x\n", (u32)PWMC);
}
static void pwmIntFunc( unsigned long unused)
@@ -389,81 +341,50 @@
}
-// static int handle_pm_event(struct pm_dev *dev, pm_request_t rqst, void *data)
-// {
-// switch(rqst)
-// {
-// case PM_SUSPEND:
-// PK("<1> PM suspend event received in PWM device.\n");
-// StopPwm();
-// break;
-//
-// case PM_RESUME:
-// PK("<1> PM resume event received in PWM device.\n");
-// break;
-//
-// default:
-// break;
-// }
-// return 0;
-// }
-
-/******************************************************************************
- *
- *****************************************************************************/
-static int initPWM(void)
+static int init_pwm(void)
{
- // Init Port PA[2] : PWMO
- // Should be done in apf9328.c non ???
- DDIR(0) |= 0x00000002;
- GIUS(0) &= ~0x00000002;
- GPR(0) &= ~0x00000002;
+ /* Init Port PA[2] : PWMO
+ Should be done in apf9328.c non ??? */
+ DDIR(0) |= 0x00000002;
+ GIUS(0) &= ~0x00000002;
+ GPR(0) &= ~0x00000002;
- // Software reset
- PWMC |= PWMC_SWR;
- udelay(10);
- // Activate & de-activate PWM (seems to be necessary after a reset)
- PWMC |= PWMC_EN; PWMC &= ~PWMC_EN;
+ /* Software reset */
+ PWMC |= PWMC_SWR;
+ udelay(10);
+ /* Activate & de-activate PWM (seems to be necessary after a reset) */
+ PWMC |= PWMC_EN; PWMC &= ~PWMC_EN;
- // Enable interrupt
- //PWMC |= PWMC_IRQEN;
+ /* Enable interrupt */
+ //PWMC |= PWMC_IRQEN;
- return 1;
+ return 1;
}
//////////////////////////////////////// /DEV INTERFACE ////////////////////////////////////////////
-/*
- * Called from user space close()
- */
int pwm_release(struct inode * inode, struct file * filp)
{
- // wait unit gWriteCnt == 0
- interruptible_sleep_on(&exit_wait);
-
- if( gPWM_Circ_Buf.buf ) {
- kfree( gPWM_Circ_Buf.buf );
- gPWM_Circ_Buf.buf = 0;
- }
- printk(DRIVER_NAME " released, 4 bytes FIFO usage: %d\n", g4bytes);
- return 0;
+ // wait unit gWriteCnt == 0
+ interruptible_sleep_on(&exit_wait);
+
+ if( gPWM_Circ_Buf.buf ) {
+ kfree( gPWM_Circ_Buf.buf );
+ gPWM_Circ_Buf.buf = 0;
+ }
+ printk(DRIVER_NAME " released, 4 bytes FIFO usage: %d\n", g4bytes);
+ return 0;
}
-/*
- * Called from user space open()
- */
int pwm_open(struct inode * inode, struct file * filp)
{
- // Init PWM hardware
- initPWM();
-
- pr_debug(DRIVER_NAME " opened \n");
- return 0;
+ /* Init PWM hardware */
+ init_pwm();
+
+ pr_debug(DRIVER_NAME " opened \n");
+ return 0;
}
-/*
- *
- */
static int pwm_fasync(int fd, struct file *filp, int mode)
{
PK("<1>in pwm_fasyn ----\n");
@@ -481,238 +402,213 @@
return 0;
}
-/*
- * Called from user space ioctl()
- */
int pwm_ioctl(struct inode * inode, struct file *filp, unsigned int cmd, unsigned long arg)
{
- char *str=NULL;
- int ret = 0;
+ char *str=NULL;
+ int ret = 0;
- pr_debug("pwm_ioctl ----\n");
- switch(cmd)
- {
- // Set PWM Mode (Tone or Playback)
- case PWM_IOC_SMODE:
- {
- gPwmMode = arg;
+ pr_debug("pwm_ioctl ----\n");
+ switch(cmd)
+ {
+ /* Set PWM Mode (Tone or Playback) */
+ case PWM_IOC_SMODE:
+ {
+ gPwmMode = arg;
+
+ if (gPwmMode == PWM_TONE_MODE) {
+ /* create periodic timer when tone mode */
+ pr_debug("PWM Tone Mode.\n");
+ pwmTimer.timer_blk_ptr = &timer_blk;
+ pwmTimer.timer_func = pwmIntFunc;
+ create_timer(&pwmTimer);
+ } else {
+ pr_debug("PWM Play Mode.\n");
+ }
+ }
+ break;
- if (gPwmMode == PWM_TONE_MODE)
- {
- // create periodic timer when tone mode
- pr_debug("PWM Tone Mode.\n");
- pwmTimer.timer_blk_ptr = &timer_blk;
- pwmTimer.timer_func = pwmIntFunc;
- CreateTimer(&pwmTimer);
- }
- else
- {
- pr_debug("PWM Play Mode.\n");
- }
- }
- break;
+ /* Set Playback frequency/ouput rate */
+ case PWM_IOC_SFREQ:
+ {
+ PWMC &= ~PWMC_EN; // Disable PWM
+ PWMC &= ~PWMC_CLKSRC; // Select 16MHz PERCLK1 as CLK source
+ PWMC &= ~PWMC_PRESCALER_MASK; // PRESCALER = 0 => use full 16MHz
+
+ switch(arg)
+ {
+ case PWM_SAMPLING_32KHZ:
+ PWMC &= ~PWMC_REPEAT_MASK; // REPEAT = 0 => divide by 1
+ PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
+ /* 16MHz/256/1/2 = 32768 */
+ str = "32Khz";
+ break;
+ case PWM_SAMPLING_16KHZ:
+ PWMC &= ~PWMC_REPEAT_MASK;
+ PWMC |= PWMC_REPEAT(1); // REPEAT = 01 => divide by 2
+ PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
+ /* 16MHz/256/2/2 = 16384 */
+ str = "16Khz";
+ break;
+
+ case PWM_SAMPLING_8KHZ:
+ default:
+ PWMC &= ~PWMC_REPEAT_MASK;
+ PWMC |= PWMC_REPEAT(2); // REPEAT = 10 => divide by 4
+ PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
+ /* 16MHz/256/4/2 = 8192 */
+ str = "8Khz";
+ break;
+ }
+ pr_debug("Sample rate = %s\n", str);
+ pr_debug("ioctl: PWMC = 0x%8x\n", PWMC);
+ }
+ break;
- // Set Playback frequency/ouput rate
- case PWM_IOC_SFREQ:
- {
- PWMC &= ~PWMC_EN; // Disable PWM
- PWMC &= ~PWMC_CLKSRC; // Select 16MHz PERCLK1 as CLK source
- PWMC &= ~PWMC_PRESCALER_MASK; // PRESCALER = 0 => use full 16MHz
+ /* Set samples length (8 or 16 bits) */
+ case PWM_IOC_SDATALEN:
+ {
+ gDataLen = arg;
+ if (arg == PWM_DATA_8BIT) {
+ PWMP = 0xfe; /* Period, 8bit */
+ str = "8bit";
+ } else { /* if(arg == PWM_DATA_16BIT) */
+ PWMP = 0xfffe; /* Period, 16bit */
+ str = "16bit";
+ }
+ pr_debug("Data Length = %s\n", str);
+ }
+ break;
- switch(arg)
- {
- case PWM_SAMPLING_32KHZ:
- PWMC &= ~PWMC_REPEAT_MASK; // REPEAT = 0 => divide by 1
- PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
- // 16MHz/256/1/2 = 32768
- str = "32Khz";
- break;
- case PWM_SAMPLING_16KHZ:
- PWMC &= ~PWMC_REPEAT_MASK;
- PWMC |= PWMC_REPEAT(1); // REPEAT = 01 => divide by 2
- PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
- // 16MHz/256/2/2 = 16384
- str = "16Khz";
- break;
- case PWM_SAMPLING_8KHZ:
- default:
- PWMC &= ~PWMC_REPEAT_MASK;
- PWMC |= PWMC_REPEAT(2); // REPEAT = 10 => divide by 4
- PWMC &= ~PWMC_CLKSEL_MASK; // CLKSEL = 0 => divide by 2
- // 16MHz/256/4/2 = 8192
- str = "8Khz";
- break;
- }
- pr_debug("Sample rate = %s\n", str);
- pr_debug("ioctl: PWMC = 0x%8x\n", PWMC);
- }
- break;
+ case PWM_IOC_SSAMPLE:
+ gSampleValue = arg;
+ break;
- // Set samples length (8 or 16 bits)
- case PWM_IOC_SDATALEN:
- {
- gDataLen = arg;
- if( arg == PWM_DATA_8BIT )
- {
- PWMP = 0xfe; // Period, 8bit
- str = "8bit";
- }
- else // if(arg == PWM_DATA_16BIT)
- {
- PWMP = 0xfffe; // Period, 16bit
- str = "16bit";
- }
+ case PWM_IOC_SPERIOD:
+ if (gPwmMode == PWM_TONE_MODE)
+ {
+ PK("<1>PWM period = %d\n",(int)arg);
+ pwmTimer.period = arg/12;
+ }
+ break;
- pr_debug("Data Length = %s\n", str);
- }
- break;
+ case PWM_IOC_STOP:
+ stop_pwm();
+ break;
- case PWM_IOC_SSAMPLE:
- gSampleValue = arg;
- break;
+ case PWM_IOC_SWAPDATA:
+ if (arg&PWM_SWAP_HCTRL) { /* Halfword FIFO data swapping */
+ PWMC |= PWMC_HCTR;
+ } else {
+ PWMC &= ~PWMC_HCTR;
+ }
+
+ if (arg & PWM_SWAP_BCTRL) { /* Byte FIFO data swapping */
+ PWMC |= PWMC_BCTR;
+ } else {
+ PWMC &= ~PWMC_BCTR;
+ }
+ break;
- case PWM_IOC_SPERIOD:
- if (gPwmMode == PWM_TONE_MODE)
- {
- PK("<1>PWM period = %d\n",(int)arg);
- pwmTimer.period = arg/12;
- }
- break;
+ default:
+ printk( DRIVER_NAME ": unkown IOCTL\n");
+ break;
+ }
- case PWM_IOC_STOP:
- StopPwm();
- break;
-
- case PWM_IOC_SWAPDATA:
- if (arg&PWM_SWAP_HCTRL) //Halfword FIFO data swapping
- {
- PWMC |= PWMC_HCTR;
- }
- else
- {
- PWMC &= ~PWMC_HCTR;
- }
-
- if (arg&PWM_SWAP_BCTRL) //Byte FIFO data swapping
- {
- PWMC |= PWMC_BCTR;
- }
- else
- {
- PWMC &= ~PWMC_BCTR;
- }
- break;
-
- default:
- printk( DRIVER_NAME ": unkown IOCTL\n");
- break;
- }
-
- return ret;
+ return ret;
}
-/******************************************************************************
- * Called from user space read()
- *
- *****************************************************************************/
ssize_t pwm_read(struct file * filp, char * buf, size_t count, loff_t * l)
{
- int ret = 0;
+ int ret = 0;
- if( PWMC & PWMC_IRQEN )
- ret = 1; // no data
- else
- ret = 0; // processing data
+ if (PWMC & PWMC_IRQEN)
+ ret = 1; /* no data */
+ else
+ ret = 0; /* processing data */
- pr_debug("pwm_read ----\n");
- return ret;
+ pr_debug("pwm_read ----\n");
+
+ return ret;
}
-/******************************************************************************
- * Called from user space write()
- *
- *****************************************************************************/
static ssize_t pwm_write( struct file *filp, const char *buf, size_t count, loff_t *f_pos )
{
- int ret = 0;
- int remaining_space = 0;
+ int ret = 0;
+ int remaining_space = 0;
- pr_debug( "pwm_write ----\n" );
+ pr_debug( "pwm_write ----\n" );
- if( count > MAX_SOUND_BUFFER_SIZE )
- count = MAX_SOUND_BUFFER_SIZE;
- // First time, allocate the double buffer
- if( !gPWM_Circ_Buf.buf ) {
- gPWM_Circ_Buf.buf = kmalloc( count*2, GFP_KERNEL );
- if( !gPWM_Circ_Buf.buf ) {
- goto out;
- } else {
- // Initialize circular buffer
- gPWM_Circ_Buf.read = 0;
- gPWM_Circ_Buf.write = 0;
- gPWM_Circ_Buf.size = MAX_SOUND_BUFFER_SIZE*2;
- }
- }
+ if (count > MAX_SOUND_BUFFER_SIZE)
+ count = MAX_SOUND_BUFFER_SIZE;
+ /* First time, allocate the double buffer */
+ if (!gPWM_Circ_Buf.buf) {
+ gPWM_Circ_Buf.buf = kmalloc( count*2, GFP_KERNEL );
+ if (!gPWM_Circ_Buf.buf) {
+ goto out;
+ } else {
+ /* Initialize circular buffer */
+ gPWM_Circ_Buf.read = 0;
+ gPWM_Circ_Buf.write = 0;
+ gPWM_Circ_Buf.size = MAX_SOUND_BUFFER_SIZE*2;
+ }
+ }
- // If there is enough space at the end of the buffer for all data in one copy, do it
- remaining_space = gPWM_Circ_Buf.size - gPWM_Circ_Buf.write;
- pr_debug("Remaining space to end: %d, must write: %d \n", remaining_space, count);
- if( remaining_space >= count ) {
- // Get data from UserSpace
- if( copy_from_user( gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write , buf, count ) ) {
- ret = -EFAULT; goto out;
- }
- increase_circbuf( &gPWM_Circ_Buf, count );
- // if not enough space, then
- } else {
- // Do it in 2 times
- if( copy_from_user( gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write, buf, remaining_space ) ) {
- ret = -EFAULT; goto out;
- }
- increase_circbuf( &gPWM_Circ_Buf, remaining_space );
- if( copy_from_user( gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write, buf, count - remaining_space ) ) {
- ret = -EFAULT; goto out;
- }
- increase_circbuf( &gPWM_Circ_Buf, count - remaining_space );
- }
+ /* If there is enough space at the end of the buffer for all data in one copy, do it */
+ remaining_space = gPWM_Circ_Buf.size - gPWM_Circ_Buf.write;
+ pr_debug("Remaining space to end: %d, must write: %d \n", remaining_space, count);
+ if (remaining_space >= count) {
+ // Get data from UserSpace
+ if( copy_from_user( gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write , buf, count ) ) {
+ ret = -EFAULT; goto out;
+ }
+ increase_circbuf( &gPWM_Circ_Buf, count );
+ /* if not enough space, then */
+ } else {
+ /* Do it in 2 times */
+ if (copy_from_user(gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write, buf, remaining_space)) {
+ ret = -EFAULT; goto out;
+ }
+ increase_circbuf( &gPWM_Circ_Buf, remaining_space );
+ if (copy_from_user(gPWM_Circ_Buf.buf + gPWM_Circ_Buf.write, buf, count - remaining_space)) {
+ ret = -EFAULT; goto out;
+ }
+ increase_circbuf(&gPWM_Circ_Buf, count - remaining_space);
+ }
- // Enable PWM
- PWMC |= PWMC_EN; PWMS = 0x00000000;
+ /* Enable PWM */
+ PWMC |= PWMC_EN;
+ PWMS = 0x00000000;
- if( gPwmMode == PWM_PLAY_MODE )
- {
- PWMC |= PWMC_IRQEN; // Enable IRQ
- }
- else
- {
- PWMS = gSampleValue;
- PWMC |= 0x7f00; // set prescaler to 128
-/* gpWriteBufPtr16 = (u16*)gpWriteBuf;
- gWriteCnt /= 2; //input size is 8bit size, need /2 to get 16bit size
- StartTimer( &pwmTimer );*/
- }
+ if (gPwmMode == PWM_PLAY_MODE) {
+ PWMC |= PWMC_IRQEN; /* Enable IRQ */
+ } else {
+ PWMS = gSampleValue;
+ PWMC |= 0x7f00; /* set prescaler to 128 */
+ /* gpWriteBufPtr16 = (u16*)gpWriteBuf;
+ gWriteCnt /= 2; //input size is 8bit size, need /2 to get 16bit size
+ StartTimer( &pwmTimer );*/
+ }
- // Calculate how much space is left in buffer
- remaining_space = CIRC_SPACE( gPWM_Circ_Buf.write, gPWM_Circ_Buf.read, gPWM_Circ_Buf.size );
- pr_debug("Space left: %d\n", remaining_space);
- if( remaining_space < count ) {
- // Pauses user app until interrupt handler has consumed some data
- interruptible_sleep_on( &write_wait );
- }
+ /* Calculate how much space is left in buffer */
+ remaining_space = CIRC_SPACE(gPWM_Circ_Buf.write, gPWM_Circ_Buf.read, gPWM_Circ_Buf.size);
+ pr_debug("Space left: %d\n", remaining_space);
+ if (remaining_space < count) {
+ /* Pauses user app until interrupt handler has consumed some data */
+ interruptible_sleep_on(&write_wait);
+ }
out:
- pr_debug( "out pwm_write PWMC = 0x%8x ----\n", PWMC );
- return count;
+ pr_debug( "out pwm_write PWMC = 0x%8x ----\n", PWMC );
+ return count;
}
-
struct file_operations pwm_fops = {
- open: pwm_open,
- release: pwm_release,
- read: pwm_read,
- write: pwm_write,
- ioctl: pwm_ioctl,
- fasync: pwm_fasync
+ open: pwm_open,
+ release: pwm_release,
+ read: pwm_read,
+ write: pwm_write,
+ ioctl: pwm_ioctl,
+ fasync: pwm_fasync
};
/////////////////////////////////////// END OF /DEV INTERFACE /////////////////////////////////////////////////////////
@@ -725,11 +621,12 @@
*/
static ssize_t pwm_show_duty(struct device *dev, struct device_attribute *attr, char *buf)
{
- ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ ssize_t ret_size = 0;
+ struct pwm_device *ppd = to_pwm_device(dev);
- ret_size=sprintf(buf,"%u",ppd->duty);
- return ret_size;
+ ret_size=sprintf(buf,"%u",ppd->duty);
+
+ return ret_size;
}
/**
@@ -747,17 +644,17 @@
*/
static ssize_t pwm_store_duty(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
- long value;
- struct pwm_device *ppd = to_pwm_device(dev);
+ long value;
+ struct pwm_device *ppd = to_pwm_device(dev);
- value = simple_strtol(buf, NULL, 10);
- if ((value < 1) || (value > 999))
- return -EIO;
+ value = simple_strtol(buf, NULL, 10);
+ if ((value < 1) || (value > 999))
+ return -EIO;
- ppd->duty=(unsigned)value;
+ ppd->duty=(unsigned)value;
+ setup_pwm_unit(ppd);
- setup_pwm_unit(ppd);
- return size;
+ return size;
}
/**
@@ -767,15 +664,15 @@
*/
static ssize_t pwm_show_period(struct device *dev, struct device_attribute *attr, char *buf)
{
- ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ ssize_t ret_size = 0;
+ struct pwm_device *ppd = to_pwm_device(dev);
- if (ppd->entry) /* already initialized? */
- ret_size=sprintf(buf,"%ld",ppd->entry->period);
- else
- ret_size=sprintf(buf,"0");
+ if (ppd->entry) /* already initialized? */
+ ret_size=sprintf(buf,"%ld",ppd->entry->period);
+ else
+ ret_size=sprintf(buf,"0");
- return ret_size;
+ return ret_size;
}
/**
@@ -808,13 +705,13 @@
#define PWM_MAX_FREQUENCY 100000 // Hz
static ssize_t pwm_store_period(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
- long value/*,i*/;
- struct pwm_device *ppd = to_pwm_device(dev);
+ long value/*,i*/;
+ struct pwm_device *ppd = to_pwm_device(dev);
+
+ value = simple_strtol(buf, NULL, 10);
+ if ((value < PWM_MIN_PERIOD) && (value > PWM_MAX_PERIOD))
+ return -EIO;
- value = simple_strtol(buf, NULL, 10);
- if ((value < PWM_MIN_PERIOD) && (value > PWM_MAX_PERIOD))
- return -EIO;
-
/* for( i=0; i<ARRAY_SIZE(pwm_table); i++ )
{
if (pwm_table[i].period >= value)
@@ -823,16 +720,16 @@
if (i==ARRAY_SIZE(pwm_table)) // period not found in table?
return -EIO;
- ppd->entry=&pwm_table[i];*/
- ppd->entry=&pwmdata;
- ppd->entry->period = value;
- ppd->entry->prescaler = 8; // 1us / tick if CLKSEL is = 0
- ppd->entry->max_period_val = value;
- /*printk(KERN_INFO "New period should be %ld us, and is %ld us\n",
- value,ppd->entry->period);*/
+ ppd->entry=&pwm_table[i];*/
+ ppd->entry=&pwmdata;
+ ppd->entry->period = value;
+ ppd->entry->prescaler = 8; // 1us / tick if CLKSEL is = 0
+ ppd->entry->max_period_val = value;
+ /*printk(KERN_INFO "New period should be %ld us, and is %ld us\n",
+ value,ppd->entry->period);*/
- setup_pwm_unit(ppd);
- return size;
+ setup_pwm_unit(ppd);
+ return size;
}
/**
@@ -842,15 +739,15 @@
*/
static ssize_t pwm_show_frequency(struct device *dev, struct device_attribute *attr, char *buf)
{
- ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ ssize_t ret_size = 0;
+ struct pwm_device *ppd = to_pwm_device(dev);
- if (ppd->entry)
- ret_size = sprintf( buf,"%ld", (u32) 1000000/(ppd->entry->period) );
- else
- ret_size = sprintf(buf,"0");
+ if (ppd->entry)
+ ret_size = sprintf(buf,"%ld", (u32) 1000000/(ppd->entry->period));
+ else
+ ret_size = sprintf(buf,"0");
- return ret_size;
+ return ret_size;
}
/**
@@ -867,24 +764,24 @@
static ssize_t pwm_store_frequency(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
- long value;
- struct pwm_device *ppd = to_pwm_device(dev);
+ long value;
+ struct pwm_device *ppd = to_pwm_device(dev);
- value = simple_strtol(buf, NULL, 10);
- if( (value < PWM_MIN_FREQUENCY) && (value > PWM_MAX_FREQUENCY) )
- return -EIO;
+ value = simple_strtol(buf, NULL, 10);
+ if( (value < PWM_MIN_FREQUENCY) && (value > PWM_MAX_FREQUENCY) )
+ return -EIO;
- // Convert frequency into period
- value = (u32) (1000000 / value);
- //
- ppd->entry=&pwmdata;
- ppd->entry->period = value;
- ppd->entry->prescaler = 8; // 1us / tick if CLKSEL is = 0
- ppd->entry->max_period_val = value;
- // Update hardware
- setup_pwm_unit(ppd);
+ /* Convert frequency into period */
+ value = (u32) (1000000 / value);
- return( size );
+ ppd->entry=&pwmdata;
+ ppd->entry->period = value;
+ ppd->entry->prescaler = 8; /* 1us / tick if CLKSEL is = 0 */
+ ppd->entry->max_period_val = value;
+ /* Update hardware */
+ setup_pwm_unit(ppd);
+
+ return( size );
}
/**
@@ -894,11 +791,12 @@
*/
static ssize_t pwm_show_state(struct device *dev, struct device_attribute *attr, char *buf)
{
- ssize_t ret_size = 0;
- struct pwm_device *ppd = to_pwm_device(dev);
+ ssize_t ret_size = 0;
+ struct pwm_device *ppd = to_pwm_device(dev);
- ret_size=sprintf(buf,"%d",ppd->active);
- return ret_size;
+ ret_size=sprintf(buf,"%d",ppd->active);
+
+ return ret_size;
}
/**
@@ -911,18 +809,18 @@
*/
static ssize_t pwm_store_state(struct device *dev, struct device_attribute *attr, const char *buf, size_t size)
{
- long value;
- struct pwm_device *ppd = to_pwm_device(dev);
+ long value;
+ struct pwm_device *ppd = to_pwm_device(dev);
- value = simple_strtol(buf, NULL, 10);
- if (value != 0)
- ppd->active=1;
- else
- ppd->active=0;
+ value = simple_strtol(buf, NULL, 10);
+ if (value != 0)
+ ppd->active=1;
+ else
+ ppd->active=0;
- setup_pwm_unit(ppd);
+ setup_pwm_unit(ppd);
- return size;
+ return size;
}
@@ -959,34 +857,34 @@
*/
static int init_userinterface(struct platform_device *pdev, u32 address)
{
- int rc = 0;
- struct pwm_device *ppd;
+ int rc = 0;
+ struct pwm_device *ppd;
- if (unlikely((ppd = kmalloc(sizeof(struct pwm_device), GFP_KERNEL)) == NULL)) {
+ if (unlikely((ppd = kmalloc(sizeof(struct pwm_device), GFP_KERNEL)) == NULL)) {
rc = -ENOMEM;
- goto error_malloc;
+ goto error_malloc;
}
- memset(&ppd->class_dev, 0, sizeof(struct device));
- ppd->class_dev.class = &pwm_class;
- ppd->class_dev.parent = &pdev->dev;
- snprintf(ppd->class_dev.bus_id, BUS_ID_SIZE, "pwm%i", pdev->id);
- ppd->reg=address;
- ppd->entry=NULL;
- ppd->active=0;
- ppd->duty=500; // = 50.O%
+ memset(&ppd->class_dev, 0, sizeof(struct device));
+ ppd->class_dev.class = &pwm_class;
+ ppd->class_dev.parent = &pdev->dev;
+ snprintf(ppd->class_dev.bus_id, BUS_ID_SIZE, "pwm%i", pdev->id);
+ ppd->reg=address;
+ ppd->entry=NULL;
+ ppd->active=0;
+ ppd->duty=500; /* = 50.O% */
- rc = device_register(&ppd->class_dev);
- if (unlikely(rc)) goto error_register;
+ rc = device_register(&ppd->class_dev);
+ if (unlikely(rc)) goto error_register;
- /* Register the attributes */
- rc |= device_create_file( &ppd->class_dev, &dev_attr_duty );
+ /* Register the attributes */
+ rc |= device_create_file(&ppd->class_dev, &dev_attr_duty);
if (unlikely(rc)) goto error_file;
- rc |= device_create_file( &ppd->class_dev, &dev_attr_period );
+ rc |= device_create_file(&ppd->class_dev, &dev_attr_period);
if (unlikely(rc)) goto error_file;
- rc |= device_create_file( &ppd->class_dev, &dev_attr_frequency );
+ rc |= device_create_file(&ppd->class_dev, &dev_attr_frequency);
if (unlikely(rc)) goto error_file;
- rc |= device_create_file( &ppd->class_dev, &dev_attr_active );
+ rc |= device_create_file(&ppd->class_dev, &dev_attr_active);
if (unlikely(rc)) goto error_file;
pdev->dev.driver_data=ppd;
@@ -1001,7 +899,7 @@
error_malloc:
return rc;
success:
- return 0;
+ return 0;
}
/*
@@ -1009,114 +907,97 @@
*/
static irqreturn_t pwm_interrupt(int irq, void *dev_id)
{
- u32 status;
- int remaining = 0;
+ u32 status;
+ int remaining = 0;
- /* Acknowledge interrupt */
- status = PWMC;
+ /* Acknowledge interrupt */
+ status = PWMC;
- remaining = CIRC_CNT( gPWM_Circ_Buf.write, gPWM_Circ_Buf.read, gPWM_Circ_Buf.size );
- if( remaining <= 1024 && remaining > 1021 ) { // TODO make it better (I think a test each consumed sample is the only accurate solution
- // Can accept new data now
- wake_up_interruptible( &write_wait );
- }
+ remaining = CIRC_CNT( gPWM_Circ_Buf.write, gPWM_Circ_Buf.read, gPWM_Circ_Buf.size );
+ if( remaining <= 1024 && remaining > 1021 ) { // TODO make it better (I think a test each consumed sample is the only accurate solution
+ // Can accept new data now
+ wake_up_interruptible( &write_wait );
+ }
- /* End of sound buffer */
- if( remaining < 3 )
- {
- if(gDataLen == PWM_DATA_8BIT)
- {
- while( remaining )
- {
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- /*PK("<1>(%d) pwm_int: PWMS = 0x%8x\n", gWriteCnt, PWMS);*/
- remaining--;
- }
- }
- else // if(gDataLen == PWM_DATA_16BIT) // one comparaison is enough
- {
- while( remaining )
- {
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- //PK("<1>(%d) pwm_int: PWMS = 0x%8x\n", gWriteCnt, PWMS);
- remaining--;
- }
- }
+ /* End of sound buffer */
+ if( remaining < 3 ) {
+ if(gDataLen == PWM_DATA_8BIT) {
+ while( remaining ) {
+ PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
+ /*PK("<1>(%d) pwm_int: PWMS = 0x%8x\n", gWriteCnt, PWMS);*/
+ remaining--;
+ }
+ } else { /* PWM_DATA_16BIT) */
+ while( remaining ) {
+ PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
+ //PK("<1>(%d) pwm_int: PWMS = 0x%8x\n", gWriteCnt, PWMS);
+ remaining--;
+ }
+ }
- StopPwm();
- goto end;
- }
+ stop_pwm();
+ goto end;
+ }
- /* Put sound samples in FIFO */
- if(gDataLen == PWM_DATA_8BIT)
- {
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- if (PWMC & PWMC_FIFOAV) // TODO: verify if needed
- {
- PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
- g4bytes++;
- }
- }
- else // if(gDataLen == PWM_DATA_16BIT) // one comparaison is enough
- {
- // TODO: put good value in PWMC_BCTR to auto swap bytes if needed (do it at write or ioctl)
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- if (PWMC & PWMC_FIFOAV) // TODO: verify if needed
- {
- PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
- g4bytes++;
- }
- }
+ /* Put sound samples in FIFO */
+ if (gDataLen == PWM_DATA_8BIT) {
+ PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
+ PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
+ PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
+ if (PWMC & PWMC_FIFOAV) { /* TODO: verify if needed */
+ PWMS = (u32)(get_byte_from_circbuf( &gPWM_Circ_Buf ));
+ g4bytes++;
+ }
+ } else { /* PWM_DATA_16BIT) */
+ // TODO: put good value in PWMC_BCTR to auto swap bytes if needed (do it at write or ioctl)
+ PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
+ PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
+ PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
+ if (PWMC & PWMC_FIFOAV) { /* TODO: verify if needed */
+ PWMS = (u32)(get_word_from_circbuf( &gPWM_Circ_Buf ));
+ g4bytes++;
+ }
+ }
end:
- return(IRQ_HANDLED);
+ return(IRQ_HANDLED);
}
-/*
- *
- */
static int __init pwm_init_from_probe(void)
{
- int result;
+ int result;
- /* Register our char device */
- result = register_chrdev(0, DRIVER_NAME, &pwm_fops);
- if ( result < 0 )
- {
- printk("pwm driver: Unable to register driver\n");
- goto end;
- }
- /* Dynamic Major allocation */
- if( gMajor == 0 )
- {
- gMajor = result;
- printk("PWM major number = %d\n",gMajor);
- }
+ /* Register our char device */
+ result = register_chrdev(0, DRIVER_NAME, &pwm_fops);
+ if (result < 0) {
+ printk("pwm driver: Unable to register driver\n");
+ goto end;
+ }
+ /* Dynamic Major allocation */
+ if (gMajor == 0) {
+ gMajor = result;
+ printk("PWM major number = %d\n",gMajor);
+ }
- result = request_irq(PWM_INT, pwm_interrupt, IRQF_DISABLED, DEV_IRQ_NAME, DEV_IRQ_ID);
- if (result)
- {
- printk("<1>cannot init major= %d irq=%d\n", gMajor, irq);
- unregister_chrdev(gMajor, DRIVER_NAME);
- goto end;
- }
+ result = request_irq(PWM_INT, pwm_interrupt, IRQF_DISABLED, DEV_IRQ_NAME, DEV_IRQ_ID);
+ if (result) {
+ printk("<1>cannot init major= %d irq=%d\n", gMajor, irq);
+ unregister_chrdev(gMajor, DRIVER_NAME);
+ goto end;
+ }
- /* init wait queue */
- init_waitqueue_head(&write_wait);
- init_waitqueue_head(&exit_wait);
- pr_debug("Wait queues initialized\n");
+ /* init wait queue */
+ init_waitqueue_head(&write_wait);
+ init_waitqueue_head(&exit_wait);
+ pr_debug("Wait queues initialized\n");
- /* init PWM hardware module */
- initPWM();
+ /* init PWM hardware module */
+ init_pwm();
- printk("i.MX PWM driver v" DRIVER_VERSION "\n");
+ printk("i.MX PWM driver v" DRIVER_VERSION "\n");
end:
- return( result );
+ return( result );
}
/**
@@ -1132,45 +1013,45 @@
*/
static int imx_pwm_drv_probe(struct platform_device *pdev)
{
- int err=-ENODEV;
- struct resource *res;
+ int err=-ENODEV;
+ struct resource *res;
- printk(KERN_INFO " Initializing PWM#%u...",pdev->id);
+ printk(KERN_INFO " Initializing PWM#%u...",pdev->id);
- switch( pdev->id )
- {
- /* PWM0 */
- case 0:
- // Check if GPIO was initialized ??
- break;
+ switch( pdev->id )
+ {
+ /* PWM0 */
+ case 0:
+ // Check if GPIO was initialized ??
+ break;
+
+ default:
+ printk(DRIVER_NAME " failed. Unknown PWM%u device. Remember that this device only supports 1 PWM\n", pdev->id);
+ return err;
+ break;
+ }
- default:
- printk(DRIVER_NAME " failed. Unknown PWM%u device. Remember that this device only supports 1 PWM\n", pdev->id);
- return err;
- break;
- }
+ if (unlikely(!(res = platform_get_resource(pdev, IORESOURCE_MEM, 0))))
+ goto exit;
- if (unlikely(!(res = platform_get_resource(pdev, IORESOURCE_MEM, 0))))
- goto exit;
+ if (unlikely(!request_mem_region( res->start, res->end - res->start + 1, "imx-pwm" ))) {
+ err = -EBUSY;
+ goto exit;
+ }
+ pwm_init_from_probe();
- if (unlikely(!request_mem_region( res->start, res->end - res->start + 1, "imx-pwm" ))) {
- err = -EBUSY;
- goto exit;
- }
- pwm_init_from_probe();
+ /* Create /sys stuf */
+ if (unlikely((err=init_userinterface(pdev,res->start))))
+ goto release;
- /* Create /sys stuf */
- if (unlikely((err=init_userinterface(pdev,res->start))))
- goto release;
+ printk("done.\n");
+ return(0);
- printk("done.\n");
- return(0);
-
release:
- release_mem_region(res->start, res->end - res->start + 1);
+ release_mem_region(res->start, res->end - res->start + 1);
exit:
- printk(KERN_INFO "not available.\n");
- return err;
+ printk(KERN_INFO "not available.\n");
+ return err;
}
static inline void unregister_sys_file( struct pwm_device *ppd )
@@ -1188,17 +1069,17 @@
*/
static int imx_pwm_drv_remove (struct platform_device *pdev)
{
- struct resource *res;
- struct pwm_device *ppd=(struct pwm_device*)pdev->dev.driver_data;
+ struct resource *res;
+ struct pwm_device *ppd=(struct pwm_device*)pdev->dev.driver_data;
unregister_sys_file(ppd);
device_unregister( &ppd->class_dev );
- kfree(ppd);
+ kfree(ppd);
- res = platform_get_resource( pdev, IORESOURCE_MEM, 0 );
- release_mem_region( res->start, res->end - res->start + 1 );
+ res = platform_get_resource( pdev, IORESOURCE_MEM, 0 );
+ release_mem_region( res->start, res->end - res->start + 1 );
- return 0;
+ return 0;
}
#ifdef CONFIG_PM
@@ -1209,8 +1090,8 @@
*/
static int imx_pwm_drv_suspend (struct platform_device *pdev, pm_message_t state)
{
- printk("%s\n",__FUNCTION__);
- return 0;
+ printk("%s\n",__FUNCTION__);
+ return 0;
}
/**
@@ -1219,8 +1100,8 @@
*/
static int imx_pwm_drv_resume (struct platform_device *pdev)
{
- printk("%s\n",__FUNCTION__);
- return 0;
+ printk("%s\n",__FUNCTION__);
+ return 0;
}
#else
@@ -1235,17 +1116,17 @@
*/
static void pwm_class_release(struct device *dev)
{
- return;
+ return;
}
static struct platform_driver imx_pwm_driver = {
- .probe = imx_pwm_drv_probe,
- .remove = imx_pwm_drv_remove,
- .suspend = imx_pwm_drv_suspend,
- .resume = imx_pwm_drv_resume,
- .driver = {
- .name = DRIVER_NAME,
- },
+ .probe = imx_pwm_drv_probe,
+ .remove = imx_pwm_drv_remove,
+ .suspend = imx_pwm_drv_suspend,
+ .resume = imx_pwm_drv_resume,
+ .driver = {
+ .name = DRIVER_NAME,
+ },
};
@@ -1254,8 +1135,8 @@
};
static struct sys_device pwm_sys_device = {
- .id = 0,
- .cls = &pwm_sysclass,
+ .id = 0,
+ .cls = &pwm_sysclass,
};
static struct class pwm_class = {
@@ -1264,55 +1145,49 @@
};
-/*
- * Called when module is insmoded
- */
-int __init imx_pwm_init(void)
+static int __init imx_pwm_init(void)
{
- int ret;
+ int ret;
- printk(KERN_INFO "Initializing PWM class.\n");
+ printk(KERN_INFO "Initializing PWM class.\n");
- if (unlikely((ret = class_register(&pwm_class)))) {
- printk(KERN_ERR "%s: couldn't register class, exiting\n", DRIVER_NAME);
- return ret;
- }
+ if (unlikely((ret = class_register(&pwm_class)))) {
+ printk(KERN_ERR "%s: couldn't register class, exiting\n", DRIVER_NAME);
+ return ret;
+ }
- if (unlikely((ret = sysdev_class_register(&pwm_sysclass)))) {
- printk(KERN_ERR "%s: couldn't register sysdev class, exiting\n", DRIVER_NAME);
- goto out_sysdev_class;
- }
+ if (unlikely((ret = sysdev_class_register(&pwm_sysclass)))) {
+ printk(KERN_ERR "%s: couldn't register sysdev class, exiting\n", DRIVER_NAME);
+ goto out_sysdev_class;
+ }
- if (unlikely((ret = sysdev_register(&pwm_sys_device)))) {
- printk(KERN_ERR "%s: couldn't register sysdev, exiting\n", DRIVER_NAME);
- goto out_sysdev_register;
- }
+ if (unlikely((ret = sysdev_register(&pwm_sys_device)))) {
+ printk(KERN_ERR "%s: couldn't register sysdev, exiting\n", DRIVER_NAME);
+ goto out_sysdev_register;
+ }
- return platform_driver_register( &imx_pwm_driver );
+ return platform_driver_register(&imx_pwm_driver);
out_sysdev_register:
- sysdev_class_unregister( &pwm_sysclass );
+ sysdev_class_unregister(&pwm_sysclass);
out_sysdev_class:
- class_unregister( &pwm_class );
+ class_unregister(&pwm_class);
- return ret;
+ return ret;
}
-/*
- * Called when module is rmmoded
- */
-void __exit imx_pwm_exit(void)
+static void __exit imx_pwm_exit(void)
{
- disable_irq( PWM_INT ); // should be done before free_irq no ?
- free_irq( PWM_INT, DEV_IRQ_ID );
- unregister_chrdev( gMajor, DRIVER_NAME );
+ disable_irq(PWM_INT); /* should be done before free_irq no ? */
+ free_irq(PWM_INT, DEV_IRQ_ID);
+ unregister_chrdev(gMajor, DRIVER_NAME);
- platform_driver_unregister( &imx_pwm_driver );
- sysdev_unregister( &pwm_sys_device );
- sysdev_class_unregister( &pwm_sysclass );
- class_unregister( &pwm_class );
+ platform_driver_unregister(&imx_pwm_driver);
+ sysdev_unregister(&pwm_sys_device);
+ sysdev_class_unregister(&pwm_sysclass);
+ class_unregister(&pwm_class);
- printk( DRIVER_NAME " successfully unloaded\n" );
+ printk(DRIVER_NAME " successfully unloaded\n");
}
module_init(imx_pwm_init);
@@ -1320,4 +1195,3 @@
MODULE_AUTHOR("Julien Boibessot & Sebastien Royen, inspired by a lot of other PWM drivers");
MODULE_DESCRIPTION("i.MX PWM driver");
MODULE_LICENSE("GPL");
-
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <th...@us...> - 2009-04-10 12:08:12
|
Revision: 1212
http://armadeus.svn.sourceforge.net/armadeus/?rev=1212&view=rev
Author: thom25
Date: 2009-04-10 12:08:02 +0000 (Fri, 10 Apr 2009)
Log Message:
-----------
[LINUX] fix ticket 7 for USB port 1
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-10 09:58:34 UTC (rev 1211)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-10 12:08:02 UTC (rev 1212)
@@ -5,7 +5,7 @@
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-08 15:48:50.000000000 +0200
-@@ -0,0 +1,1473 @@
+@@ -0,0 +1,1482 @@
+ /*
+ * apf27.c
+ *
@@ -862,10 +862,12 @@
+ pr_debug("reset controller: 0x%08x\n", temp);
+ mdelay(10);
+
-+ ret = isp1504_set_vbus_power((void __iomem *)(IO_ADDRESS(OTG_BASE_ADDR + 0x170)), 1);
+ if (ret)
+ mxc_gpio_release_multiple(mxc_usbotg_pins,
+ ARRAY_SIZE(mxc_usbotg_pins));
++
++ ret = isp1504_set_vbus_power((void __iomem *)(IO_ADDRESS(OTG_BASE_ADDR + 0x170)), 1);
++
+ return ret;
+}
+
@@ -909,7 +911,6 @@
+ temp |= 3 << 30;
+ writel(temp, IO_ADDRESS(OTG_BASE_ADDR) + 0x384);
+ pr_debug("PORTSC1 after: 0x%08x\n", temp);
-+
+ mdelay(10);
+
+ temp = readl(IO_ADDRESS(OTG_BASE_ADDR) + 0x340);
@@ -918,6 +919,14 @@
+ pr_debug("reset controller: 0x%08x\n", temp);
+ mdelay(10);
+
++ /* force port powerup in case of connected device */
++ temp = readl(IO_ADDRESS(OTG_BASE_ADDR) + 0x384);
++ pr_debug("PORTSC1 before: 0x%08x\n", temp);
++ temp &= ~(1 << 12);
++ temp |= 1 << 12;
++ writel(temp, IO_ADDRESS(OTG_BASE_ADDR) + 0x384);
++ mdelay(10);
++
+ return ret;
+}
+
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <th...@us...> - 2009-04-10 09:58:44
|
Revision: 1211
http://armadeus.svn.sourceforge.net/armadeus/?rev=1211&view=rev
Author: thom25
Date: 2009-04-10 09:58:34 +0000 (Fri, 10 Apr 2009)
Log Message:
-----------
[LINUX] fix ticket 7 for USB_OTG port (usb device may be not recognized at startup)
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-08 14:10:23 UTC (rev 1210)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-10 09:58:34 UTC (rev 1211)
@@ -5,7 +5,7 @@
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-08 15:48:50.000000000 +0200
-@@ -0,0 +1,1465 @@
+@@ -0,0 +1,1473 @@
+ /*
+ * apf27.c
+ *
@@ -798,6 +798,14 @@
+ }
+
+ if (on) {
++
++ /* force disconnection of the DM/DP signals. This
++ avoid powering the connected device through these lines */
++ ulpi_set(RESET, ISP1504_FCNCTL, view);
++ mdelay(10); /*wait until the supply is really down*/
++ ulpi_clear(RESET, ISP1504_FCNCTL, view);
++ mdelay(1);
++
+ ret = ulpi_set(DRV_VBUS_EXT | /* enable external Vbus */
+ DRV_VBUS | /* enable internal Vbus */
+ USE_EXT_VBUS_IND | /* use external indicator */
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-08 14:10:34
|
Revision: 1210
http://armadeus.svn.sourceforge.net/armadeus/?rev=1210&view=rev
Author: artemys
Date: 2009-04-08 14:10:23 +0000 (Wed, 08 Apr 2009)
Log Message:
-----------
[LINUX] Add preliminary driver for OV9653 (very first stage)
Added Paths:
-----------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/319-apf27-armadeus-ov96xx_sensors_driver.patch
Added: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/319-apf27-armadeus-ov96xx_sensors_driver.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/319-apf27-armadeus-ov96xx_sensors_driver.patch (rev 0)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/319-apf27-armadeus-ov96xx_sensors_driver.patch 2009-04-08 14:10:23 UTC (rev 1210)
@@ -0,0 +1,1826 @@
+Adds Omnivision ov96xx driver
+
+Based on work from Trilok Soni <son...@gm...> on ov9640 driver for OMAP
+
+Signed-off-by: Julien boibessot <jul...@ar...>
+
+Index: linux-2.6.27.13/drivers/media/video/Kconfig
+===================================================================
+--- linux-2.6.27.13.orig/drivers/media/video/Kconfig 2009-03-23 14:43:41.000000000 +0100
++++ linux-2.6.27.13/drivers/media/video/Kconfig 2009-03-23 14:52:38.000000000 +0100
+@@ -288,6 +288,13 @@
+ OV7670 VGA camera. It currently only works with the M88ALP01
+ controller.
+
++config VIDEO_OV96xx
++ tristate "OmniVision OV96xx sensor support"
++ depends on I2C && VIDEO_V4L2
++ ---help---
++ This is a Video4Linux2 sensor-level driver for the OmniVision
++ OV96xx camera. It currently only works on i.MX27 systems.
++
+ config VIDEO_TCM825X
+ tristate "TCM825x camera sensor support"
+ depends on I2C && VIDEO_V4L2
+Index: linux-2.6.27.13/drivers/media/video/Makefile
+===================================================================
+--- linux-2.6.27.13.orig/drivers/media/video/Makefile 2009-03-23 14:53:18.000000000 +0100
++++ linux-2.6.27.13/drivers/media/video/Makefile 2009-03-23 14:54:01.000000000 +0100
+@@ -105,6 +105,7 @@
+
+ obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o
+ obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
++obj-$(CONFIG_VIDEO_OV96xx) += ov96xx.o
+
+ obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o
+
+Index: linux-2.6.27.13/drivers/media/video/ov96xx.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.27.13/drivers/media/video/ov96xx.c 2009-03-26 19:39:07.000000000 +0100
+@@ -0,0 +1,1785 @@
++/*
++ * drivers/media/video/ov96xx.c
++ *
++ * OV96xx sensor driver
++ *
++ * Author: Julien Boibessot <jul...@ar...>
++ * Based on work from:
++ * Andy Lowe (so...@mv...)
++ * Trilok Soni <son...@gm...>
++ *
++ * Copyright (C) 2004 MontaVista Software, Inc.
++ * Copyright (C) 2004 Texas Instruments.
++ * Copyright (C) 2009 Armadeus Systems
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include <linux/i2c.h>
++#include <linux/delay.h>
++#include <media/v4l2-int-device.h>
++#include <linux/proc_fs.h>
++#include <media/soc_camera.h>
++
++// #include "ov9640.h"
++
++#define DRIVER_NAME "ov96xx"
++/* ov96xx i2c address 0x30
++ * The platform has to define i2c_board_info
++ * and call i2c_register_board_info() */
++#define OV96XX_I2C_ADDR 0x30 /* = 0x60 with read/write bit */
++
++/* define register offsets for the OV9640 sensor chip */
++#define OV96XX_GAIN 0x00
++#define OV96XX_BLUE 0x01
++#define OV96XX_RED 0x02
++#define OV96XX_VREF 0x03
++#define OV96XX_COM1 0x04
++#define OV96XX_BAVE 0x05
++#define OV96XX_GEAVE 0x06
++#define OV96XX_RAVE 0x08
++#define OV96XX_COM2 0x09
++#define OV96XX_PID 0x0A
++#define OV96XX_VER 0x0B
++#define OV96XX_COM3 0x0C
++#define OV96XX_COM4 0x0D
++#define OV96XX_COM5 0x0E
++#define OV96XX_COM6 0x0F
++#define OV96XX_AECH 0x10
++#define OV96XX_CLKRC 0x11
++#define OV96XX_COM7 0x12
++#define OV96XX_COM8 0x13
++#define OV96XX_COM9 0x14
++#define OV96XX_COM10 0x15
++#define OV96XX_HSTRT 0x17
++#define OV96XX_HSTOP 0x18
++#define OV96XX_VSTRT 0x19
++#define OV96XX_VSTOP 0x1A
++#define OV96XX_PSHFT 0x1B
++#define OV96XX_MIDH 0x1C
++#define OV96XX_MIDL 0x1D
++#define OV96XX_MVFP 0x1E
++#define OV96XX_LAEC 0x1F
++#define OV96XX_BOS 0x20
++#define OV96XX_GBOS 0x21
++#define OV96XX_GROS 0x22
++#define OV96XX_ROS 0x23
++#define OV96XX_AEW 0x24
++#define OV96XX_AEB 0x25
++#define OV96XX_VPT 0x26
++#define OV96XX_BBIAS 0x27
++#define OV96XX_GBBIAS 0x28
++#define OV96XX_EXHCH 0x2A
++#define OV96XX_EXHCL 0x2B
++#define OV96XX_RBIAS 0x2C
++#define OV96XX_ADVFL 0x2D
++#define OV96XX_ADVFH 0x2E
++#define OV96XX_YAVE 0x2F
++#define OV96XX_HSYST 0x30
++#define OV96XX_HSYEN 0x31
++#define OV96XX_HREF 0x32
++#define OV96XX_CHLF 0x33
++#define OV96XX_ARBLM 0x34
++#define OV96XX_ADC 0x37
++#define OV96XX_ACOM 0x38
++#define OV96XX_OFON 0x39
++#define OV96XX_TSLB 0x3A
++#define OV96XX_COM11 0x3B
++#define OV96XX_COM12 0x3C
++#define OV96XX_COM13 0x3D
++#define OV96XX_COM14 0x3E
++#define OV96XX_EDGE 0x3F
++#define OV96XX_COM15 0x40
++#define OV96XX_COM16 0x41
++#define OV96XX_COM17 0x42
++#define OV96XX_MTX1 0x4F
++#define OV96XX_MTX2 0x50
++#define OV96XX_MTX3 0x51
++#define OV96XX_MTX4 0x52
++#define OV96XX_MTX5 0x53
++#define OV96XX_MTX6 0x54
++#define OV96XX_MTX7 0x55
++#define OV96XX_MTX8 0x56
++#define OV96XX_MTX9 0x57
++#define OV96XX_MTXS 0x58
++#define OV96XX_LCC1 0x62
++#define OV96XX_LCC2 0x63
++#define OV96XX_LCC3 0x64
++#define OV96XX_LCC4 0x65
++#define OV96XX_LCC5 0x66
++#define OV96XX_MANU 0x67
++#define OV96XX_MANV 0x68
++#define OV96XX_HV 0x69
++#define OV96XX_MBD 0x6A
++#define OV96XX_DBLV 0x6B
++#define OV96XX_GSP1 0x6C
++#define OV96XX_GSP2 0x6D
++#define OV96XX_GSP3 0x6E
++#define OV96XX_GSP4 0x6F
++#define OV96XX_GSP5 0x70
++#define OV96XX_GSP6 0x71
++#define OV96XX_GSP7 0x72
++#define OV96XX_GSP8 0x73
++#define OV96XX_GSP9 0x74
++#define OV96XX_GSP10 0x75
++#define OV96XX_GSP11 0x76
++#define OV96XX_GSP12 0x77
++#define OV96XX_GSP13 0x78
++#define OV96XX_GSP14 0x79
++#define OV96XX_GSP15 0x7A
++#define OV96XX_GSP16 0x7B
++#define OV96XX_GST1 0x7C
++#define OV96XX_GST2 0x7D
++#define OV96XX_GST3 0x7E
++#define OV96XX_GST4 0x7F
++#define OV96XX_GST5 0x80
++#define OV96XX_GST6 0x81
++#define OV96XX_GST7 0x82
++#define OV96XX_GST8 0x83
++#define OV96XX_GST9 0x84
++#define OV96XX_GST10 0x85
++#define OV96XX_GST11 0x86
++#define OV96XX_GST12 0x87
++#define OV96XX_GST13 0x88
++#define OV96XX_GST14 0x89
++#define OV96XX_GST15 0x8A
++
++#define OV96XX_NUM_REGS (OV96XX_GST15 + 1)
++
++#define OV96XX_PID_MAGIC 0x96 /* high byte of product ID number */
++#define OV96XX_VER_REV2 0x48 /* low byte of product ID number */
++#define OV96XX_VER_REV3 0x49 /* low byte of product ID number */
++#define OV96XX_MIDH_MAGIC 0x7F /* high byte of mfg ID */
++#define OV96XX_MIDL_MAGIC 0xA2 /* low byte of mfg ID */
++
++#define OV96XX_REG_TERM 0xFF /* terminating list entry for reg */
++#define OV96XX_VAL_TERM 0xFF /* terminating list entry for val */
++
++/* define a structure for ov96xx register initialization values */
++struct ov96xx_reg {
++ unsigned char reg;
++ unsigned char val;
++};
++
++enum image_size { QQCIF, QQVGA, QCIF, QVGA, CIF, VGA, SXGA };
++enum pixel_format { YUV, RGB565, RGB555 };
++
++#define NUM_IMAGE_SIZES 7
++#define NUM_PIXEL_FORMATS 3
++
++struct capture_size {
++ unsigned long width;
++ unsigned long height;
++};
++
++struct ov96xx_platform_data {
++ /* Set power state, zero is off, non-zero is on. */
++ int (*power_set)(int power);
++ /* Default registers written after power-on or reset. */
++ const struct ov96xx_reg *default_regs;
++ int (*ifparm)(struct v4l2_ifparm *p);
++};
++
++/*
++ * Array of image sizes supported by OV9640. These must be ordered from
++ * smallest image size to largest.
++ */
++const static struct capture_size ov96xx_sizes[] = {
++ { 88, 72 }, /* QQCIF */
++ { 160, 120 }, /* QQVGA */
++ { 176, 144 }, /* QCIF */
++ { 320, 240 }, /* QVGA */
++ { 352, 288 }, /* CIF */
++ { 640, 480 }, /* VGA */
++ { 1280, 960 }, /* SXGA */
++};
++
++
++
++struct ov96xx_sensor {
++ struct i2c_client *i2c_client;
++ struct soc_camera_device icd;
++ int ver; /*ov96xx chip version*/
++
++ const struct ov96xx_platform_data *pdata;
++ struct v4l2_int_device *v4l2_int_device;
++ struct v4l2_pix_format pix;
++ struct v4l2_fract timeperframe;
++};
++
++// static struct ov96xx_sensor ov96xx;
++// static struct i2c_driver ov96xxsensor_i2c_driver;
++
++/* list of image formats supported by OV96xx sensor */
++static const struct soc_camera_data_format ov96xx_formats[] = {
++ {
++ /* Note: V4L2 defines RGB565 as:
++ *
++ * Byte 0 Byte 1
++ * g2 g1 g0 r4 r3 r2 r1 r0 b4 b3 b2 b1 b0 g5 g4 g3
++ *
++ * We interpret RGB565 as:
++ *
++ * Byte 0 Byte 1
++ * g2 g1 g0 b4 b3 b2 b1 b0 r4 r3 r2 r1 r0 g5 g4 g3
++ */
++ .name = "RGB565, le",
++ .fourcc = V4L2_PIX_FMT_RGB565,
++ },
++ {
++ /* Note: V4L2 defines RGB565X as:
++ *
++ * Byte 0 Byte 1
++ * b4 b3 b2 b1 b0 g5 g4 g3 g2 g1 g0 r4 r3 r2 r1 r0
++ *
++ * We interpret RGB565X as:
++ *
++ * Byte 0 Byte 1
++ * r4 r3 r2 r1 r0 g5 g4 g3 g2 g1 g0 b4 b3 b2 b1 b0
++ */
++ .name = "RGB565, be",
++ .fourcc = V4L2_PIX_FMT_RGB565X,
++ },
++ {
++ .name = "YUYV (YUV 4:2:2), packed",
++ .fourcc = V4L2_PIX_FMT_YUYV,
++ },
++ {
++ .name = "UYVY, packed",
++ .fourcc = V4L2_PIX_FMT_UYVY,
++ },
++ {
++ /* Note: V4L2 defines RGB555 as:
++ *
++ * Byte 0 Byte 1
++ * g2 g1 g0 r4 r3 r2 r1 r0 x b4 b3 b2 b1 b0 g4 g3
++ *
++ * We interpret RGB555 as:
++ *
++ * Byte 0 Byte 1
++ * g2 g1 g0 b4 b3 b2 b1 b0 x r4 r3 r2 r1 r0 g4 g3
++ */
++ .name = "RGB555, le",
++ .fourcc = V4L2_PIX_FMT_RGB555,
++ },
++ {
++ /* Note: V4L2 defines RGB555X as:
++ *
++ * Byte 0 Byte 1
++ * x b4 b3 b2 b1 b0 g4 g3 g2 g1 g0 r4 r3 r2 r1 r0
++ *
++ * We interpret RGB555X as:
++ *
++ * Byte 0 Byte 1
++ * x r4 r3 r2 r1 r0 g4 g3 g2 g1 g0 b4 b3 b2 b1 b0
++ */
++ .name = "RGB555, be",
++ .fourcc = V4L2_PIX_FMT_RGB555X,
++ },
++};
++
++#define NUM_CAPTURE_FORMATS ARRAY_SIZE(ov96xx_formats)
++
++/*
++ * OV9640 register configuration for all combinations of pixel format and
++ * image size
++ */
++ /* YUV (YCbCr) QQCIF */
++const static struct ov96xx_reg qqcif_yuv[] = {
++ { 0x12, 0x08 }, { 0x3C, 0x46 }, { 0x40, 0xC0 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x24 }, { 0x0C, 0x00 }, { 0x0D, 0x40 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x50 }, { 0x50, 0x43 }, { 0x51, 0x0D }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x19 }, { 0x53, 0x4C }, { 0x54, 0x65 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x40 }, { 0x56, 0x40 }, { 0x57, 0x40 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x0F }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* YUV (YCbCr) QQVGA */
++const static struct ov96xx_reg qqvga_yuv[] = {
++ { 0x12, 0x10 }, { 0x3C, 0x46 }, { 0x40, 0xC0 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x24 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x50 }, { 0x50, 0x43 }, { 0x51, 0x0D }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x19 }, { 0x53, 0x4C }, { 0x54, 0x65 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x40 }, { 0x56, 0x40 }, { 0x57, 0x40 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x0F }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* YUV (YCbCr) QCIF */
++const static struct ov96xx_reg qcif_yuv[] = {
++ { 0x12, 0x08 }, { 0x3C, 0x46 }, { 0x40, 0xC0 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x50 }, { 0x50, 0x43 }, { 0x51, 0x0D }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x19 }, { 0x53, 0x4C }, { 0x54, 0x65 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x40 }, { 0x56, 0x40 }, { 0x57, 0x40 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x0F }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* YUV (YCbCr) QVGA */
++const static struct ov96xx_reg qvga_yuv[] = {
++ { 0x12, 0x10 }, { 0x3C, 0x46 }, { 0x40, 0xC0 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0x80/*0xC0*/ }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x50 }, { 0x50, 0x43 }, { 0x51, 0x0D }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x19 }, { 0x53, 0x4C }, { 0x54, 0x65 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x40 }, { 0x56, 0x40 }, { 0x57, 0x40 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x0F }, /* MTXS */
++ { 0x1e, 0x10 }, /* vertical flip */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* YUV (YCbCr) CIF */
++const static struct ov96xx_reg cif_yuv[] = {
++ { 0x12, 0x20 }, { 0x3C, 0x46 }, { 0x40, 0xC0 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x50 }, { 0x50, 0x43 }, { 0x51, 0x0D }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x19 }, { 0x53, 0x4C }, { 0x54, 0x65 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x40 }, { 0x56, 0x40 }, { 0x57, 0x40 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x0F }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* YUV (YCbCr) VGA */
++const static struct ov96xx_reg vga_yuv[] = {
++ { 0x12, 0x40 }, { 0x3C, 0x46 }, { 0x40, 0xC0 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x50 }, { 0x50, 0x43 }, { 0x51, 0x0D }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x19 }, { 0x53, 0x4C }, { 0x54, 0x65 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x40 }, { 0x56, 0x40 }, { 0x57, 0x40 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x0F }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* YUV (YCbCr) SXGA */
++const static struct ov96xx_reg sxga_yuv[] = {
++ { 0x12, 0x00 }, { 0x3C, 0x46 }, { 0x40, 0xC0 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x00 }, { 0x0D, 0x40 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x50 }, { 0x50, 0x43 }, { 0x51, 0x0D }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x19 }, { 0x53, 0x4C }, { 0x54, 0x65 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x40 }, { 0x56, 0x40 }, { 0x57, 0x40 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x0F }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB565 QQCIF */
++const static struct ov96xx_reg qqcif_565[] = {
++ { 0x12, 0x0C }, { 0x3C, 0x40 }, { 0x40, 0x10 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x24 }, { 0x0C, 0x00 }, { 0x0D, 0x40 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB565 QQVGA */
++const static struct ov96xx_reg qqvga_565[] = {
++ { 0x12, 0x14 }, { 0x3C, 0x40 }, { 0x40, 0x10 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x24 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB565 QCIF */
++const static struct ov96xx_reg qcif_565[] = {
++ { 0x12, 0x0C }, { 0x3C, 0x40 }, { 0x40, 0x10 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB565 QVGA */
++const static struct ov96xx_reg qvga_565[] = {
++ { 0x12, 0x14 }, { 0x3C, 0x40 }, { 0x40, 0x10 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB565 CIF */
++const static struct ov96xx_reg cif_565[] = {
++ { 0x12, 0x24 }, { 0x3C, 0x40 }, { 0x40, 0x10 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB565 VGA */
++const static struct ov96xx_reg vga_565[] = {
++ { 0x12, 0x44 }, { 0x3C, 0x40 }, { 0x40, 0x10 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB565 SXGA */
++const static struct ov96xx_reg sxga_565[] = {
++ { 0x12, 0x04 }, { 0x3C, 0x40 }, { 0x40, 0x10 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x00 }, { 0x0D, 0x40 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB555 QQCIF */
++const static struct ov96xx_reg qqcif_555[] = {
++ { 0x12, 0x0C }, { 0x3C, 0x40 }, { 0x40, 0x30 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x24 }, { 0x0C, 0x00 }, { 0x0D, 0x40 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB555 QQVGA */
++const static struct ov96xx_reg qqvga_555[] = {
++ { 0x12, 0x14 }, { 0x3C, 0x40 }, { 0x40, 0x30 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x24 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB555 QCIF */
++const static struct ov96xx_reg qcif_555[] = {
++ { 0x12, 0x0C }, { 0x3C, 0x40 }, { 0x40, 0x30 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB555 QVGA */
++const static struct ov96xx_reg qvga_555[] = {
++ { 0x12, 0x14 }, { 0x3C, 0x40 }, { 0x40, 0x30 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB555 CIF */
++const static struct ov96xx_reg cif_555[] = {
++ { 0x12, 0x24 }, { 0x3C, 0x40 }, { 0x40, 0x30 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB555 VGA */
++const static struct ov96xx_reg vga_555[] = {
++ { 0x12, 0x44 }, { 0x3C, 0x40 }, { 0x40, 0x30 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x04 }, { 0x0D, 0xC0 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++ /* RGB555 SXGA */
++const static struct ov96xx_reg sxga_555[] = {
++ { 0x12, 0x04 }, { 0x3C, 0x40 }, { 0x40, 0x30 }, /* COM7, COM12, COM15 */
++ { 0x04, 0x00 }, { 0x0C, 0x00 }, { 0x0D, 0x40 }, /* COM1, COM3, COM4 */
++ { 0x4F, 0x71 }, { 0x50, 0x3E }, { 0x51, 0x0C }, /* MTX1, MTX2, MTX3 */
++ { 0x52, 0x33 }, { 0x53, 0x72 }, { 0x54, 0x00 }, /* MTX4, MTX5, MTX6 */
++ { 0x55, 0x2B }, { 0x56, 0x66 }, { 0x57, 0xD2 }, /* MTX7, MTX8, MTX9 */
++ { 0x58, 0x65 }, /* MTXS */
++ { OV96XX_REG_TERM, OV96XX_VAL_TERM }
++};
++
++
++#define DEF_GAIN 31
++#define DEF_AUTOGAIN 1
++#define DEF_EXPOSURE 154
++#define DEF_AEC 1
++#define DEF_FREEZE_AGCAEC 0
++#define DEF_BLUE 153
++#define DEF_RED (255 - DEF_BLUE)
++#define DEF_AWB 1
++#define DEF_HFLIP 0
++#define DEF_VFLIP 0
++
++/* Our own specific controls */
++#define V4L2_CID_FREEZE_AGCAEC V4L2_CID_PRIVATE_BASE
++#define V4L2_CID_AUTOEXPOSURE V4L2_CID_PRIVATE_BASE + 1
++#define V4L2_CID_LAST_PRIV V4L2_CID_AUTOEXPOSURE
++
++/* Video controls */
++struct vcontrol {
++// struct v4l2_queryctrl qc;
++ int current_value;
++ u8 reg;
++ u8 mask;
++ u8 start_bit;
++};
++
++/* Should match with ov96xx_controls */
++static const struct vcontrol video_control[] = {
++ { /* Gain */
++ .current_value = 0,
++ .reg = OV96XX_GAIN,
++ .mask = 0x3f,
++ .start_bit = 0,
++ }, { /* Auto Gain */
++ .current_value = 0,
++ .reg = OV96XX_COM8,
++ .mask = 0x04,
++ .start_bit = 2,
++ }, { /* Exposure */
++ .current_value = 0,
++ .reg = OV96XX_AECH,
++ .mask = 0xff,
++ .start_bit = 0,
++ }, { /* Auto Exposure */
++ .current_value = 0,
++ .reg = OV96XX_COM8,
++ .mask = 0x01,
++ .start_bit = 0,
++ }, { /* Freeze AGC/AEC */
++ .current_value = 0,
++ .reg = OV96XX_COM9,
++ .mask = 0x01,
++ .start_bit = 0,
++ }, { /* Red Balance */
++ .current_value = 0,
++ .reg = OV96XX_RED,
++ .mask = 0xff,
++ .start_bit = 0,
++ }, { /* Blue Balance */
++ .current_value = 0,
++ .reg = OV96XX_BLUE,
++ .mask = 0xff,
++ .start_bit = 0,
++ }, { /* Auto White Balance */
++ .current_value = 0,
++ .reg = OV96XX_COM8,
++ .mask = 0x02,
++ .start_bit = 1,
++ }, { /* Mirror Image */
++ .current_value = 0,
++ .reg = OV96XX_MVFP,
++ .mask = 0x20,
++ .start_bit = 5,
++ }, { /* Vertical Flip */
++ .current_value = 0,
++ .reg = OV96XX_MVFP,
++ .mask = 0x10,
++ .start_bit = 4,
++ },
++};
++
++static const struct v4l2_queryctrl ov96xx_controls[] = {
++ {
++ .id = V4L2_CID_GAIN,
++ .type = V4L2_CTRL_TYPE_INTEGER,
++ .name = "Gain",
++ .minimum = 0,
++ .maximum = 63,
++ .step = 1,
++ .default_value = DEF_GAIN,
++ }, {
++ .id = V4L2_CID_AUTOGAIN,
++ .type = V4L2_CTRL_TYPE_BOOLEAN,
++ .name = "Auto Gain",
++ .minimum = 0,
++ .maximum = 1,
++ .step = 0,
++ .default_value = DEF_AUTOGAIN,
++ }, {
++ .id = V4L2_CID_EXPOSURE,
++ .type = V4L2_CTRL_TYPE_INTEGER,
++ .name = "Exposure",
++ .minimum = 0,
++ .maximum = 255,
++ .step = 1,
++ .default_value = DEF_EXPOSURE,
++ }, {
++ .id = V4L2_CID_AUTOEXPOSURE,
++ .type = V4L2_CTRL_TYPE_BOOLEAN,
++ .name = "Auto Exposure",
++ .minimum = 0,
++ .maximum = 1,
++ .step = 0,
++ .default_value = DEF_AEC,
++ }, {
++ .id = V4L2_CID_FREEZE_AGCAEC,
++ .type = V4L2_CTRL_TYPE_BOOLEAN,
++ .name = "Freeze AGC/AEC",
++ .minimum = 0,
++ .maximum = 1,
++ .step = 0,
++ .default_value = DEF_FREEZE_AGCAEC,
++ }, {
++ .id = V4L2_CID_RED_BALANCE,
++ .type = V4L2_CTRL_TYPE_INTEGER,
++ .name = "Red Balance",
++ .minimum = 0,
++ .maximum = 255,
++ .step = 1,
++ .default_value = DEF_RED,
++ }, {
++ .id = V4L2_CID_BLUE_BALANCE,
++ .type = V4L2_CTRL_TYPE_INTEGER,
++ .name = "Blue Balance",
++ .minimum = 0,
++ .maximum = 255,
++ .step = 1,
++ .default_value = DEF_BLUE,
++ }, {
++ .id = V4L2_CID_AUTO_WHITE_BALANCE,
++ .type = V4L2_CTRL_TYPE_BOOLEAN,
++ .name = "Auto White Balance",
++ .minimum = 0,
++ .maximum = 1,
++ .step = 0,
++ .default_value = DEF_AWB,
++ }, {
++ .id = V4L2_CID_HFLIP,
++ .type = V4L2_CTRL_TYPE_BOOLEAN,
++ .name = "Mirror Image",
++ .minimum = 0,
++ .maximum = 1,
++ .step = 0,
++ .default_value = DEF_HFLIP,
++ }, {
++ .id = V4L2_CID_VFLIP,
++ .type = V4L2_CTRL_TYPE_BOOLEAN,
++ .name = "Vertical Flip",
++ .minimum = 0,
++ .maximum = 1,
++ .step = 0,
++ .default_value = DEF_VFLIP,
++ },
++};
++
++
++
++const static struct ov96xx_reg *
++ ov96xx_reg_init[NUM_PIXEL_FORMATS][NUM_IMAGE_SIZES] =
++{
++ { qqcif_yuv, qqvga_yuv, qcif_yuv, qvga_yuv, cif_yuv, vga_yuv, sxga_yuv },
++ { qqcif_565, qqvga_565, qcif_565, qvga_565, cif_565, vga_565, sxga_565 },
++ { qqcif_555, qqvga_555, qcif_555, qvga_555, cif_555, vga_555, sxga_555 },
++};
++
++
++/*
++ * Read a value from a register in an OV96xx sensor device.
++ * The value is returned in 'val'.
++ * Returns zero if successful, or non-zero otherwise.
++ */
++static int
++ov96xx_read_reg(struct i2c_client *client, u8 reg, u8 *val)
++{
++ int err;
++ struct i2c_msg msg[1];
++ unsigned char data[1];
++
++ if (!client->adapter)
++ return -ENODEV;
++
++ msg->addr = client->addr;
++ msg->flags = 0;
++ msg->len = 1;
++ msg->buf = data;
++ *data = reg;
++ err = i2c_transfer(client->adapter, msg, 1);
++ if (err >= 0) {
++ msg->flags = I2C_M_RD;
++ err = i2c_transfer(client->adapter, msg, 1);
++ }
++ if (err >= 0) {
++ *val = *data;
++ return 0;
++ }
++ return err;
++}
++
++/*
++ * Write a value to a register in an OV96xx sensor device.
++ * Returns zero if successful, or non-zero otherwise.
++ */
++static int
++ov96xx_write_reg(struct i2c_client *client, u8 reg, u8 val)
++{
++ int err;
++ struct i2c_msg msg[1];
++ unsigned char data[2];
++
++ if (!client->adapter)
++ return -ENODEV;
++
++ msg->addr = client->addr;
++ msg->flags = 0;
++ msg->len = 2;
++ msg->buf = data;
++ data[0] = reg;
++ data[1] = val;
++ err = i2c_transfer(client->adapter, msg, 1);
++ if (err >= 0)
++ return 0;
++ return err;
++}
++
++static int
++ov96xx_write_reg_mask(struct i2c_client *client, u8 reg, u8 *val, u8 mask)
++{
++ u8 oldval, newval;
++ int rc;
++
++ if (mask == 0xff)
++ newval = *val;
++ else {
++ /* need to do read - modify - write */
++ rc = ov96xx_read_reg(client, reg, &oldval);
++ if (rc)
++ return rc;
++ oldval &= (~mask); /* Clear the masked bits */
++ *val &= mask; /* Enforce mask on value */
++ newval = oldval | *val; /* Set the desired bits */
++ }
++
++ /* write the new value to the register */
++ rc = ov96xx_write_reg(client, reg, newval);
++ if (rc)
++ return rc;
++
++ rc = ov96xx_read_reg(client, reg, &newval);
++ if (rc)
++ return rc;
++
++ *val = newval & mask;
++ return 0;
++}
++
++static int
++ov96xx_read_reg_mask(struct i2c_client *client, u8 reg, u8 *val, u8 mask)
++{
++ int rc;
++
++ rc = ov96xx_read_reg(client, reg, val);
++ if (rc)
++ return rc;
++ (*val) &= mask;
++
++ return 0;
++}
++
++/*
++ * Initialize a list of OV9640 registers.
++ * The list of registers is terminated by the pair of values
++ * { OV96XX_REG_TERM, OV96XX_VAL_TERM }.
++ * Returns zero if successful, or non-zero otherwise.
++ */
++static int
++ov96xx_write_regs(struct i2c_client *client, const struct ov96xx_reg reglist[])
++{
++ int err;
++ const struct ov96xx_reg *next = reglist;
++
++ while (!((next->reg == OV96XX_REG_TERM)
++ && (next->val == OV96XX_VAL_TERM))) {
++ err = ov96xx_write_reg(client, next->reg, next->val);
++ udelay(100);
++ if (err)
++ return err;
++ next++;
++ }
++ return 0;
++}
++
++/* Returns the index of the requested ID from the control structure array */
++static int
++find_vctrl(int id)
++{
++ int i;
++
++ if (id < V4L2_CID_BASE)
++ return -EDOM;
++
++ for (i = (ARRAY_SIZE(video_control) - 1); i >= 0; i--)
++ if (ov96xx_controls[i].id == id)
++ break;
++ if (i < 0)
++ i = -EINVAL;
++ return i;
++}
++
++/* Calculate the internal clock divisor (value of the CLKRC register) of the
++ * OV9640 given the image size, the frequency (in Hz) of its XCLK input and a
++ * desired frame period (in seconds). The frame period 'fper' is expressed as
++ * a fraction. The frame period is an input/output parameter.
++ * Returns the value of the OV9640 CLKRC register that will yield the frame
++ * period returned in 'fper' at the specified xclk frequency. The
++ * returned period will be as close to the requested period as possible.
++ */
++static unsigned char
++ov96xx_clkrc(enum image_size isize, unsigned long xclk, struct v4l2_fract *fper)
++{
++ unsigned long fpm, fpm_max; /* frames per minute */
++ unsigned long divisor;
++ const unsigned long divisor_max = 64;
++ /* FIXME
++ * clks_per_frame should come from platform data
++ */
++#ifdef CONFIG_ARCH_OMAP24XX
++ const static unsigned long clks_per_frame[] =
++ { 200000, 400000, 200000, 400000, 400000, 800000, 3200000 };
++ /* QQCIF QQVGA QCIF QVGA CIF VGA SXGA
++ * 199680,400000, 199680, 400000, 399360, 800000, 3200000
++ */
++#else
++ const static unsigned long clks_per_frame[] =
++ { 200000, 200000, 200000, 200000, 400000, 800000, 3200000 };
++#endif
++
++ if (fper->numerator > 0)
++ fpm = (fper->denominator*60)/fper->numerator;
++ else
++ fpm = 0xffffffff;
++ fpm_max = (xclk*60)/clks_per_frame[isize];
++ if (fpm_max == 0)
++ fpm_max = 1;
++ if (fpm > fpm_max)
++ fpm = fpm_max;
++ if (fpm == 0)
++ fpm = 1;
++ divisor = fpm_max/fpm;
++ if (divisor > divisor_max)
++ divisor = divisor_max;
++ fper->numerator = divisor*60;
++ fper->denominator = fpm_max;
++
++ /* try to reduce the fraction */
++ while (!(fper->denominator % 5) && !(fper->numerator % 5)) {
++ fper->numerator /= 5;
++ fper->denominator /= 5;
++ }
++ while (!(fper->denominator % 3) && !(fper->numerator % 3)) {
++ fper->numerator /= 3;
++ fper->denominator /= 3;
++ }
++ while (!(fper->denominator % 2) && !(fper->numerator % 2)) {
++ fper->numerator /= 2;
++ fper->denominator /= 2;
++ }
++ if (fper->numerator < fper->denominator) {
++ if (!(fper->denominator % fper->numerator)) {
++ fper->denominator /= fper->numerator;
++ fper->numerator = 1;
++ }
++ } else {
++ if (!(fper->numerator % fper->denominator)) {
++ fper->numerator /= fper->denominator;
++ fper->denominator = 1;
++ }
++ }
++
++ /* we set bit 7 in CLKRC to enable the digital PLL */
++ return (0x80 | (divisor - 1));
++}
++
++/*
++ * Find the best match for a requested image capture size. The best match
++ * is chosen as the nearest match that has the same number or fewer pixels
++ * as the requested size, or the smallest image size if the requested size
++ * has fewer pixels than the smallest image.
++ */
++static enum image_size
++ov96xx_find_size(unsigned int width, unsigned int height)
++{
++ enum image_size isize;
++ unsigned long pixels = width*height;
++
++ for (isize = QQCIF; isize < SXGA; isize++) {
++ if (ov96xx_sizes[isize + 1].height *
++ ov96xx_sizes[isize + 1].width > pixels)
++ return isize;
++ }
++ return SXGA;
++}
++
++/*
++ * The nominal xclk input frequency of the OV9640 is 24MHz, maximum
++ * frequency is 48MHz, and minimum frequency is 10MHz.
++ */
++#define XCLK_MIN 10000000
++#define XCLK_MAX 48000000
++#define XCLK_NOM 24000000
++
++/*
++ * Given the image capture format in pix, the nominal frame period in
++ * timeperframe, calculate the required xclk frequency
++ */
++static unsigned long
++ov96xxsensor_calc_xclk(struct i2c_client *c)
++{
++ struct ov96xx_sensor *sensor = i2c_get_clientdata(c);
++ struct v4l2_fract *timeperframe = &sensor->timeperframe;
++ struct v4l2_pix_format *pix = &sensor->pix;
++
++ unsigned long tgt_xclk; /* target xclk */
++ unsigned long tgt_fpm; /* target frames per minute */
++ enum image_size isize;
++
++ /* We use arbitrary rules to select the xclk frequency. If the
++ * capture size is VGA and the frame rate is greater than 900
++ * frames per minute, or if the capture size is SXGA and the
++ * frame rate is greater than 450 frames per minutes, then the
++ * xclk frequency will be set to 48MHz. Otherwise, the xclk
++ * frequency will be set to 24MHz. If the mclk frequency is such that
++ * the target xclk frequency is not achievable, then xclk will be set
++ * as close as to the target as possible.
++ */
++ if ((timeperframe->numerator == 0)
++ || (timeperframe->denominator == 0)) {
++ /* supply a default nominal_timeperframe of 15 fps */
++ timeperframe->numerator = 1;
++ timeperframe->denominator = 15;
++ }
++ tgt_fpm = (timeperframe->denominator*60)
++ / timeperframe->numerator;
++ tgt_xclk = XCLK_NOM;
++ isize = ov96xx_find_size(pix->width, pix->height);
++ switch (isize) {
++ case SXGA:
++ if (tgt_fpm > 450)
++ tgt_xclk = XCLK_MAX;
++ break;
++ case VGA:
++ if (tgt_fpm > 900)
++ tgt_xclk = XCLK_MAX;
++ break;
++ default:
++ break;
++ }
++ return tgt_xclk;
++}
++
++/*
++ * Configure the OV96xx for a specified image size, pixel format, and frame
++ * period. xclk is the frequency (in Hz) of the xclk input to the OV96xx.
++ * fper is the frame period (in seconds) expressed as a fraction.
++ * Returns zero if successful, or non-zero otherwise.
++ * The actual frame period is returned in fper.
++ */
++static int ov96xx_configure(struct soc_camera_device *icd)
++// struct v4l2_int_device *s)
++{
++// struct ov96xx_sensor *sensor = s->priv;
++ struct ov96xx_sensor *sensor = container_of(icd, struct ov96xx_sensor, icd);
++ struct v4l2_pix_format *pix = &sensor->pix;
++ struct v4l2_fract *fper = &sensor->timeperframe;
++ struct i2c_client *client = sensor->i2c_client;
++ enum image_size isize;
++ unsigned long xclk;
++
++ int err;
++ unsigned char clkrc;
++ enum pixel_format pfmt = YUV;
++
++ switch (pix->pixelformat) {
++ case V4L2_PIX_FMT_RGB565:
++ case V4L2_PIX_FMT_RGB565X:
++ pfmt = RGB565;
++ break;
++ case V4L2_PIX_FMT_RGB555:
++ case V4L2_PIX_FMT_RGB555X:
++ pfmt = RGB555;
++ break;
++ case V4L2_PIX_FMT_YUYV:
++ case V4L2_PIX_FMT_UYVY:
++ default:
++ pfmt = YUV;
++ }
++
++ xclk = ov96xxsensor_calc_xclk(client);
++ printk("%s xclk: %d\n", __func__, xclk);
++ return 0;
++
++ isize = ov96xx_find_size(pix->width, pix->height);
++
++ /* common register initialization */
++ err = ov96xx_write_regs(client, sensor->pdata->default_regs);
++ if (err)
++ return err;
++
++ /* configure image size and pixel format */
++ err = ov96xx_write_regs(client, ov96xx_reg_init[pfmt][isize]);
++ if (err)
++ return err;
++
++ /* configure frame rate */
++ clkrc = ov96xx_clkrc(isize, xclk, fper);
++ err = ov96xx_write_reg(client, OV96XX_CLKRC, clkrc);
++ if (err)
++ return err;
++
++ return 0;
++}
++
++/*
++ * Detect if an OV96xx is present, and if so which revision.
++ * A device is considered to be detected if the manufacturer ID (MIDH and MIDL)
++ * and the product ID (PID) registers match the expected values.
++ * Any value of the version ID (VER) register is accepted.
++ * Here are the version numbers we know about:
++ * 0x48 --> OV9640 Revision 1 or OV9640 Revision 2
++ * 0x49 --> OV9640 Revision 3
++ * Returns a negative error number if no device is detected, or the
++ * non-negative value of the version ID register if a device is detected.
++ */
++static int
++ov96xx_detect(struct i2c_client *client)
++{
++ u8 midh, midl, pid, ver;
++
++ if (!client)
++ return -ENODEV;
++
++ if (ov96xx_read_reg(client, OV96XX_MIDH, &midh))
++ return -ENODEV;
++ if (ov96xx_read_reg(client, OV96XX_MIDL, &midl))
++ return -ENODEV;
++ if (ov96xx_read_reg(client, OV96XX_PID, &pid))
++ return -ENODEV;
++ if (ov96xx_read_reg(client, OV96XX_VER, &ver))
++ return -ENODEV;
++
++ dev_dbg(&client->dev, "MIDH=0x%02x MIDL=0x%02x PID=0x%02x VER=0x%02x\n",
++ midh, midl, pid, ver);
++
++ if ((midh != OV96XX_MIDH_MAGIC)
++ || (midl != OV96XX_MIDL_MAGIC)
++ || (pid != OV96XX_PID_MAGIC))
++ /*
++ * We didn't read the values we expected, so
++ * this must not be an OV96xx.
++ */
++ return -ENODEV;
++
++ return ver;
++}
++
++static int ioctl_g_ext_clk(struct v4l2_int_device *s, u32 *xclk)
++{
++ struct ov96xx_sensor *sensor = s->priv;
++ struct i2c_client *client = sensor->i2c_client;
++ unsigned long tgt_xclk;
++
++ tgt_xclk = ov96xxsensor_calc_xclk(client);
++
++ *xclk = tgt_xclk;
++
++ return 0;
++}
++
++static int ioctl_s_ext_clk(struct v4l2_int_device *s, u32 xclk)
++{
++ if (xclk > XCLK_MAX || xclk < XCLK_MIN)
++ return -EINVAL;
++
++ return 0;
++}
++
++/*
++ * following are sensor interface functions implemented by
++ * OV9640 sensor driver.
++ */
++/*static int ioctl_queryctrl(struct v4l2_int_device *s,
++ struct v4l2_queryctrl *qc)
++{
++ int i;
++
++ i = find_vctrl(qc->id);
++ if (i == -EINVAL) {
++ qc->flags = V4L2_CTRL_FLAG_DISABLED;
++ return 0;
++ }
++ if (i < 0)
++ return -EINVAL;
++
++ *qc = video_control[i].qc;
++ return 0;
++}*/
++
++// static int ioctl_g_ctrl(struct v4l2_int_device *s,
++static int ov96xx_get_control(struct soc_camera_device *icd,
++ struct v4l2_control *vctrl)
++{
++ struct ov96xx_sensor *sensor = container_of(icd, struct ov96xx_sensor, icd);
++ struct i2c_client *client = sensor->i2c_client;
++ int i, val;
++ struct vcontrol *lvc;
++
++ i = find_vctrl(vctrl->id);
++ if (i < 0)
++ return -EINVAL;
++
++ lvc = (struct vcontrol *)&video_control[i];
++ if (ov96xx_read_reg_mask(client, lvc->reg, (u8 *)&val, lvc->mask))
++ return -EIO;
++
++ val = val >> lvc->start_bit;
++ if (val >= 0) {
++ vctrl->value = lvc->current_value = val;
++ return 0;
++ } else
++ return val;
++}
++
++// static int ioctl_s_ctrl(struct v4l2_int_device *s,
++static int ov96xx_set_control(struct soc_camera_device *icd,
++ struct v4l2_control *vc)
++{
++ struct ov96xx_sensor *sensor = container_of(icd, struct ov96xx_sensor, icd);
++ struct i2c_client *client = sensor->i2c_client;
++ struct vcontrol *lvc;
++ int val = vc->value;
++ int i;
++
++ i = find_vctrl(vc->id);
++ if (i < 0)
++ return -EINVAL;
++
++ lvc = (struct vcontrol *)&video_control[i];
++ val = val << lvc->start_bit;
++ if (ov96xx_write_reg_mask(client, lvc->reg, (u8 *)&val, (u8)lvc->mask))
++ return -EIO;
++
++ val = val >> lvc->start_bit;
++ if (val >= 0) {
++ lvc->current_value = val;
++ return 0;
++ } else
++ return val;
++}
++
++static int ov96xx_get_chip_id(struct soc_camera_device *icd,
++ struct v4l2_chip_ident *id)
++{
++/* struct mt9m001 *mt9m001 = container_of(icd, struct mt9m001, icd);
++
++ if (id->match_type != V4L2_CHIP_MATCH_I2C_ADDR)
++ return -EINVAL;
++
++ if (id->match_chip != mt9m001->client->addr)
++ return -ENODEV;*/
++
++ id->ident = 0x53; //mt9m001->model;
++ id->revision = 0;
++
++ return 0;
++}
++
++/*
++ * Implement the VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type.
++ */
++// static int ioctl_enum_fmt_cap(struct v4l2_int_device *s,
++// struct v4l2_fmtdesc *fmt)
++// {
++// int index = fmt->index;
++// enum v4l2_buf_type type = fmt->type;
++//
++// memset(fmt, 0, sizeof(*fmt));
++// fmt->index = index;
++// fmt->type = type;
++//
++// switch (fmt->type) {
++// case V4L2_BUF_TYPE_VIDEO_CAPTURE:
++// if (index >= NUM_CAPTURE_FORMATS)
++// return -EINVAL;
++// break;
++// default:
++// return -EINVAL;
++// }
++//
++// fmt->flags = ov96xx_formats[index].flags;
++// strlcpy(fmt->description, ov96xx_formats[index].description,
++// sizeof(fmt->description));
++// fmt->pixelformat = ov96xx_formats[index].pixelformat;
++//
++// return 0;
++// }
++
++/*
++ * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This
++ * ioctl is used to negotiate the image capture size and pixel format
++ * without actually making it take effect.
++ */
++static int ov96xx_try_fmt_cap(struct soc_camera_device *icd, /*struct v4l2_int_device *s,*/
++ struct v4l2_format *f)
++{
++ enum image_size isize;
++ int ifmt;
++ struct v4l2_pix_format *pix = &f->fmt.pix;
++
++ isize = ov96xx_find_size(pix->width, pix->height);
++ pix->width = ov96xx_sizes[isize].width;
++ pix->height = ov96xx_sizes[isize].height;
++ for (ifmt = 0; ifmt < NUM_CAPTURE_FORMATS; ifmt++) {
++ if (pix->pixelformat == ov96xx_formats[ifmt].fourcc)
++ break;
++ }
++ if (ifmt == NUM_CAPTURE_FORMATS)
++ ifmt = 0;
++ pix->pixelformat = ov96xx_formats[ifmt].fourcc;
++ pix->field = V4L2_FIELD_NONE;
++ pix->bytesperline = pix->width*2;
++ pix->sizeimage = pix->bytesperline*pix->height;
++ pix->priv = 0;
++ switch (pix->pixelformat) {
++ case V4L2_PIX_FMT_YUYV:
++ case V4L2_PIX_FMT_UYVY:
++ default:
++ pix->colorspace = V4L2_COLORSPACE_JPEG;
++ break;
++ case V4L2_PIX_FMT_RGB565:
++ case V4L2_PIX_FMT_RGB565X:
++ case V4L2_PIX_FMT_RGB555:
++ case V4L2_PIX_FMT_RGB555X:
++ pix->colorspace = V4L2_COLORSPACE_SRGB;
++ break;
++ }
++ return 0;
++}
++
++static int ov96xx_release(struct soc_camera_device *icd)
++{
++ /* Disable the chip */
++// reg_write(icd, MT9M001_OUTPUT_CONTROL, 0);
++ return 0;
++}
++
++static int ov96xx_start_capture(struct soc_camera_device *icd)
++{
++ /* Switch to master "normal" mode */
++/* if (reg_write(icd, MT9M001_OUTPUT_CONTROL, 2) < 0)
++ return -EIO;*/
++ return 0;
++}
++
++static int ov96xx_stop_capture(struct soc_camera_device *icd)
++{
++ /* Stop sensor readout */
++/* if (reg_write(icd, MT9M001_OUTPUT_CONTROL, 0) < 0)
++ return -EIO;*/
++ return 0;
++}
++
++static int ov96xx_set_bus_param(struct soc_camera_device *icd,
++ unsigned long flags)
++{
++// struct ov96xx_sensor *ov96xx = container_of(icd, struct ov96xx_sensor, icd);
++
++ printk("- %s\n", __func__);
++ return 0;
++}
++
++static unsigned long ov96xx_query_bus_param(struct soc_camera_device *icd)
++{
++// struct ov96xx_sensor *ov96xx = container_of(icd, struct ov96xx_sensor, icd);
++ unsigned int width_flag = SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8;
++
++ /* MT9M001 has all capture_format parameters fixed */
++ return SOCAM_PCLK_SAMPLE_RISING |
++ SOCAM_HSYNC_ACTIVE_HIGH |
++ SOCAM_VSYNC_ACTIVE_HIGH |
++ SOCAM_MASTER |
++ width_flag;
++}
++
++static int ov96xx_set_fmt_cap(struct soc_camera_device *icd,/*struct v4l2_int_device *s,*/
++ struct v4l2_format *f)
++{
++ struct ov96xx_sensor *ov96xx = container_of(icd, struct ov96xx_sensor, icd);
++ struct v4l2_pix_format *pix = &f->fmt.pix;
++ int rval;
++
++ rval = ov96xx_try_fmt_cap(icd, f);
++ if (rval)
++ return rval;
++
++ rval = ov96xx_configure(icd);
++
++ if (!rval)
++ ov96xx->pix = *pix;
++
++ return rval;
++}
++
++static int ioctl_g_fmt_cap(struct v4l2_int_device *s,
++ struct v4l2_format *f)
++{
++ struct ov96xx_sensor *sensor = s->priv;
++
++ f->fmt.pix = sensor->pix;
++
++ return 0;
++}
++
++// static int ioctl_g_parm(struct v4l2_int_device *s,
++// struct v4l2_streamparm *a)
++// {
++// struct ov96xx_sensor *sensor = s->priv;
++// struct v4l2_captureparm *cparm = &a->parm.capture;
++//
++// if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
++// return -EINVAL;
++//
++// memset(a, 0, sizeof(*a));
++// a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
++//
++// cparm->capability = V4L2_CAP_TIMEPERFRAME;
++// cparm->timeperframe = sensor->timeperframe;
++//
++// return 0;
++// }
++//
++// static int ioctl_s_parm(struct v4l2_int_device *s,
++// struct v4l2_streamparm *a)
++// {
++// struct ov96xx_sensor *sensor = s->priv;
++// struct v4l2_fract *timeperframe = &a->parm.capture.timeperframe;
++// struct v4l2_fract timeperframe_old;
++// int rval;
++//
++// timeperframe_old = sensor->timeperframe;
++// sensor->timeperframe = *timeperframe;
++//
++// rval = ov96xx_configure(s);
++//
++// if (rval)
++// sensor->timeperframe = timeperframe_old;
++// else
++// *timeperframe = sensor->timeperframe;
++//
++// return rval;
++// }
++//
++// static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p)
++// {
++// struct ov96xx_sensor *sensor = s->priv;
++//
++// return sensor->pdata->ifparm(p);
++// }
++//
++// static int ioctl_s_power(struct v4l2_int_device *s, int on)
++// {
++// struct ov96xx_sensor *sensor = s->priv;
++//
++// return sensor->pdata->power_set(on);
++// }
++
++
++static int ov96xx_init(struct soc_camera_device *icd)
++{
++ printk("%s\n", __func__);
++ return ov96xx_configure(icd);
++}
++
++static int ioctl_dev_exit(struct v4l2_int_device *s)
++{
++ return 0;
++}
++
++static int ioctl_dev_init(struct v4l2_int_device *s)
++{
++ struct ov96xx_sensor *sensor = s->priv;
++ struct i2c_client *c = sensor->i2c_client;
++ int err;
++
++ err = ov96xx_detect(c);
++ if (err < 0) {
++ dev_err(&c->dev, "Unable to detect " DRIVER_NAME " sensor\n");
++ return err;
++ }
++
++ sensor->ver = err;
++ pr_info(DRIVER_NAME " chip version 0x%02x detected\n", sensor->ver);
++
++ return 0;
++}
++
++#ifdef CONFIG_VIDEO_ADV_DEBUG
++static int ov96xx_get_register(struct soc_camera_device *icd,
++ struct v4l2_register *reg)
++{
++ struct ov96xx_sensor *ov96xx = container_of(icd, struct ov96xx_sensor, icd);
++ int ret;
++ u8 val;
++
++ if (reg->match_type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff)
++ return -EINVAL;
++
++ if (reg->match_chip != ov96xx->i2c_client->addr)
++ return -ENODEV;
++
++ ret = ov96xx_read_reg(ov96xx->i2c_client, (u8)reg->reg, &val);
++ if (ret)
++ return ret;
++
++ reg->val = val;
++
++ return 0;
++}
++
++static int ov96xx_set_register(struct soc_camera_device *icd,
++ struct v4l2_register *reg)
++{
++ struct ov96xx_sensor *ov96xx = container_of(icd, struct ov96xx_sensor, icd);
++ int ret;
++
++ if (reg->match_type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff)
++ return -EINVAL;
++
++ if (reg->match_chip != ov96xx->i2c_client->addr)
++ return -ENODEV;
++
++ ret = ov96xx_write_reg(ov96xx->i2c_client, (u8)reg->reg, (u8)reg->val);
++ if (ret)
++ return ret;
++
++ return 0;
++}
++#endif
++// static struct v4l2_int_ioctl_desc ov96xx_ioctl_desc[] = {
++// { vidioc_int_dev_init_num,
++// (v4l2_int_ioctl_func *)ioctl_dev_init },
++// { vidioc_int_dev_exit_num,
++// (v4l2_int_ioctl_func *)ioctl_dev_exit },
++// { vidioc_int_s_power_num,
++// (v4l2_int_ioctl_func *)ioctl_s_power },
++// /* { vidioc_int_g_ext_clk_num,
++// (v4l2_int_ioctl_func *)ioctl_g_ext_clk },*/
++// { vidioc_int_g_ifparm_num,
++// (v4l2_int_ioctl_func *)ioctl_g_ifparm },
++// /* { vidioc_int_s_ext_clk_num,
++// (v4l2_int_ioctl_func *)ioctl_s_ext_clk },*/
++// { vidioc_int_init_num,
++// (v4l2_int_ioctl_func *)ioctl_init },
++// { vidioc_int_enum_fmt_cap_num,
++// (v4l2_int_ioctl_func *)ioctl_enum_fmt_cap },
++// { vidioc_int_try_fmt_cap_num,
++// (v4l2_int_ioctl_func *)ioctl_try_fmt_cap },
++// { vidioc_int_g_fmt_cap_num,
++// (v4l2_int_ioctl_func *)ioctl_g_fmt_cap },
++// { vidioc_int_s_fmt_cap_num,
++// (v4l2_int_ioctl_func *)ioctl_s_fmt_cap },
++// { vidioc_int_g_parm_num,
++// (v4l2_int_ioctl_func *)ioctl_g_parm },
++// { vidioc_int_s_parm_num,
++// (v4l2_int_ioctl_func *)ioctl_s_parm },
++// { vidioc_int_queryctrl_num,
++// (v4l2_int_ioctl_func *)ioctl_queryctrl },
++// { vidioc_int_g_ctrl_num,
++// (v4l2_int_ioctl_func *)ioctl_g_ctrl },
++// { vidioc_int_s_ctrl_num,
++// (v4l2_int_ioctl_func *)ioctl_s_ctrl },
++// };
++//
++// static struct v4l2_int_slave ov96xx_slave = {
++// .ioctls = ov96xx_ioctl_desc,
++// .num_ioctls = ARRAY_SIZE(ov96xx_ioctl_desc),
++// };
++//
++// static struct v4l2_int_device ov96xx_int_device = {
++// .module = THIS_MODULE,
++// .name = DRIVER_NAME,
++// .priv = &ov96xx,
++// .type = v4l2_int_type_slave,
++// .u = {
++// .slave = &ov96xx_slave,
++// },
++// };
++
++
++static u8 current_reg_addr;
++
++static int ov96xx_proc_read_register( __attribute__ ((unused)) struct file *file, const char *buf, unsigned long count, void *data)
++{
++ int len;
++ char given_param[16];
++ u8 reg_addr;
++ u8 reg_val;
++ struct i2c_client *i2c_client = data;
++
++ if (count <= 0) {
++ printk("Empty string transmitted !\n");
++ return 0;
++ }
++ if (count > 4) {
++ len = 4;
++ printk("Only 4x[0-9] decimal values supported !\n");
++ } else {
++ len = count;
++ }
++
++ if (copy_from_user(given_param, buf, len)) {
++ return -EFAULT;
++ }
++
++ reg_addr = (u8)(simple_strtol(given_param, 0, 16));
++ current_reg_addr = reg_addr;
++ ov96xx_read_reg(i2c_client, reg_addr, ®_val);
++ printk("Read 0x%02x @ 0x%02x\n", reg_val, reg_addr);
++
++ return len;
++}
++
++static int ov96xx_proc_write_register( __attribute__ ((unused)) struct file *file, const char *buf, unsigned long count, void *data)
++{
++ int len, ret;
++ char given_param[16];
++ u8 reg_val;
++ struct i2c_client *i2c_client = data;
++
++ if (count <= 0) {
++ printk("Empty string transmitted !\n");
++ return 0;
++ }
++ if (count > 4) {
++ len = 4;
++ printk("Only 4x[0-9] decimal values supported !\n");
++ } else {
++ len = count;
++ }
++
++ if (copy_from_user(given_param, buf, len)) {
++ return -EFAULT;
++ }
++
++ ov96xx_read_reg(i2c_client, current_reg_addr, ®_val);
++ printk("Read 0x%02x @ 0x%02x\n", reg_val, current_reg_addr);
++
++ reg_val = (u8)(simple_strtol(given_param, 0, 16));
++ printk("Writing+ 0x%02x @ 0x%02x\n", reg_val, current_reg_addr);
++// ret = ov96xx_write_reg(i2c_client, current_reg_addr, reg_val);
++ ret = i2c_smbus_write_byte_data(i2c_client, current_reg_addr, reg_val);
++ udelay(100);
++ if (ret) {
++ printk("Error while writing\n");
++ }
++
++ return len;
++}
++
++/* Interface active, can use i2c. If it fails, it can indeed mean, that
++ * this wasn't our capture interface, so, we wait for the right one */
++static int ov96xx_video_probe(struct soc_camera_device *icd)
++{
++ struct ov96xx_sensor *ov96xx = container_of(icd, struct ov96xx_sensor, icd);
++ struct proc_dir_entry *proc_read, *proc_write;
++ struct i2c_client *client = ov96xx->i2c_client;
++ int version, ret;
++
++ /* Make the default capture format QCIF RGB565 */
++ ov96xx->pix.width = ov96xx_sizes[QCIF].width;
++ ov96xx->pix.height = ov96xx_sizes[QCIF].height;
++ ov96xx->pix.pixelformat = V4L2_PIX_FMT_RGB565;
++
++ version = ov96xx_detect(client);
++ if (version < 0) {
++ dev_err(&client->dev, "Unable to detect " DRIVER_NAME " sensor\n");
++ return version;
++ }
++
++ dev_info(&icd->dev, "Detected an ov96%02x sensor\n", version);
++// switch (version) { ??
++ icd->formats = ov96xx_formats;
++ icd->num_formats = ARRAY_SIZE(ov96xx_formats);
++
++ /* configure image size and pixel format */
++ ret = ov96xx_write_regs(client, ov96xx_reg_init[YUV][QVGA]);
++ if (ret)
++ goto err;
++
++ /* create proc files */
++ proc_read = create_proc_entry( "driver/ovread", S_IWUSR | S_IRGRP | S_IROTH, NULL);
++ proc_write = create_proc_entry( "driver/ovwrite", S_IWUSR | S_IRGRP | S_IROTH, NULL);
++ if ((proc_read == NULL) || (proc_write == NULL)) {
++ printk(KERN_ERR DRIVER_NAME ": Could not register one /proc file. Terminating\n");
++ return -ENOMEM;
++ } else {
++ proc_read->write_proc = ov96xx_proc_read_register;
++ proc_read->data = client;
++ proc_write->write_proc = ov96xx_proc_write_register;
++ proc_write->data = client;
++ }
++
++ /* Now that we know the model, we can start video */
++ ret = soc_camera_video_start(icd);
++ if (ret)
++ goto err;
++
++ return 0;
++
++err:
++ return ret;
++}
++
++static void ov96xx_video_remove(struct soc_camera_device *icd)
++{
++ struct ov96xx_sensor *ov96xx = container_of(icd, struct ov96xx_sensor, icd);
++
++ dev_dbg(&icd->dev, "Video %x removed: %p, %p\n", ov96xx->i2c_client->addr,
++ ov96xx->icd.dev.parent, ov96xx->icd.vdev);
++ soc_camera_video_stop(&ov96xx->icd);
++}
++
++static struct soc_camera_ops ov96xx_ops = {
++ .owner = THIS_MODULE,
++ .probe = ov96xx_video_probe,
++ .remove = ov96xx_video_remove,
++ .init = ov96xx_init,
++ .release = ov96xx_release,
++ .start_capture = ov96xx_start_capture,
++ .stop_capture = ov96xx_stop_capture,
++ .set_fmt_cap = ov96xx_set_fmt_cap,
++ .try_fmt_cap = ov96xx_try_fmt_cap,
++ .set_bus_param = ov96xx_set_bus_param,
++ .query_bus_param = ov96xx_query_bus_param,
++ .controls = ov96xx_controls,
++ .num_controls = ARRAY_SIZE(ov96xx_controls),
++ .get_control = ov96xx_get_control,
++ .set_control = ov96xx_set_control,
++ .get_chip_id = ov96xx_get_chip_id,
++#ifdef CONFIG_VIDEO_ADV_DEBUG
++ .get_register = ov96xx_get_register,
++ .set_register = ov96xx_set_register,
++#endif
++};
++
++// static struct ov96xx_sensor ov96xx = {
++// .timeperframe = {
++// .numerator = 1,
++// .denominator = 15,
++// },
++// };
++
++static int __init
++ov96xx_probe(struct i2c_client *client, const struct i2c_device_id *did)
++{
++ struct ov96xx_sensor *ov96xx;
++ struct soc_camera_device *icd;
++ struct soc_camera_link *icl = client->dev.platform_data;
++ int ret;
++
++ if (!icl) {
++ dev_err(&client->dev, DRIVER_NAME " driver needs platform data\n");
++// return -EINVAL;
++ }
++
++ printk("%s\n", __func__);
++
++ if (i2c_get_clientdata(client))
++ return -EBUSY;
++
++// sensor->pdata = client->dev.platform_data;
++//
++// if (!sensor->pdata || !sensor->pdata->default_regs) {
++// dev_err(&client->dev, "no platform data?\n");
++// // return -ENODEV;
++// }
++
++ ov96xx = kzalloc(sizeof(struct ov96xx_sensor), GFP_KERNEL);
++ if (!ov96xx)
++ return -ENOMEM;
++
++// sensor->v4l2_int_device = &ov96xx_int_device;
++ ov96xx->i2c_client = client;
++ i2c_set_clientdata(client, ov96xx);
++
++ /* Second stage probe - when a capture adapter is there */
++ icd = &(ov96xx->icd);
++ icd->ops = &ov96xx_ops;
++ icd->control = &client->dev;
++ icd->x_min = 20;
++ icd->y_min = 12;
++ icd->x_current = 20;
++ icd->y_current = 12;
++ icd->width_min = 88;
++ icd->width_max = 1280;
++ icd->height_min = 72;
++ icd->height_max = 1024;
++ icd->y_skip_top = 1;
++// icd->iface = icl->bus_id;
++
++ ret = soc_camera_device_register(icd);
++ if (ret)
++ goto err;
++
++ return 0;
++
++/* err = v4l2_int_device_register(sensor->v4l2_int_device);
++ if (err)
++ i2c_set_clientdata(client, NULL);*/
++
++err:
++ kfree(ov96xx);
++ return ret;
++}
++
++static int __exit
++ov96xx_remove(struct i2c_client *client)
++{
++ struct ov96xx_sensor *ov96xx = i2c_get_clientdata(client);
++
++ if (!client->adapter)
++ return -ENODEV; /* our client isn't attached */
++
++ remove_proc_entry("driver/ovread", NULL);
++ remove_proc_entry("driver/ovwrite", NULL);
++
++ soc_camera_device_unregister(&ov96xx->icd);
++// v4l2_int_device_unregister(sensor->v4l2_int_device);
++ i2c_set_clientdata(client, NULL);
++ kfree(ov96xx);
++
++ return 0;
++}
++
++/* auto-detection */
++static const struct i2c_device_id ov96xx_id[] = {
++ { DRIVER_NAME, 0 },
++ { }
++};
++MODULE_DEVICE_TABLE(i2c, ov96xx_id);
++
++static struct i2c_driver ov96xx_i2c_driver = {
++ .driver = {
++ .name = DRIVER_NAME,
++ },
++ .probe = ov96xx_probe,
++ .remove = __exit_p(ov96xx_remove),
++ .id_table = ov96xx_id,
++};
++
++
++static int __init ov96xx_mod_init(void)
++{
++ return i2c_add_driver(&ov96xx_i2c_driver);
++}
++
++static void __exit ov96xx_mod_exit(void)
++{
++ i2c_del_driver(&ov96xx_i2c_driver);
++}
++
++module_init(ov96xx_mod_init);
++module_exit(ov96xx_mod_exit);
++
++MODULE_DESCRIPTION("OV96xx camera sensor driver");
++MODULE_AUTHOR("Julien Boibessot <jul...@ar...>");
++MODULE_LICENSE("GPL");
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <ar...@us...> - 2009-04-08 13:55:15
|
Revision: 1209
http://armadeus.svn.sourceforge.net/armadeus/?rev=1209&view=rev
Author: artemys
Date: 2009-04-08 13:55:01 +0000 (Wed, 08 Apr 2009)
Log Message:
-----------
[LINUX] Do some cleanup in apf27.c
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-08 13:23:52 UTC (rev 1208)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-08 13:55:01 UTC (rev 1209)
@@ -4,8 +4,8 @@
Index: linux-2.6.27.13/arch/arm/mach-mx2/apf27.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-08 11:23:11.000000000 +0200
-@@ -0,0 +1,1462 @@
++++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-08 15:48:50.000000000 +0200
+@@ -0,0 +1,1465 @@
+ /*
+ * apf27.c
+ *
@@ -217,17 +217,17 @@
+ /*save old FB params */
+ memcpy( &apf27_ad9889_fb_data.var, &info->var, sizeof(struct fb_var_screeninfo));
+ memcpy( &temp_var, &info->var, sizeof(struct fb_var_screeninfo));
-+
-+ /* set new FB params */
++
++ /* set new FB params */
+ temp_var.xres = 640;
-+ temp_var.yres = 480;
++ temp_var.yres = 480;
+ temp_var.pixclock = 37538;
+ temp_var.left_margin = 0x2f;
+ temp_var.right_margin = 0x2f; /* at least 3 & 1 */
-+ temp_var.upper_margin = 0x21;
-+ temp_var.lower_margin = 0xa;
-+ temp_var.hsync_len = 0x3f;
-+ temp_var.vsync_len = 0x2,
++ temp_var.upper_margin = 0x21;
++ temp_var.lower_margin = 0xa;
++ temp_var.hsync_len = 0x3f;
++ temp_var.vsync_len = 0x02;
+ temp_var.sync = FB_SYNC_OE_ACT_HIGH;
+ temp_var.vmode = FB_VMODE_NONINTERLACED,
+ temp_var.nonstd = 0;
@@ -235,7 +235,7 @@
+ acquire_console_sem();
+ /* tel the FB client that params have been changed */
+ info->flags |= FBINFO_MISC_USEREVENT;
-+ /* set new params */
++ /* set new params */
+ fb_set_var(info, &temp_var);
+ info->flags &= ~FBINFO_MISC_USEREVENT;
+ release_console_sem();
@@ -253,12 +253,12 @@
+ acquire_console_sem();
+ /* inform the console that the FB params have been changed */
+ info->flags |= FBINFO_MISC_USEREVENT;
-+ /* set new params */
++ /* set new params */
+ fb_set_var(info, &apf27_ad9889_fb_data.var);
+ info->flags &= ~FBINFO_MISC_USEREVENT;
+ release_console_sem();
+}
-+
++
+static struct ad9889_config apf27_ad9889_config = {
+ .init = ad9889_init,
+ .exit = ad9889_exit,
@@ -467,18 +467,20 @@
+#else
+ PA30_PF_CONTRAST,
+#endif
-+ /* For LQ043 OE_ACD is used as LCD Display ON/OFF */
+#ifdef CONFIG_FB_IMX_SHARP_LQ043_TFT
-+ (GPIO_PORTA | 31 | GPIO_OUT| GPIO_GPIO)
++ /* For LQ043 OE_ACD is used as LCD Display ON/OFF */
++ (GPIO_PORTA | 31 | GPIO_OUT| GPIO_GPIO)
+#else
-+ PA31_PF_OE_ACD
++ PA31_PF_OE_ACD
+#endif
+};
+
+static int apf27_fb_init(struct platform_device *pdev)
+{
++#ifdef CONFIG_FB_IMX_SHARP_LQ043_TFT
+ /* For LQ043 OE_ACD is used as LCD Display ON/OFF. shut down TFT */
+ gpio_set_value(GPIO_PORTA | 31, 1);
++#endif
+#ifdef CONFIG_FB_IMX_SHARP_LQ057_TFT
+ /* For LQ057: activate backlight at startup */
+ gpio_set_value(GPIO_PORTA | 30, 0);
@@ -511,7 +513,7 @@
+ .limit_mask = 0x7f, /* when battery is low */
+ /* set_bl_intensity = put a function here if you want to overload default one, */
+};
-+// //extern struct platform_device imxfb_device; // filled in generic.c
++
+static struct platform_device imxbl_device = {
+ .name = "imx-bl",
+ .dev = {
@@ -524,8 +526,10 @@
+
+#endif /* CONFIG_FB_MXC */
+
++
+#ifdef CONFIG_MMC_MXC
-+#ifdef CONFIG_APF27_DEVTEST
++
++# ifdef CONFIG_APF27_DEVTEST
+static int mxc_sdhc1_pins[] = {
+ PE18_PF_SDHC1_D0,
+ PE19_PF_SDHC1_D1,
@@ -560,7 +564,7 @@
+ .init = apf27_sdhc1_init,
+ .exit = apf27_sdhc1_exit,
+};
-+#endif /* CONFIG_APF27_DEVTEST */
++# endif /* CONFIG_APF27_DEVTEST */
+
+static int mxc_sdhc2_pins[] = {
+ PB4_PF_SDHC2_D0,
@@ -608,9 +612,9 @@
+
+static inline void apf27_init_mmc(void)
+{
-+#ifdef CONFIG_APF27_DEVTEST
++# ifdef CONFIG_APF27_DEVTEST
+ mxc_register_device(&mxc_sdhc_device0, &apf27_sdhc1_pdata);
-+#endif
++# endif
+ mxc_register_device(&mxc_sdhc_device1, &apf27_sdhc2_pdata);
+}
+#endif /* CONFIG_MMC_MXC */
@@ -676,7 +680,7 @@
+}
+
+static struct spi_imx_chip tsc2101_hw = {
-+ .cs_control = tsc2101_cs,
++ .cs_control = tsc2101_cs,
+};
+
+static struct tsc210x_config apf27_tsc2101_config = {
@@ -720,46 +724,46 @@
+ .transceiver_enable = NULL,
+};
+
-+#endif // CONFIG_CAN_MCP251X
++#endif /* CONFIG_CAN_MCP251X */
+
+
+static struct spi_board_info spi_board_info[] __initdata = {
+#ifdef CONFIG_ARMADEUS_MAX1027
-+{
-+ .modalias = "max1027",
-+ .controller_data = &max1027_hw,
-+ .max_speed_hz = 8000000,
-+ .bus_num = 0, // SPI1
-+ .irq = IRQ_GPIOE(MAX1027_EOC_INT),
-+ .chip_select = 0, // SS0
-+ .mode = 0,
-+ .platform_data = &apf27_max1027_config,
-+},
-+#endif // CONFIG_ARMADEUS_MAX1027
++ {
++ .modalias = "max1027",
++ .controller_data = &max1027_hw,
++ .max_speed_hz = 8000000,
++ .bus_num = 0, /* SPI1 */
++ .irq = IRQ_GPIOE(MAX1027_EOC_INT),
++ .chip_select = 0, /* SS0 */
++ .mode = 0,
++ .platform_data = &apf27_max1027_config,
++ },
++#endif /* CONFIG_ARMADEUS_MAX1027 */
+#ifdef CONFIG_SPI_TSC2102
-+{
-+ .modalias = "tsc210x",
-+ .controller_data = &tsc2101_hw,
-+ .max_speed_hz = 8000000,
-+ .bus_num = 1, // SPI2
-+ .irq = IRQ_GPIOF(TSC2101_INT),
-+ .chip_select = 0,
-+ .mode = 0,
-+ .platform_data = &apf27_tsc2101_config,
-+},
++ {
++ .modalias = "tsc210x",
++ .controller_data = &tsc2101_hw,
++ .max_speed_hz = 8000000,
++ .bus_num = 1, /* SPI2 */
++ .irq = IRQ_GPIOF(TSC2101_INT),
++ .chip_select = 0,
++ .mode = 0,
++ .platform_data = &apf27_tsc2101_config,
++ },
+#endif /* CONFIG_SPI_TSC2102 */
+#ifdef CONFIG_CAN_MCP251X
-+ {
-+ .modalias = "mcp251x",
-+ .controller_data = &mcp251X_hw,
-+ .max_speed_hz = 8000000, /* 8MHz */
-+ .bus_num = 1, // SPI2
-+ .mode = 0,
-+ .chip_select = 1,
-+ .irq = IRQ_GPIOD(CAN_MCP251X_INT),
-+ .platform_data = &apf27_mcp251x_config,
-+ },
-+#endif // CONFIG_CAN_MCP251X
++ {
++ .modalias = "mcp251x",
++ .controller_data = &mcp251X_hw,
++ .max_speed_hz = 8000000, /* 8MHz */
++ .bus_num = 1, /* SPI2 */
++ .mode = 0,
++ .chip_select = 1,
++ .irq = IRQ_GPIOD(CAN_MCP251X_INT),
++ .platform_data = &apf27_mcp251x_config,
++ },
++#endif /* CONFIG_CAN_MCP251X */
+};
+
+#ifdef CONFIG_USB_EHCI_MXC
@@ -973,8 +977,8 @@
+ .num_resources = ARRAY_SIZE(ssi_resources),
+ .resource = ssi_resources,
+ .dev = {
-+ .platform_data = &tsc2101_alsa_pdata,
-+ }
++ .platform_data = &tsc2101_alsa_pdata,
++ }
+};
+# define ALSA_SOUND &tsc2101_alsa_device,
+# endif /* CONFIG_SND_IMX_TSC2102 || CONFIG_SND_IMX_TSC2102_MODULE */
@@ -1120,7 +1124,6 @@
+
+
+static struct platform_device *platform_devices[] __initdata = {
-+// &apf27_nand_mtd_device,
+#ifdef CONFIG_IMX_BACKLIGHT
+ &imxbl_device,
+#endif
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|
|
From: <ar...@us...> - 2009-04-08 13:24:01
|
Revision: 1208
http://armadeus.svn.sourceforge.net/armadeus/?rev=1208&view=rev
Author: artemys
Date: 2009-04-08 13:23:52 +0000 (Wed, 08 Apr 2009)
Log Message:
-----------
[LINUX] Add platform declaration for i.MX27 CSI and OV9653 sensor
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-07 17:05:11 UTC (rev 1207)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/281-apf27-armadeus-add_apf27.c.patch 2009-04-08 13:23:52 UTC (rev 1208)
@@ -4,8 +4,8 @@
Index: linux-2.6.27.13/arch/arm/mach-mx2/apf27.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-03-20 09:21:52.000000000 +0100
-@@ -0,0 +1,1379 @@
++++ linux-2.6.27.13/arch/arm/mach-mx2/apf27.c 2009-04-08 11:23:11.000000000 +0200
+@@ -0,0 +1,1462 @@
+ /*
+ * apf27.c
+ *
@@ -71,6 +71,9 @@
+#include <mach/imx_ssi.h>
+#include <mach/imx-alsa.h>
+#endif
++#if defined(CONFIG_VIDEO_MX27_MODULE) || defined(CONFIG_VIDEO_MX27)
++#include <mach/imx_cam.h>
++#endif
+#if defined(CONFIG_CPU_FREQ_IMX27) || defined(CONFIG_CPU_FREQ_IMX27_MODULE)
+#include "cpufreq_imx.h"
+#endif
@@ -92,7 +95,14 @@
+#ifdef CONFIG_VIDEO_AD9889_MODULE
+#define CONFIG_VIDEO_AD9889 1
+#endif
++#ifdef CONFIG_VIDEO_MX27_MODULE
++#define CONFIG_VIDEO_MX27 1
++#endif
++#ifdef CONFIG_VIDEO_OV96xx_MODULE
++#define CONFIG_VIDEO_OV96xx 1
++#endif
+
++
+/*
+ * APF27 has a Micron 128MiB 1,8V NAND flash, 16 bits width
+ */
@@ -154,6 +164,15 @@
+ .platform_data = NULL,
+ .irq = 0
+ },
++#ifdef CONFIG_VIDEO_OV96xx
++ [1] = {
++ .type = "ov96xx",
++ .flags = 0, /* FIXME */
++ .addr = 0x30,
++ .platform_data = NULL,
++ .irq = 0
++ },
++#endif
+};
+
+#ifdef CONFIG_VIDEO_AD9889
@@ -631,7 +650,7 @@
+ .conv = MAX1027_CONV_DEFAULT,
+ .setup = MAX1027_SETUP_DEFAULT,
+ .avg = MAX1027_AVG_DEFAULT,
-+ .cnvst_pin = (int)(MAX1027_CNVST|GPIO_PORTE),
++ .cnvst_pin = (int)(MAX1027_CNVST|GPIO_PORTE),
+ .init = max1027_init,
+ .exit = max1027_exit
+};
@@ -1113,6 +1132,67 @@
+};
+
+
++/* Camera / CSI stuff */
++#ifdef CONFIG_VIDEO_MX27
++
++# ifdef CONFIG_VIDEO_OV96xx
++static int apf27dev_ov9653_ctl_pins[] = {
++ (GPIO_PORTC | 30 | GPIO_OUT | GPIO_GPIO), /* SSI3_TX as POWERDOWN*/
++ (GPIO_PORTC | 31 | GPIO_OUT | GPIO_GPIO), /* SSI3_CLK as RESET */
++};
++# endif
++
++static int mxc_csi_pins[] = {
++ PB10_PF_CSI_D0,
++ PB11_PF_CSI_D1,
++ PB12_PF_CSI_D2,
++ PB13_PF_CSI_D3,
++ PB14_PF_CSI_D4,
++ PB15_PF_CSI_MCLK,
++ PB16_PF_CSI_PIXCLK,
++ PB17_PF_CSI_D5,
++ PB18_PF_CSI_D6,
++ PB19_PF_CSI_D7,
++ PB20_PF_CSI_VSYNC,
++ PB21_PF_CSI_HSYNC
++};
++
++static int apf27_camera_init(struct platform_device *pdev)
++{
++# ifdef CONFIG_VIDEO_OV96xx
++ /* To be put in ov96xx driver init part: */
++ int err;
++
++ err = mxc_gpio_setup_multiple( apf27dev_ov9653_ctl_pins,
++ ARRAY_SIZE(mxc_csi_pins), "CSI");
++ if (err) {
++ printk("Error %s", __func__);
++ }
++ gpio_set_value(GPIO_PORTC | 30, 0);
++ gpio_set_value(GPIO_PORTC | 31, 0);
++# endif
++
++ return mxc_gpio_setup_multiple(mxc_csi_pins,
++ ARRAY_SIZE(mxc_csi_pins), "CSI");
++}
++
++static int apf27_camera_exit(struct platform_device *pdev)
++{
++ mxc_gpio_release_multiple(mxc_csi_pins, ARRAY_SIZE(mxc_csi_pins));
++
++ return 0;
++}
++
++struct mx27_camera_platform_data apf27_camera = {
++ .init = apf27_camera_init,
++ .exit = apf27_camera_exit,
++ .clk = 26600000,
++ .flags = MX27_CAMERA_HSYNC_HIGH | MX27_CAMERA_GATED_CLOCK |
++ MX27_CAMERA_PACK_DIR_MSB,
++};
++#endif /* CONFIG_VIDEO_MX27 */
++
++
+/* APF27 power management stuff */
+
+
@@ -1361,6 +1441,9 @@
+#ifdef CONFIG_MMC_MXC
+ apf27_init_mmc();
+#endif
++#ifdef CONFIG_VIDEO_MX27
++ mxc_register_device(&mx27_camera_device, &apf27_camera);
++#endif
+
+ printk("i.MX27 chip revision: %d\n", mx27_revision() );
+}
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|
|
From: <ar...@us...> - 2009-04-07 17:05:16
|
Revision: 1207
http://armadeus.svn.sourceforge.net/armadeus/?rev=1207&view=rev
Author: artemys
Date: 2009-04-07 17:05:11 +0000 (Tue, 07 Apr 2009)
Log Message:
-----------
[LINUX] Updates i.MX27 Camera driver with latest available
Modified Paths:
--------------
trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/226-apf27-pengu-mx27-Camera_support.patch
Modified: trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/226-apf27-pengu-mx27-Camera_support.patch
===================================================================
--- trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/226-apf27-pengu-mx27-Camera_support.patch 2009-04-07 16:01:55 UTC (rev 1206)
+++ trunk/buildroot/target/device/armadeus/linux/kernel-patches/2.6.27.13/226-apf27-pengu-mx27-Camera_support.patch 2009-04-07 17:05:11 UTC (rev 1207)
@@ -1,7 +1,7 @@
From: Sascha Hauer <s....@pe...>
-Date: Tue, 9 Sep 2008 09:33:11 +0000 (+0200)
+Date: Fri, 19 Dec 2008 13:32:25 +0000 (+0100)
Subject: i.MX27 Camera support
-X-Git-Url: http://pasiphae.extern.pengutronix.de/?p=imx%2Flinux-2.6.git;a=commitdiff_plain;h=dd2a1c355ff4e4f4da4bfd9c2083d402b4015a01
+X-Git-Url: http://pasiphae.extern.pengutronix.de/?p=imx%2Flinux-2.6.git;a=commitdiff_plain;h=df7a35c4c07f0be0d4592ce85f5fdc3b0a281898
i.MX27 Camera support
@@ -15,16 +15,20 @@
- use single dma transfers for camera instead of sg lists
- implement emma support: No scaling or color space conversion
support yet, only pure streaming to get rid of the dma engine
+20081017:
+- fix direction of pixel clock
+20081103:
+- implement setting of packing direction from platform
Signed-off-by: Sascha Hauer <s....@pe...>
---
diff --git a/arch/arm/plat-mxc/include/mach/imx_cam.h b/arch/arm/plat-mxc/include/mach/imx_cam.h
new file mode 100644
-index 0000000..7d002f4
+index 0000000..2d704ae
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/imx_cam.h
-@@ -0,0 +1,46 @@
+@@ -0,0 +1,47 @@
+/*
+ imx-cam.h - i.MX27 camera driver header file
+
@@ -57,6 +61,7 @@
+#define MX27_CAMERA_GATED_CLOCK (1 << 5)
+#define MX27_CAMERA_INV_DATA (1 << 6)
+#define MX27_CAMERA_PCLK_SAMPLE_RISING (1 << 7)
++#define MX27_CAMERA_PACK_DIR_MSB (1 << 8)
+
+struct mx27_camera_platform_data {
+ int (*init)(struct platform_device *);
@@ -72,13 +77,13 @@
+#endif /* __ASM_ARCH_CAMERA_H_ */
+
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
-index 3e9e0dc..281aaa7 100644
+index 47102c2..645d805 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
-@@ -974,4 +974,12 @@ config VIDEO_SH_MOBILE_CEU
- ---help---
- This is a v4l2 driver for the SuperH Mobile CEU Interface
+@@ -893,4 +893,12 @@ config USB_S2255
+ endif # V4L_USB_DRIVERS
+
+config VIDEO_MX27
+ tristate "i.MX27 Quick Capture Interface driver"
+ depends on VIDEO_DEV && MACH_MX27
@@ -89,10 +94,10 @@
+
endif # VIDEO_CAPTURE_DRIVERS
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
-index ef7c8d3..51a661e 100644
+index 16962f3..5f59ea9 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
-@@ -134,6 +134,7 @@ obj-$(CONFIG_VIDEO_VIVI) += vivi.o
+@@ -128,6 +128,7 @@ obj-$(CONFIG_VIDEO_VIVI) += vivi.o
obj-$(CONFIG_VIDEO_CX23885) += cx23885/
obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o
@@ -102,10 +107,10 @@
obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o
diff --git a/drivers/media/video/mx27_camera.c b/drivers/media/video/mx27_camera.c
new file mode 100644
-index 0000000..52d5a81
+index 0000000..b61dec1
--- /dev/null
+++ b/drivers/media/video/mx27_camera.c
-@@ -0,0 +1,1183 @@
+@@ -0,0 +1,1185 @@
+/*
+ * V4L2 Driver for MX27 camera host
+ *
@@ -395,7 +400,7 @@
+ csicr1 = CSICR1_MCLKDIV(mclk_get_divisor(pcdev)) |
+ CSICR1_MCLKEN;
+ if (mx27_camera_emma(pcdev)) {
-+ csicr1 |=CSICR1_PRP_IF_EN | CSICR1_SWAP16_EN | CSICR1_FCC |
++ csicr1 |= CSICR1_PRP_IF_EN | CSICR1_FCC |
+ CSICR1_RXFF_LEVEL(0);
+ } else
+ csicr1 |= CSICR1_SOF_INTEN | CSICR1_RXFF_LEVEL(2);
@@ -711,7 +716,7 @@
+ if (ret < 0)
+ return ret;
+
-+ if (common_flags & SOCAM_PCLK_SAMPLE_RISING)
++ if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
+ csicr1 |= CSICR1_INV_PCLK;
+ if (common_flags & SOCAM_HSYNC_ACTIVE_HIGH)
+ csicr1 |= CSICR1_HSYNC_POL;
@@ -727,6 +732,8 @@
+ csicr1 |= CSICR1_GCLK_MODE;
+ if (pcdev->platform_flags & MX27_CAMERA_INV_DATA)
+ csicr1 |= CSICR1_INV_DATA;
++ if (pcdev->platform_flags & MX27_CAMERA_PACK_DIR_MSB)
++ csicr1 |= CSICR1_PACK_DIR;
+
+ if (mx27_camera_emma(pcdev)) {
+ int bytesperline = (icd->width * icd->current_fmt->depth) >> 3;
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