We provide an open-source library of approximate multipliers described using Verilog HDL.

The article related to the library is currently under review.

Features

  • Minterms
  • Truth table
  • Symmetric finder algorithm
  • Mine sweeper algorithm
  • Erroneous outputs

Project Samples

ASF_4x4 ASF_M8_1 ASF_M16_1

Project Activity

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Registered

2020-07-28
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