From: Marcin C. <sa...@sa...> - 2010-10-02 22:19:36
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>> Erich Waelde <ew....@na...> wrote: > > The bit $10, which is apparently not set, ist the MSTR bit. That fits > the symtoms I'm seeing: "spirw" (available in core/words/spirw.asm) > never returns, because SPIF in register SPSR is never set. No wonder, > if we are not in master mode to begin with. The bit-bang version > never looks at SPSR and SPCR. I've had this when some other device on the SPI bus was pulling /SS low and thus forced us to be slave. //Marcin |