amforth-devel

[Amforth] Watchdog Timer on AVR8s

[Martin N. <amf...@mg...>]

Looking into a crashing ATmega2560, I found this clause in the docs:

"If the Watchdog is accidentally enabled, for example by a runaway
pointer or brown-out condition, the device will be
reset and the Watchdog Timer will stay enabled. If the code is not set
up to handle the Watchdog, this might lead to an eternal loop of
time-out resets. To avoid this situation, the application software
should always clear the Watchdog System Reset Flag (WDRF) and the WDE
control bit in the initialisation routine, even if the Watchdog is not
in use."

This suggests that both the MCUSR and the WDTSR should be cleared on
reset.

I've added a line:
	out_ WDTCSR, zerol
to COLD which covers it.

The minimum requirement is to clear both MCUSR.WDRF and WDTCSR.WDE.

Cheers!

-- 
Regards,

Martin Nicholas.

E-mail: rep...@mg... (Address will be valid throughout 2019).

Re: [Amforth] Watchdog Timer on AVR8s

[Martin N. <amf...@mg...>]

This snippet is a bit more like it (I think):
lds	temp0, WDTCSR
ori	temp0, (1<<WDCE) | (1<<WDE)
out_	WDTCSR, temp0
out_	WDTCSR, zerol

-- 
Regards,

Martin Nicholas.

E-mail: rep...@mg... (Address will be valid throughout 2019).

Re: [Amforth] Watchdog Timer on AVR8s

[Matthias T. <mt...@we...>]

Hi,

Thanks for your analysis.

> This suggests that both the MCUSR and the WDTSR should be cleared on
> reset.
> 
> I've added a line:
> 	out_ WDTCSR, zerol
> to COLD which covers it.

adding it to COLD in a central location is troublesome. Not all AVR8
have a watchdog at all and those who have one, have at least two
different ways to handle it. Rather difficult to implement centrally.

> 
> The minimum requirement is to clear both MCUSR.WDRF and WDTCSR.WDE.

AFAIK, the minimum reset intervall is 15ms, what makes it possible
to add the reset code to the application turnkey word. For debugging
purposes, the reset recipe may be helpful
http://amforth.sourceforge.net/TG/recipes/Reset.html

Matthias

Re: [Amforth] Watchdog Timer on AVR8s

[Martin N. <amf...@mg...>]

Hi,

I've had this one brewing for some time.

Looking at schemes for: AT90CAN128 & ATA6612C. Common variables
between chips: WDTCSR (WDTCR), WDTOE (WDCE), WDCE, WDE.
WDTCSR & WDTOE are included "For compatibility" in the CAN chip.

I include this in cold.asm. It should work with the two WDTs in the
chip series above as well as chips with no WDT at all:

.if defined(WDTCSR)
; There's a WDT, so we reset it as per the docs.
	in_	temp0, WDTCSR
	ori	temp0, (1<<WDCE) | (1<<WDE)
	out_	WDTCSR, temp0
	andi	temp0, ~(1<<WDE)
	out_	WDTCSR, temp0
.endif

If there is a third type of WDT then I'll think again.

IMHO this should be included in the boot-up code for all AVR8's. At the
end of the day, Aunty Atmel knows best and more about their chips than
any of us do, so if they say do it - just do it.

RIP Matthias Trute.

-- 
Regards,

Martin Nicholas.

E-mail: rep...@mg... (Address will be valid throughout 2020).

Re: [Amforth] Watchdog Timer on AVR8s

[Martin N. <amf...@mg...>]

I should add this is a follow-up to a thread started in 2019.
Here's the archive of that thread:
https://sourceforge.net/p/amforth/mailman/message/36683433/

-- 
Regards,

Martin Nicholas.

E-mail: mg...@mg....