First off, I would like to say that I am really liking your editor so far, and am now using it as my primary text editor. However, there are several bugs with Verilog (some of which are quite easy to fix).
1. The localparam instruction is missing in the langs.xml file
2. The .v extension is not associated with the Verilog language by default (also fixed in the langs.xml file)
3. All the keywords listed in the "type1" category of the langs.xml file for verilog appear to be unaffected by syntax highlighting. At first I thought it might be because they weren't alphabetized, so I alphebitzed them, but that didn't fix the problem (after which I noticed that the keywords on some other languages aren't alphabetized, but still highlight correctly). Everything I tried was unable to get these keywords to show up. Finall, I just added them all to the list for the "instre1" keywords, and they now work correctly (though the highlighting show up the same way as the keywords in that section, obviously.
I tried messing around with the stylers.xml file as well, but was unable to get any syntax highlighting to affect those keywords. I might be missing something obvious, but if I am, I'm not sure what it is ;).
4. Not really a bug, but Comic Sans is a very irritating font for the comments. It's easy to change, but I seriously think this should be removed as a default. That's just a matter of personal opinion though, and given you set it up this way, I'm sure you disagree with me ;).
Anyway, thanks again for the great editor. The single best feature for me is the seperate scroll bars when doing vertical split (amazing how many text editors have vertical split, but both halves scroll at the same time, making it useless for editting on dual monitors).
KnightElite
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I'm using version 4.1.1, and NONE of my Verilog keywords have any syntax highlighting. What's going on? I've seen in two threads now that Verilog is supposed to have syntax highlighting now.
This is very annoying. I don't want to define my own language for a built-in type.
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
I've checked the langs and stylers xml files. Verilog shows up in both and everything looks like it SHOULD work...
But none of my verilog files have any syntax highlighting. The proper language is selected (auto-detected, actually), and it's all valid code (old project I'm getting back into - it has all been on an FPGA before and runs fine).
If you would like to refer to this comment somewhere else in this project, copy and paste the following link:
First off, I would like to say that I am really liking your editor so far, and am now using it as my primary text editor. However, there are several bugs with Verilog (some of which are quite easy to fix).
1. The localparam instruction is missing in the langs.xml file
2. The .v extension is not associated with the Verilog language by default (also fixed in the langs.xml file)
3. All the keywords listed in the "type1" category of the langs.xml file for verilog appear to be unaffected by syntax highlighting. At first I thought it might be because they weren't alphabetized, so I alphebitzed them, but that didn't fix the problem (after which I noticed that the keywords on some other languages aren't alphabetized, but still highlight correctly). Everything I tried was unable to get these keywords to show up. Finall, I just added them all to the list for the "instre1" keywords, and they now work correctly (though the highlighting show up the same way as the keywords in that section, obviously.
I tried messing around with the stylers.xml file as well, but was unable to get any syntax highlighting to affect those keywords. I might be missing something obvious, but if I am, I'm not sure what it is ;).
4. Not really a bug, but Comic Sans is a very irritating font for the comments. It's easy to change, but I seriously think this should be removed as a default. That's just a matter of personal opinion though, and given you set it up this way, I'm sure you disagree with me ;).
Anyway, thanks again for the great editor. The single best feature for me is the seperate scroll bars when doing vertical split (amazing how many text editors have vertical split, but both halves scroll at the same time, making it useless for editting on dual monitors).
KnightElite
I should probably point out that I'm using version 3.9 of the editor.
> 1. The localparam instruction is missing in the langs.xml file
Done.
> 2. The .v extension is not associated with the Verilog language by default (also fixed in the langs.xml file)
Done.
> 3. All the keywords listed in the "type1" category of the langs.xml file for verilog appear to be unaffected by syntax highlighting.
Fixed, it will be in the official release 4.0
> I'm sure you disagree with me ;).
You're right ;)
Don
I'm using version 4.1.1, and NONE of my Verilog keywords have any syntax highlighting. What's going on? I've seen in two threads now that Verilog is supposed to have syntax highlighting now.
This is very annoying. I don't want to define my own language for a built-in type.
I've checked the langs and stylers xml files. Verilog shows up in both and everything looks like it SHOULD work...
But none of my verilog files have any syntax highlighting. The proper language is selected (auto-detected, actually), and it's all valid code (old project I'm getting back into - it has all been on an FPGA before and runs fine).
Thanks for the fixes Don, much appreciated.