Search Results for "eda"
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Showing 465 open source projects for "eda"
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LibrePCB
A powerful, innovative and intuitive EDA suite for everyone
...A LibrePCB library is more than just a collection of stupid graphics for symbols and footprints – they are organized in a meaningful, semantic manner. This makes library management more fun and eliminates many problems known from other EDA tools. -
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ydata-profiling
Create HTML profiling reports from pandas DataFrame objects
ydata-profiling primary goal is to provide a one-line Exploratory Data Analysis (EDA) experience in a consistent and fast solution. Like pandas df.describe() function, that is so handy, ydata-profiling delivers an extended analysis of a DataFrame while allowing the data analysis to be exported in different formats such as html and json. -
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Perfect Roadmap To Learn Data Science
Basic To Intermediate Python data science guide
...What makes it particularly valuable is its holistic nature: rather than focusing only on modeling or theory, it also addresses the broader lifecycle of data-science work, data ingestion, cleaning, EDA, feature engineering, model building, validation, deployment, etc. -
MongoDB Atlas runs apps anywhereMongoDB Atlas gives you the freedom to build and run modern applications anywhere—across AWS, Azure, and Google Cloud. With global availability in over 115 regions, Atlas lets you deploy close to your users, meet compliance needs, and scale with confidence across any geography.
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BSC
Bluespec Compiler (BSC)
...The compiler performs scheduling of atomic rules, elaborates parameterized modules, and enforces interface contracts, producing predictable RTL that integrates with existing EDA tools. A companion simulator enables fast functional execution and debugging before handing designs to traditional verification and synthesis stages. The ecosystem includes standard libraries, FIFOs, interfaces, and utilities that encourage reuse and clean separation of datapaths and control. By raising the abstraction for hardware architecture while preserving efficient output, BSC helps teams explore complex designs—such as RISC-V cores or accelerators—more productively. -
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Sweetviz
Visualize and compare datasets, target values and associations
Sweetviz is an open-source Python library that generates beautiful, high-density visualizations to kickstart EDA (Exploratory Data Analysis) with just two lines of code. Output is a fully self-contained HTML application. The system is built around quickly visualizing target values and comparing datasets. Its goal is to help quick analysis of target characteristics, training vs testing data, and other such data characterization tasks. Shows how a target value (e.g. -
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'The Siemens EDA (previously Mentor Graphics) Userware Toolbox is a collection of application extensions for Siemens EDA ' Electronic Design Automation (EDA) applications. Extensions are coded AMPLE, Tcl, VBScript, Python, JScript, and Visual Basic. ' ' This software is NOT officially supported by Siemens EDA. '######################################################## '## The following software is "freeware" which Siemens EDA '## provides as a courtesy to our users. ...
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AI Data Science Team
An AI-powered data science team of agents
AI Data Science Team is a Python library and agent ecosystem designed to accelerate and automate common data science workflows by modeling them as specialized AI “agents” that can be orchestrated to perform tasks like data cleaning, transformation, analysis, visualization, and machine learning. It provides a modular agent framework where each agent focuses on a step in the typical data science pipeline — for example, loading data from CSV/Excel files, cleaning and wrangling messy datasets,... -
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plexe
Build a machine learning model from a prompt
plexe lets you build machine-learning systems from natural-language prompts, turning plain English goals into working pipelines. You describe what you want—a predictor, a classifier, a forecaster—and the tool plans data ingestion, feature preparation, model training, and evaluation automatically. Under the hood an agent executes the plan step by step, surfacing intermediate results and artifacts so you can inspect or override choices. It aims to be production-minded: models can be exported,... -
Ship Agents FasterGemini Enterprise Agent Platform lets you rapidly build, scale, govern and optimize production-ready agents grounded in your organization's data. The platform enables developers to build custom or pre-built agents for virtually any use case. New customers get $300 in free credits.
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SpinalHDL
Scala based HDL
SpinalHDL is a hardware description (HDL) framework embedded in Scala, enabling hardware designers to build digital circuits with modern programming abstractions. Instead of writing in Verilog or VHDL directly, users describe hardware components and their interconnects using Scala code and Spinal’s domain-specific library, which then emits synthesizable hardware (e.g. as Verilog). Because SpinalHDL is embedded in Scala, it allows reuse of functional abstractions, parameterization, modular... -
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AsyncAPI
Allows you to create machine-readable definitions of asynchronous APIs
AsyncAPI is an open-source initiative that seeks to improve the current state of Event-Driven Architecture (EDA). Our long-term goal is to make working with EDAs as easy as working with REST APIs. That goes from documentation to code generation, from discovery to event management, and beyond. The AsyncAPI Specification defines a standard, protocol-agnostic interface that describes message-based or event-driven APIs. The AsyncAPI document allows people or machines communicating with one another to understand the capabilities of an event-driven API without requiring access to the source code, documentation, or inspecting the network traffic. ... -
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KiCad-AppImage
Repository for KiCad AppImage
This project hosts the KiCad AppImages built using pkg2appimage. Please visit https://github.com/CyberCircuits/kicad-appimage for details. If it complains about missing graphics-related libraries please install them separately. Fedora: sudo dnf install mesa-libGLU Debian/Ubuntu: sudo apt install libglu1-mesa -
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Vendor Neutral AI SDK for EDA Agents
RTL, Verification, Lint, CDC, FECAD, Synthesis, DFT, SoC Integration
AI agent fleet for EDA: a Flow Manager, 7 domain Leads and 55 agents that parse RTL, build a design model, and run FECAD, DFT, RTL-static, verification, signoff and SoC-integration flows from one natural-language request. Ships a Python SDK, a CLI, a TUI, a WebGUI, an MCP facade, and VS Code and Cursor extensions. Runs entirely inside your network against a local model server or your own provider keys. -
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Free Parsers for Liberty UPF SDC VCD
Free Liberty, UPF, SDC and VCD Parsers with Python, Java and Tcl APIs
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Ngspice project aims to improve the spice3f5 circuit simulator.
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This SourceForge project hosts an open-source Verilog-A library of compact large-signal RF MEMS capacitor, resonator and switch models. The Verilog-A models can be used with SPICE solvers for large-signal simulation of analog/RF circuits based on RF
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Quite Universal Circuit Simulator
A circuit simulator with graphical user interface (GUI)
Qucs is a circuit simulator with graphical user interface. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter, Transient, Noise and Harmonic Balance analysis. Pure digital simulations are also supported. -
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1. flattenverilog : Flattens the specified verilog module by removing the hierarchies. It works both for RTL and netlist. 2. preprocessverilog : Verilog Preprocessor to resolve macros like nested `ifdef , `define 3. createhierarchy : Verilog Hierarchy Creation Tool to group a list of instances in RTL or enlist. This creates a new wrapper by encapsulating the instance 4. flatteninstances : Flattens the given list of hierarchical instances- this removes hierarchy by pulling the...
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EDAUtils Converters
Free converters across IP-XACT Verilog VHDL Liberty SystemC
verilog2vhdl : Tool to convert Verilog into VHDL by keeping the same structure and function for ease of correlation. vhdl2verilog : Tool to convert VHDL into Verilog by keeping the same structure and function for ease of correlation verilog2ipxact :Tool to create IP-XACT Component or Design from a Verilog Module. ipxact2verilog : Tool to convert IP-XACT into Verilog module ipxactinterface2svinterface : Converts IP-XACT Bus Definition / BusInterface into System Verilog... -
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PICSimLab - Prog. IC Simulator Lab.
PICSimLab is a realtime emulator for PIC, Arduino, STM32, ESP32, ...
⚠️ Please note: The official distribution of the PICSimLab simulator binaries is available on github.com and SourceForge.net. Be cautious of unofficial sites, such as picsimlab.com, which do not disclose the owner. PICSimLab is a realtime emulator of development boards with MPLABX/avr-gdb debugger integration. PICSimLab supports microcontrollers from picsim, simavr, uCsim, qemu-stm32, qemu-esp32, and gpsim. PICSimLab has integration with MPLABX/Arduino IDE for programming the... -
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gpsim is an open sourced simulator for Microchip's PIC microcontrollers. It supports all three families of PICs: 12-bit, 14-bit, and 16-bit cores. See also gputils http://gputils.sourceforge.net/
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...It's core function is to generate simulation engine instructions based on user input. However, it also offers extra functionality via applications and utilities developed by others. Electronic Design Automation (EDA) tool suites are used to provide schematic capture and editing, and schematic to netlist conversion. Waveform data viewers are used to display simulation results and PDF viewers to display user manuals.
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KiCad EDA
A Cross Platform and Open Source Electronics Design Automation Suite
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IP-XACT 2009/2014 Platform
Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files
Smart GUI to create or update IP-XACT often needed for the IP packaging. It has capability create Bus Definitions from scratch to populate BusDef library. One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API... -
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This project provides a analog / mixed signal IC schematic capture and layout tool with the accompanying netlisters, simulators, and verification tools.
