Showing 3 open source projects for "risc"

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    Bareflank Hypervisor

    Bareflank Hypervisor

    lightweight hypervisor SDK written in C++

    The Bareflank Hypervisor is an open source hypervisor Software Development Toolkit (SDK) for Rust and C++, led by Assured Information Security, Inc. (AIS), that provides the tools needed to rapidly prototype and create your own hypervisor on 64bit versions of Intel and AMD (ARMv8 CPUs, RISC-V and PowerPC also planned). The Bareflank SDK is intended for instructional/research purposes as it only provides enough virtualization support to start/stop a hypervisor. Bareflank can also be used as the foundation to create your own, fully functional hypervisor as it uses the MIT license, and includes 100% unit test coverage and compliance for AUTOSAR. ...
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    jMIPS

    MIPS processor in Java

    A MIPS processor modeled in Java for educational purposes and aimed at undergraduate Computer Architecture courses. It presently runs MIPS 32-bit R3000 ELF executables on any platform where Java itself will run. Five successively more sophisticated models of a pipelined MIPS RISC processor are included. Though the code is deliberately kept clear and simple in order that readers are able to figure out how a real processor works through the medium of the code, it will soon be able to run a real Linux O/S kernel compiled for MIPS in Java - at what speed we don't know!
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  • 3

    gasVM

    A register-based virtual machine designed to be embeddable.

    gasVM is a 32-bit, register-based virtual machine that has been designed to support a game that the author has undertaken for the development of a game for a game Competition, "Gary's Adventure of Science!" It is designed so that it may one day be implemented and hardware, and is designed to be a RISC machine. While this VM is designed for a single game, it is hoped that it will be useful for others who are looking for a virtual machine platform to embed within their software.
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