A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.
A Java-based tool for creating, designing and distributing graphical trees that represent syntactic construction of sentences. Useful for drawing trees under X-bar generative theory or any other correlated application.