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The OS561 operating system based around FORTH/Java. The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.
The Affordable BIOS Restoration Tool provides VHDL and C code to recover from failed BIOS upgrades using affordable CPLD's. EEPROM's and Flash chips can be restored with this flash programmer. Interfaces for DIP and tsop packages are being developed.
Lay a foundation for success with Tested Reference Architectures developed by Fortinet’s experts. Learn more in this white paper.
Moving to the cloud brings new challenges. How can you manage a larger attack surface while ensuring great network performance? Turn to Fortinet’s Tested Reference Architectures, blueprints for designing and securing cloud environments built by cybersecurity experts. Learn more and explore use cases in this white paper.
A hardware project to interface a microcontroller (currently PIC family) to a LED driver consisting of a CPLD to drive an LED array with 35 LEDs... The source codes (c/vhdl) and schematics are going to be freely available
The aim is to develop a foundation for a FPGA hardware platform able to run Linux kernel and software. It must be easy to add hardware accelerated ip-cores to the FPGA. Ethernet and TCP/IP is a corner stone of the hardware and software.
Lay a foundation for success with Tested Reference Architectures developed by Fortinet’s experts. Learn more in this white paper.
Moving to the cloud brings new challenges. How can you manage a larger attack surface while ensuring great network performance? Turn to Fortinet’s Tested Reference Architectures, blueprints for designing and securing cloud environments built by cybersecurity experts. Learn more and explore use cases in this white paper.
GalaxyIP (Galaxy Intellectual Property Cores) is a project devoted to accommodate a set of IP-Cores for embedded SoC development, based on the processor code named Voyager (StarTrek and the space probes).
Picode is the ultimate VHDL picode 16 to 32 bits controller. It is described in only one entity and is implementable in standard FPGAs. It has it own compiler. Picode is designed to take only one or two clock cycle duration per instruction.
This is a fork of the Elphel cameras firmware CVS,
fully open to contributions from the elphel users and developers community
Everyone can submit patches or obtain CVS access for this fork
Stable changes will be ported to the main CVS upon approv
X-RT: A portable multiprocessor real-time scheduling framework
This project contains the material discussed in my PhD dissertation, entitled "Hardware/Software Design of Dynamic Real-Time Schedulers for Embedded Multiprocessor Systems."
The source code is available in the SVN repository: https://sourceforge.net/p/xrt/code/6/tree/trunk/
and consists in two folders:
1) /X-RT : A portable multiprocessor scheduling framework supporting scheduling periodic real-time tasks according to the G-EDF (Global Earliest Deadline First) scheduling platform....
Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.