Delay-Tolerant Networking suitable for spacecraft and ground
11/21/2025
* Official distribution sites for ION and ION-core have moved to GitHub:
https://github.com/nasa-jpl/ION-DTN
https://github.com/nasa-jpl/ion-core
* ION documentation:
https://ion-dtn.readthedocs.io/
Download link for new releases (after ION 4.1.2) is posted below. Please report all issues to GitHub. Submissions to this site will not be monitored.
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ION development is managed by the Jet Propulsion Lab.
The Interplanetary Overlay...
cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core
This project was moved to https://gitlab.c3sl.ufpr.br/roberto/cmips
The code here is no longer up to date.
The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is an almost complete implementation of the MIPS32r2 instruction set. The TLB and assorted control registers will be included soon (as of fev 2015). The model was synthesized for an Altera EP4CE30F23. The model uses up 15% of combinational blocks and 5%...