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Encrypted processor based on public RISC processor
A processor that works encrypted, based around the "wally" public RISCV implementation.
This implementation of the `KPU' encrypted computing model makes no changes to the standard RISCV processor core other than broadening all paths to 128 bits instead of 32/64. It works instead via additional peripheral units and extra custom RISCV instructions.
State machine framework for reactive embedded systems
...Instead, the RKH intention is to support just enough basic concepts of that powerful tools to facilitate the reactive-system modeling holding a solid, and efficient implementation. Broadly speaking, the RKH implementation has been designed from the ground up to be used in 8-bits platforms but can be easily adapted to 16 or 32-bits platforms.