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The NS-Mapper ad-hoc scenario editor is improved and extended by adding more realistic strategies, such as random based node placement, movement and traffic to the ad-hoc simulation of the Network Simulator 2 (NS-2).
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JSim8086 is platform-independent Assembly Language Simulator of the Intel 8086 CPU. It was designed to be a learning tool (CAL) for first year Computing students who are learning Computer Systems Organisation and Assembly Programming.
NoCsim is a base library and front end for simulating Network On Chip environments utilizing Wormhole or Virtual Cut-Through routers. The current usage of the simulator includes experimentation with various routing protocols and functional unit mappings.
This is a simulation of an open CPU, called 67-80-85. It tries to implement a simple, efficient CPU. It includes the simulator, an assembler, a sample code for a boot loader (ROM), a microkernel prototype and tests. - "The 3-legged shinning steel horse
pystim is an open source electrical stimulation device driver and development framework. It features a parallel/sequential block paradigm and supports event-base programming. It also provides a device simulator.
The Multi-Simulator Interface (MSI) is a simulation interconnection engine. It connects simulations by synchronizing their clocks and data. It is a light-weight HLA alternative.
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Design and implementation of the Observation-based Cooperation Enforcement in Mobile Ad-hoc Networks (OCEAN) protocol, on top of the ns2 network simulator, using Dynamic Source Routing (DSR).
The goal of this project is to be an improvement of the original Network Animator (NAM) module provided as part of the Network Simulator 2 (NS2). This tool provides topology visualization, TCL script generation, and enhanced simulation animation.
RangeSim is a collection of classes for simulating distributed protocols for range search on P2P (peer-to-peer) network environments. It is based upon the PeerSim simulator, which offers easy configuration, extendability and high performance.
SNNSraster is a utility for quick ANN analysis of raster GIS maps with the use of Stuttgart Neural Network Simulator trained network files. It was developed to read and write binary raster files.
SNNSraster is a project of the Geography Laboratory of the University of Siena. The code was developed by Giancarlo Macchi Jánica between 2006 and 2007. SNNSraster's fundamental objective is to improve the ability to integrate the use of artificial neural networks in GIS environments.
A modern and usable interface for the well known neuronal network simulator SNNS. The GUI acts as a client to serveral servers embedding SNNS and supports team work aspects.
NEmu is an emulator/simulator for exploring computer architecture. It
provides a virtual machine, a debugger, and simulations of various cpus
and hardware. NEmu is built on top of ALib, my own application framework.
An emulator for an educational CPU (P3) used in a Computer Architecture (AC) course in IST (a University in Lisbon, Portugal). The CPU is only theoritical and has a software simulator already implemented. Purpose: final AC project testing and evaluation.
BT-Sim is a BlueTooth simulator on a HCI level. The project alows to develop and test BT applications without using real BT hardware. It works in particular with PalmSource's Palm OS Simulator.
FreeSNMP is a free Java SNMP development platform. Imediate objectives will be the implementation of a full SNMP protocol stack, a Manager API and an Agent API. Future objectives include the development of several managing tools, and an Agent simulator.
WIPsim (Wireless IP Simulator) is a network simulator for all layers of the OSI model. The current version is focussed on dealing with IPv6. The simulator was started to investigate wireless (data) networks and mobility.
GNUDE is a complete suite of GNU C, C++, Fortran, and Java Cross Compilers, and the GDB CPU Simulator and Debugger for embedded microprocessor applications development. Targets development for ARM7, ARM9, and XScale applications.
Netsim is a mobile ad hoc network simulator targeted at large heterogeneous node configurations. It is written in Java and is easily extensible through its modular concept.