Search Results for "system dynamics simulator"

FastSim consists of: - 'Facile' a highly flexible and expressive processor-architecture specification-language. - A compiler for the specifications which produces high-performance, fast-forwarding simulators.

Development of software emulator for BESM-6, old soviet mainframe. This project has been split and moved to: https://github.com/besm6/simh - BESM-6 simulator https://github.com/besm6/dispak - DISPAK simulator https://github.com/besm6/besm6-archive - disk images https://besm6.github.io/ - examples, DISPAK sources and KRAB sources

QNICE is a simple 16 bit processor intended to teach the basics of hardware design as well as operating system design. A TTL implementation is planned, a FPGA implementation is available here: http://qnice-fpga.com. Currently there exists a C based simulator and an assembler.

This is a student project designed to compete in the 2010 IEEE Computer Society Student Competition: http://www.computer.org/portal/web/competition/2010competition The Code Red architecture is designed for extremely lower power environments, like distributed sensor networks. Included is a design of that architecture, a Java-based simulator, an implementation (without vector instructions) designed as a Logisim circuit (http://ozark.hendrix.edu/~burch/logisim/), and more. The name...

SkyEye is a very fast full system simulator which takes llvm as IR of dynmic compiled framework.. It can simulate series ARM, Coldfire,Mips, Powerpc, Sparc, x86, TI DSP and Blackfin DSP Processor. Also can simulate multicore system by the multicore of host. The commercial support is provided by DigiProto Co. (http://www.digiproto.com)

1664 macro assembler, simulator, console debugger, interpreter (host system calls.)

A wrapper for the Aerowinx 744 Precision Simulator (http://aerowinx.com, also known as "PS1", a DOS flight sim) that executes the sim without emulators, and extends its functionality with advanced audio, input device and network capabilities.

This project provides a tool-chain for compiling C code for the SPEAR2 processor. It comprises a C compiler (GCC), an assembler/linker, a macro assembler, a basic library and a simulator.

We provide a mechanism to trace the NPTL Library as few intrusive as possible for the application dynamics. The post-mortem analysis then allows measurements (contension,...) and understanding of hangs or bugs. No change in kernel or user application.

NEmu is an emulator/simulator for exploring computer architecture. It provides a virtual machine, a debugger, and simulations of various cpus and hardware. NEmu is built on top of ALib, my own application framework.

A microprocessor simulator for unit testing assembly code in embedded systems. Written in pure Java, it works with JUnit on any platform Java supports. Micros include 6502, 6800, 8051, Z80, and others.

GNUDE is a complete suite of GNU C, C++, Fortran, and Java Cross Compilers, and the GDB CPU Simulator and Debugger for embedded microprocessor applications development. Targets development for ARM7, ARM9, and XScale applications.