Open Source VHDL/Verilog Sound/Audio Software

Development of a fully designed alarm clock implemented on the Xilinx Spartan3 board.

An open-hardware and -firmware project that implements a USB-input fully-digital class-D audio amplifier. All processing is done on FPGA, including the USB-physical, USB-SIE, HID interface, clock-recovery, bus voltage regulation, noise-shaping and PWM output. A Microchip PIC based remote control is also included. The remote maps to the media buttons of the USB HID interface. The volume control, next track, previous track, stop and play/pause functions are supported.

vorbis-hw is an open-source hardware implementation of an Ogg-Vorbis decoder. My current plan is to port the "tremor" codec to VHDL.

Synthesia is an open hardware/software platform intended for creating standalone audio devices such as synthesizers on embedded processors.