Search Results for "multi emulator frontend"

XiangShan is an open-source, high-performance RISC-V processor project that implements out-of-order superscalar cores using Chisel for hardware construction. The design targets modern performance goals—deep pipelines, speculative execution, multi-issue decode/execute, and sophisticated branch prediction—while remaining synthesizable for ASIC flows and portable to FPGAs for research. A modular microarchitecture separates frontend, backend, and memory subsystems with coherent caches and scalable interconnects, enabling multi-core configurations. The project invests heavily in verification: differential testing against reference models, extensive random instruction tests, and full software stacks (bootloaders, Linux) to validate correctness under realistic workloads. ...