Showing 4 open source projects for "eeprom"

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    pFFh

    pFFh

    a self-contained development environment for embedded systems.

    pFFh is a programming language that allows you to launch applications on embedded systems safely, quickly and comfortably. pFFh runs on the target system, combining operation as a command interpreter and code compiler. We can say that pFFh behaves like an operating system on the board under development. All pFFh needs is a serial or USB-serial channel to communicate, and through it, receive and process console commands, either from a keyboard or from files sent from a desktop computer. At...
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  • 2
    Ddr-ArdMeg
    This is a small foot print, high performance, type safe device driver library, initially targeting Arduino Mega 2560 and MoteinoMega. The library is stand alone and only requires Avr GCC and avrlib. The design is based on the same ideas as were used for the Ddr-Z8E device driver library (see http://ddrz8e.sourceforge.net/). Heavy usage of hardcoded invariants, constant folding/propagation and inlining ensures both tight code and high performance. Type safe enums (C++11) provides an...
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  • 3

    flAVR

    A simulator for Atmel's 8/16-bit AVR microcontrollers

    ...The project aims to implement a cycle-accurate AVR CPU core simulator along with a range of peripherals, allowing firmware written for a variety of parts to be run on a host PC. In addition, flAVR provides enhanced interactive debugging functionality - featuring breakpoints, data watchpoints, execution tracebuffers, flash/RAM/EEPROM viewers, and run-time disassembler. flAVR also implements the GDB remote protocol, allowing it to interface with Eclipse and other IDEs supporting GDB. The simulator also supports kernel-aware co-simulation when running binaries linked with the Mark3 RTOS, providing it with virtual input and graphics devices. The project is designed to be highly-portable, and builds with minimal dependencies. ...
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  • 4
    AVRILOS

    AVRILOS

    Simple AVR OS

    A simple Embedded System Framework that allows rapid development of applications build for AVR family. System is based on a super-loop architecture with check and skip (no-wait) flag event driver system. Supports: UART, SysTick Timer, ADC, SPI, EEPROM, PWM. Also supports: Xilinx FPGA configuration, FPGA SSI interface, smart card reader etc. Tested partially (different modules in each case) on ATMega163/16/32/323/8. Awards CodeProject 2010, Third Prize, Hardware and Device Programming Check the Wiki Page for more details.
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