Showing 12 open source projects for "x86_64-linux-gnu"

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  • 1
    GHDL

    GHDL

    VHDL 2008/93/87 simulator

    ... generator (LLVM, GCC or, x86_64/i386 only, a built-in one), it is much faster than any interpreted simulator. It can handle very large designs, such as leon3/grlib. GHDL runs on GNU/Linux, Windows and macOS; on x86, x86_64, armv6/armv7/aarch32, aarch64 and ppc64. You can freely download nightly assets, use OCI images (aka Docker/Podman containers), or try building it on your own machine.
    Downloads: 30 This Week
    Last Update:
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  • 2
    FSMDesigner
    FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
    Downloads: 5 This Week
    Last Update:
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  • 3

    libVerilogVPI

    SEL for access verilog via PLI/VPI API. Tested with Icarus Verilog.

    SFENCE Extension Library (SEL) for access verilog function via PLI/VPI API to calls of standard SFENCE Function_Function objects.
    Downloads: 0 This Week
    Last Update:
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  • 4

    smPla

    SystemVerilog module to substitute Verilog PLA system tasks.

    SystemVerilog module that models the following PLA system tasks of Verilog: $a/sync$and$array $a/sync$nand$array $a/sync$or$array $a/sync$nor$array $a/sync$and$plane $a/sync$nand$plane $a/sync$or$plane $a/sync$nor$plane.
    Downloads: 0 This Week
    Last Update:
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  • 5
    vcd2svg can parse Value Change Dump (VCD) files and draw an impulse diagram using Scalable Vector Graphics (SVG). It works together with the GHDL open-source simulator.
    Downloads: 0 This Week
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  • 6
    xswifs stands for: cross SoftWare Interfaces. This project provide examples (snippets) for interfacing various software tools and languages with various mechanism. It has been created to help in HW/SW co-simulation and to provide benchmarks.
    Downloads: 0 This Week
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  • 7
    This library supports interoperability between components written for different verification methodologies such as VMM and OVM. This is maintained by the Accellera Verification Intellectual Property Technical Subcommittee.
    Downloads: 0 This Week
    Last Update:
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  • 8
    VSYML is an automated symbolic simulator for VHDL designs.
    Downloads: 0 This Week
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  • 9
    A verilog language compiler written using Java and JavaCC. It produces a netlist, an ascii text file, of all the cell connections. It can compile very large circuits comprised of many modules.
    Downloads: 0 This Week
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  • 10

    Labcoat: Cleanroom Apps for SuperWikia

    Labcoat; the VHDL graphic emulator.

    Labcoat for SuperWikia Alpha fabrication manages new or revised fabrication processes. Its 'Cleanroom' applets allow codesmiths to access the lab environment, used to create semiconductors, substrate prototypes, chipset instruction blocks and other Labcoat projects. Our extensions in future releases will include UML support for C#/C++ conforming projects, import/export architecture schematics and refactoring sub-projects.
    Downloads: 0 This Week
    Last Update:
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  • 11
    Custom uav is a complete flight control system in development. The project includes everything required for unmanned flight.
    Downloads: 0 This Week
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  • 12
    Tool-independent Makefile generator for VHDL models.
    Downloads: 0 This Week
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